Instruction Set Architecture Background & Introduction CS 160 Ward 1 CS 160 Ward 2 Computers and Programs Machine Code • A simplified model of a computer consists of a • An executable program is a sequence of processing unit (CPU) and a memory. these simple instructions. • CPU can understand simple instructions: • The sequence is stored in memory (Von – read/write a memory location Neumann architecture). – add two numbers • The CPU processes the simple instructions – compare numbers sequentially. – etc. – Some instructions can tell the CPU to jump to a new place in memory to get the next instruction. CS 160 Ward 3 CS 160 Ward 4 Instructions Sample Program in Words • Each instruction is stored in memory as a bunch of bits. # Instruction 1 Set memory[801] to hold 00000001 • The CPU decodes the bits to determine what 2 Set memory[802] to hold 00000000 should happen. 3 If memory[802] = 10 jump to instruction #8 4 increment memory[802] • For example, the instruction to add 2 5 set memory[803] to 2 times memory[801] numbers might look like this: 6 put memory[803] in to memory[801] 7 jump to instruction #3 10100110 8 print memory[801] CS 160 Ward 5 CS 160 Ward 6 A Picture Human vs Machine Programs MEMORY Address • The computer can only understand the bits (the Instruction #1 0 encoded program) 1 Instruction #2 Instruction #3 CPUCPU 2 Machine Language 3 Instruction #4 4 Instruction #5 5 Instruction #6 • Humans don't like to deal with bits, so they ... ... developed English-like abbreviations for programs. 801 Assembly Language 802 803 • Typically, one-to-one relationship between the two CS 160 Ward 7 CS 160 Ward 8 Assembly & Machine Language An Assembler Our Sample Program Assembly Language Machine Language AssemblyAssembly ST 1,[801] 00100101 11010011 MachineMachine LanguageLanguage ST 0,[802] 00100100 11010100 AssemblerAssembler LanguageLanguage ProgramProgram TOP: BEQ [802],10,BOT 10001010 01001001 11110000 ProgramProgram INCR [802] 01000100 01010100 01001000 10100111 10100011 ST 1,[801] MUL [801],2,[803] ST 1,[801] 01001001 11100101 10101011 00000010 . 01001001 ST [803],[801] . 10010100 00101001 10010100 JMP TOP 11010101 BOT: LD A,[801] 11010100 10101000 CALL PRINT 10010001 01000100 CS 160 Ward 9 CS 160 Ward 10 Higher-Level Languages High-Level Languages • Assembly Language is much easier to deal • Many high-level languages have been with than Machine Language, but you still developed. need to know about all the instructions. – Different ways of representing • People/Companies have developed languages computations. that were independent of the specific – Different languages for different needs: machine language (i.e., portable). • symbolic vs. numeric computation – More abstract representation of • human efficiency vs. program efficiency instructions. • portability • extensibility CS 160 Ward 11 CS 160 Ward 12 Examples of High Level Languages Sample Program In C • C • C++ set memory[801] to hold 00000001 x=1; • Fortran set memory[802] to hold 00000000 i=0; • Java if memory[802] = 10 jump to instruction #8 while (i!=10) { increment memory[802] i++; • Ada set memory[803] to 2 times memory[801] x=x*2; • Basic put memory[803] in to memory[801] } } • Algo jump to instruction #3 print memory[801] printf("%d",x); Some High-Level Languages are “higher” than others. CS 160 Ward 13 CS 160 Ward 14 Compiler Many Different Compilers • Sample C Compilers: CC Program Program MachineMachine – GNU gcc CC CompilerCompiler LanguageLanguage ProgramProgram – Portland pgcc intint main() main() {{ intint i=1; i=1; – Keil C .. .. .. 0100100101001001 – Intel Win32 C 1001010010010100 – Sun C – Fujitsu C Created with text editor or – IBM AIX C development environment – . CS 160 Ward 15 CS 160 Ward 16 Elements of an Instruction • Operation code (Op code) – Do this Instruction Set • Source Operand(s) reference Characteristics & Functions – To this • Result Operand reference – Put the answer here • Next Instruction Reference (rare) – When you have done that, do this... CS 160 Ward 17 CS 160 Ward 18 Instruction Cycle State Diagram Simple Instruction Format (without Interrupts) • How many instructions (Opcodes) can we have in our Instruction Set? 24 = 16 • How much memory (or virtual memory) can we directly access in our system? 26 = 64 CS 160 Ward 19 CS 160 Ward 20 Number of Addresses [1] Number of Addresses [2] • 3 addresses • 2 addresses – Operand 1, Operand 2, Result – One address doubles as operand and result – a = b + c; – a = a + b – May be a fourth - next instruction (rare - – Reduces length of instruction usually implicit) – Requires some extra work – Needs very long words to hold everything. • Temporary storage to hold some results Why? – Typically indirect addressing using registers CS 160 Ward 21 CS 160 Ward 22 Number of Addresses [3] Number of Addresses [4] • 1 address • 0 (zero) addresses – Implicit second address – All addresses implicit – Usually a register (accumulator) – Uses a stack – Common on early machines – e.g. push a – push b – add – pop c – c = a + b CS 160 Ward 23 CS 160 Ward 24 How Many Addresses Types of Operand • More addresses • Addresses – More complex (powerful?) instructions • Numbers – More registers • Inter-register operations are quicker – Integer/floating point – Fewer instructions per program • Characters • Fewer addresses – ASCII, etc. – Less complex (powerful?) instructions • Logical Data – More instructions per program – Bits or flags – Faster fetch/execution of instructions CS 160 Ward 25 CS 160 Ward 26 Instructions: Types of Operation Two different classifications • Data Transfer • Data Access & Transfer Operations • Arithmetic • Arithmetic • Logical • Logical • Conversion • Floating-Point • I/O • Conditional & • Transfer of Control Unconditional Branch • System Control • Processor Control CS 160 Ward 27 CS 160 Ward 28 Common Data Transfer Operations Common Arithmetic Operations • Specify • Add, Subtract, Multiply, Divide – Source • Signed Integer – Destination • Floating point ? – Amount of data • May be different instructions for • May include different movements – Increment (a++) – e.g. IBM 370 – Decrement (a--) • Or one instruction and different – Negate (-a) addresses – e.g. VAX CS 160 Ward 29 CS 160 Ward 30 Common Shift and Rotate Operations Common Logical Operations • Bitwise operations • AND, OR, NOT CS 160 Ward 31 CS 160 Ward 32 Common Conversion Operations Common Input/Output Operations • E.g. Binary to Decimal • May be specific instructions • May be done using data movement instructions (memory mapped) • May be done by a separate controller (DMA) CS 160 Ward 33 CS 160 Ward 34 Common Transfer of Control Operations Branch Instruction • Branch – e.g. branch to x if result is zero • Skip – e.g. increment and skip if zero ISZ Register1 Branch xxxx ADD A • Subroutine call – c.f. interrupt call CS 160 Ward 35 CS 160 Ward 36 Nested Procedure Calls Use of Stack CS 160 Ward 37 CS 160 Ward 38 Common Systems Control Operations Example Instruction Set • Privileged instructions MIPS Instruction Set • CPU needs to be in specific state – Ring 0 on 80386+ • Early RISC Design – Kernel mode • Design goals: • For operating systems use – Speed • Ensure one instruction can complete every clock cycle – Minimalistic • Contain the fewest possible instructions necessary CS 160 Ward 39 CS 160 Ward 40 MIPS Instruction Set (Part I) MIPS Instruction Set (Part II) CS 160 Ward 41 CS 160 Ward 42 MIPS Floating-Point Instructions Aesthetics of Instruction Sets • Elegance – Balanced – No frivolous or useless instructions • Orthogonality – No unnecessary duplication – No overlap among instructions CS 160 Ward 43 CS 160 Ward 44 Prinicple of Orthogonality Typical Simple RISC Design The principle of orthogonality specifies • Instructions designed to that each instruction should perform a – Complete in one clock cycle unique task without duplicating or • Performs a basic computation overlapping the function of other – Support restricted set of operations instructions • Register operations • Load/Store operations – Fixed instruction length CS 160 Ward 45 CS 160 Ward 46 Addressing Modes • Immediate • Direct Addressing Modes • Register • Indirect – Memory – Register • Displacement/Indexed – various types • Stack CS 160 Ward 47 CS 160 Ward 48 Immediate Addressing Immediate Addressing Diagram • Operand is part of instruction • Operand = address field Instruction • e.g. ADD 5 Opcode Operand – Add 5 to contents of accumulator – 5 is operand • No memory reference to fetch data • Fast • Limited range CS 160 Ward 49 CS 160 Ward 50 Direct Addressing Direct Addressing Diagram • Address field contains address of operand Instruction • Effective address (EA) = address field (A) Opcode Address A • e.g. ADD A Memory – Add contents of cell A to accumulator – Look in memory at address A for operand • Single memory reference to access data • No additional calculations to work out Operand effective address • Limited address space CS 160 Ward 51 CS 160 Ward 52 Register Addressing (1) Register Addressing (2) • Operand is held in register named in • No memory access address filed • Very fast execution • EA = R • Large number of registers helps • Limited number of registers performance – Very small address field needed – Requires good assembly programming or – Shorter instructions compiler writing – Faster instruction fetch • Good (multiple) use of operands after in registers • Very limited address space – C programming – Number of registers much smaller than • register int a; memory • Compare: direct addressing CS 160 Ward 53 CS 160 Ward 54 Register Addressing Diagram