VAX 6000 Model 400 System Digital Technical Journal Digital Equipment Corporation Volume 2 Number 2 Spring I990 Editorial J~nc(; Blake, lditor Rarbar;~Lindmark, Associ:rte Editor Richard W. Hcane. Managing Editor Circulation Catherine M. Phillips. Administr:ttor Suzanne). Babineau. Secretary Production I lclen L. P:rttcrson. Production Editor Nancy Jones, Typographer Rchccca A. Barker, Typographer I'ctcr W'oodbury, lllustraror and Design" Advisory Board Samuel H. Fuller. Chairman Robert M. Clorioso John W. hlccredie Mahendra R. Patel E <;mnt Snviers I<ohcrt K. Spitz \Vllll;~mD. Strecker Victor A. Vyssotsky 'The Oigilnl TechnicalJorrrcrl is published quarterly by Digital Equipment Corporation. 146 Main Street ML01-3lB68. Maynartl. ~~s~tchusetts01754-257 I. Subscriptions to theJournal a;e S.iO.00 for four issues and must he prepaid in [I.s.funds. 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ISSN 0898-90 1 X Documentation Number EI'-(:1')71i-[)P The following are trademarks of Digital Equ~pmentCorpora- Cover Design tion: (:I, DECnet, I)E(:st;ltion 3100, Dli(:\+.inclows.Digital, the Our cover depicts some of the common equutions and terminology Digit:tl logo, HSC, 1MicroVAX, 11%55.Thinwire. VAX, VAX-1 l/780. used in vectorp~'(~'cssing,which is one of the featured topics in VAX 6000, VAX 8700, VAX 8800, \:\x 9000, \r~x~~,VAXcluster, this issue. The vir Xr ~cctorroceextends the VAX 6000family to VAX FORTRAN. VAXvector6000, VYS. IILTRIX, XMI. dressthe compuling nc,cvi.s of numerically intensiw applications. IlNlX is a registered trademark of American Telephone & Telegraph Company. 7Be VAX 6000 h.I~~lcl~~OOsystcm is a bright star in Digital Sfamily of midrntzge mzrltipmcesson and this isszre S main product them dbx is :I registered trademark of dbx, Inc. hlll'h is a trademark ofhl~l'sComputer S!,srcms. Inc. i%e corer u~mdesigned by David Comberg and Karulj Zieglw of the Book production was done by Difiit:ll's Educational Ser\'ices Corporate Design Grotlp. Media Communications Group in Hedford, MA. I Contents 9 Foreword Pauline A. Nist VAX 6000 Model 400 System 1 1 VectorProcessing on the VAXvector 6000 Model 400 Debra L. Slater, David M. Fenwick, D. John Shakshober, and Douglas D. Williams 27 The VAX 6000 Model 400 ScalurProcessor Module Patrick Sullivan, Michael A. Callander, Sr., James R. Lundberg, Rebecca L. Stamm, and William J. Bowhill 36 An Overview of the VAX 6000 Mo&l 400 Chip Set W. Hugh Durdan, William J. Bowhill, John F. Brown, William V. Herrick, Richard C. Marcello, Sridhar Samudrala, G. Michael Uhler, and Nicholas Wade 5 2 VM 6000 Model 400 Physical Technology John T. Bartoszek, Robert]. Hannemann, Stephen P. Hansen, Rol~ertJ.McCarty, and John C. Sweeney 64 vAX 6000 Model 400 CPU Chip Set Functional Design Verification Richard E. Calcagni and Will Sherwood 73 Test and Qualification of the VM 6000 Mo&l400 System John W. Croll, Larry T. Camilli, and Anthony J. Vaccaro 84 Development of the DECstation 3100 Thomas C. Furlong, Michael J. K. Nielsen, and Neil C. Wilhelm 89 Compiler Optimization in RISC Systems Larry R. Weber 1 Editor%Introduction Bill Bowhill discuss the module design and give particulars on how difficult signal integrity prob- lems were resolved. The five system chips that reside on the module are the topic of our next paper by Hugh Durdan, Bill Bowhill, John Brown, Bill Hcrrick, Rich Marccllo, Sri Samudrala, Mike Uhler, and Nick Wade. From their discussions of the chip designs, we learn how the best features of the VAX 8700 ECL-based, pipelined system and of previous VLsI designs were incorporated in the chip set, which achieves a cycle time of 28 nanoseconds. C. Blake Jane This fast cycle time was one of several require- ments that drove a significant design effort for the physical technology. John Bartoszek, Rob Hannemann, Steve Hansen, Bob McCarty, and John Sweeney describe the technological advances This Spring 1990 issue marks the second issue to achieved in a number of areas, including tape- be published on the new quarterly schedule of the automated bonding, semicustomized ceramic Digital TechnicalJournal.This is also the fust year single-chip package design, and testability. that the Journal is available by subscription-a The two papers that close this collection of papers service our readers have asked for and which we are on the VAX 6000 Model 400 address chip design glad to be able to offer. verification and system test. Rick Calcagni and The Journal will continue to focus each issue on a Will Sherwood explain the engineers' multipronged product theme. In fact, two products are featured in approach to design verification, an approach neces- this issue. The main theme is the latest addition to sitated by the complexity of the chip set. Then, the VAX 6000 family, the Model 400. With its multi- John Croll, Larry Camilli, and Tony Vaccaro present processing capabilities, this midrange family of a paper on the methods and tools designed to com- systems provides a highly configurable and expand- pletely test the interaction of VAX 6000 Model 400 able computing environment. Because the same system's hardware and softwarc. cabinet, buses, and power systems are used by all In the last two papers, the topic turns to work- family members, systems can easily be upgraded to stations. Tom Furlong, Mike Nielsen, and Neil achieve higher levels of performance. Papers in this Wilhelm provide an overview of the successful issue describe VAX 6000 Model 400 imo\~ationsand project undertaken to build a fast, competitively additions, including a new vector processor and a priced, RJSC-based, ULTRIX workstation, called the higher performance scalar processor module, chip DECstation 3100. The Journal is fortunate also to set design and verification, physical technology have a related paper on compiler optimization in advances, and system test. The second theme com- MSC systems by Larry Weber, vice president, MIPS prises two papers related to Digital's workstation Systems, Inc. MIPS Systems built the RISC chip set development, specifically the DECstation 3100, and incorporated in the DECstation 3100 workstation. compiler optimization in RISC systems. I thank Steve Holrnes of the Midrange Systems Opening this issue is a paper on one of Digital's Business Group for his help in selecting topics on first vector processors. Dave Fenwick, John the Model 400, and Gillian Scholes of Digital and Shakshober, Debra Slater, and Doug Williams Joanne Hasegawa of MIPS Systems, Inc., for their review the design alternatives for the VAXvector help in obtaining the workstation and RlSC papers in GOO0 Model 400 processor and describe its function this issue. units. They then give examples of how the units combine to deliver high performance for computa- tionally intensive applications. The Model 400 also has a new scalar processor, with nearly twice the performance of its prede- cessor, the Model 300. In their paper, Pat Sullivan, Mike Callander, Jim Lundberg, Rebecca Stamm, and Biographies John T. Bartoszek John Bartoszek currently manages the Physical Technology Group within the SDE that is responsible for physical technology applications and product designs.John previously managed the PTG physical technology pro- gram that spawned the physical technology used on the VAX 6000 Model 400 CPU module. He joined Digital in 1981 and has a B.S. in nuclear engineering from Lowell Technological Institute. He holds two patents for thermal control devices. John has authored several papers on spacecraft thermal control, solar energy, and electronics cooling and interconnect technologies. William J. Bowhill As a principal engineer with the Semiconductor Engineer- ing Group, William Bowhill is project leader for an engineering team that is designing an execution unit section of a large CMOS-based microprocessor. He has applied for two patents for his design work on the vector interface and backup control chip on the VAx 6000 Model 400 system. Bill also holds a patent for his work in relation to the Model 400's floating point accelerator chip. He joined Digital in 1985. Bill was educated in Great Britain and received a B.Eng. M(honors) in electronic engineering from Liverpool University. John F. Brown After receiving an M.S.E.E.from Cornell University in 1980, John Brown joined Digital's engineering staff.