Validated Products List, 1995 No. 2
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Intel® IA-64 Architecture Software Developer's Manual
Intel® IA-64 Architecture Software Developer’s Manual Volume 1: IA-64 Application Architecture Revision 1.1 July 2000 Document Number: 245317-002 THIS DOCUMENT IS PROVIDED “AS IS” WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR ANY PARTICULAR PURPOSE, OR ANY WARRANTY OTHERWISE ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE. Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Intel® IA-64 processors may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800- 548-4725, or by visiting Intel’s website at http://developer.intel.com/design/litcentr. -
Validated Products List, 1995 No. 3: Programming Languages, Database
NISTIR 5693 (Supersedes NISTIR 5629) VALIDATED PRODUCTS LIST Volume 1 1995 No. 3 Programming Languages Database Language SQL Graphics POSIX Computer Security Judy B. Kailey Product Data - IGES Editor U.S. DEPARTMENT OF COMMERCE Technology Administration National Institute of Standards and Technology Computer Systems Laboratory Software Standards Validation Group Gaithersburg, MD 20899 July 1995 QC 100 NIST .056 NO. 5693 1995 NISTIR 5693 (Supersedes NISTIR 5629) VALIDATED PRODUCTS LIST Volume 1 1995 No. 3 Programming Languages Database Language SQL Graphics POSIX Computer Security Judy B. Kailey Product Data - IGES Editor U.S. DEPARTMENT OF COMMERCE Technology Administration National Institute of Standards and Technology Computer Systems Laboratory Software Standards Validation Group Gaithersburg, MD 20899 July 1995 (Supersedes April 1995 issue) U.S. DEPARTMENT OF COMMERCE Ronald H. Brown, Secretary TECHNOLOGY ADMINISTRATION Mary L. Good, Under Secretary for Technology NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY Arati Prabhakar, Director FOREWORD The Validated Products List (VPL) identifies information technology products that have been tested for conformance to Federal Information Processing Standards (FIPS) in accordance with Computer Systems Laboratory (CSL) conformance testing procedures, and have a current validation certificate or registered test report. The VPL also contains information about the organizations, test methods and procedures that support the validation programs for the FIPS identified in this document. The VPL includes computer language processors for programming languages COBOL, Fortran, Ada, Pascal, C, M[UMPS], and database language SQL; computer graphic implementations for GKS, COM, PHIGS, and Raster Graphics; operating system implementations for POSIX; Open Systems Interconnection implementations; and computer security implementations for DES, MAC and Key Management. -
The Design and Verification of the Alphastation 600 5-Series Workstation by John H
The Design and Verification of the AlphaStation 600 5-series Workstation by John H. Zurawski, John E. Murray, and Paul J. Lemmon ABSTRACT The AlphaStation 600 5-series workstation is a high-performance, uniprocessor design based on the Alpha 21164 microprocessor and on the PCI bus. Six CMOS ASICs provide high-bandwidth, low-latency interconnects between the CPU, the main memory, and the I/O subsystem. The verification effort used directed, pseudorandom testing on a VERILOG software model. A hardware-based verification technique provided a test throughput that resulted in a significant improvement over software tests. This technique currently involves the use of graphics cards to emulate generic DMA devices. A PCI hardware demon is under development to further enhance the capability of the hardware-based verification. INTRODUCTION The high-performance AlphaStation 600 5-series workstation is based on the fastest Alpha microprocessor to date -- the Alpha 21164.[1] The I/O subsystem uses the 64-bit version of the Peripheral Component Interconnect (PCI) and the Extended Industry Standard Architecture (EISA) bus. The AlphaStation 600 supports three operating systems: Digital UNIX (formerly DEC OSF/1), OpenVMS, and Microsoft's Windows NT. This workstation series uses the DECchip 21171 chip set designed and built by Digital. These chips provide high-bandwidth, low-latency interconnects between the CPU, the main memory, and the PCI bus. This paper describes the architecture and features of the AlphaStation 600 5-series workstation and the DECchip 21171 chip set. The system overview is first presented, followed by a detailed discussion of the chip set. The paper then describes the cache and memory designs, detailing how the memory design evolved from the workstation's requirements. -
UBS Release Notes Version 8.10
Uniplex Release Notes Version 8.10 Manual version: 8.10 Document version: V1.0 COPYRIGHT NOTICE Copyright© 1987-1995 Uniplex Limited. All rights reserved. Unpublished - rights reserved under Copyright Laws. Licensed software and documentation. Use, copy and disclosure restricted by license agreement. ©Copyright 1989-1992, Bitstream Inc. Cambridge, MA. All rights reserved. U.S. Patent No. 5,009,435. ©Copyright 1991-1992, Bitstream Inc. Cambridge, MA. Portions copyright by Data General Corporation (1993) ©Gradient Technologies, Inc. 1991, 1992. ©Hewlett Packard 1988, 1990. Copyright© Harlequin Ltd. 1989, 1990, 1991, 1992. All rights reserved. ©Hewlett-Packard Company 1987-1993. All rights reserved. OpenMail (A.01.00) Copyright© Hewlett-Packard Company 1989, 1990, 1992. Portion Copyright Informix Software, Inc. IXI X.desktop Copyright© 1988-1993, IXI Limited, Cambridge, England. IXI Deskterm Copyright© 1988-1993, IXI Limited, Cambridge, England. Featuring MultiView DeskTerm Copyright© 1990-1992 JSB Computer Systems Ltd. Word for Word, Copyright, Mastersoft, Inc., 1986-1993. Tel: (602)-948-4888 Font Data copyright© The Monotype Corporation Plc 1989. All rights reserved. Copyright© 1990-1991, NBI, Inc. All rights reserved. Created using Netwise SystemTM software. Copyright 1984-1992 Soft-Art, Inc. All rights reserved. Copyrighted work incorporating TypeScalerTM, Copyright© Sun Microsystems Inc. 1989, 1987. All rights reserved. Copyright© VisionWare Ltd. 1989-1992. All Rights Reserved. ©1987-1993 XVT Software Inc. All rights reserved. Uniplex is a trademark of Redwood International Limited in the UK and other countries. onGO, Uniplex II PlusTM, Uniplex Advanced Office SystemTM, Uniplex Advanced GraphicsTM, Uniplex Business SoftwareTM, Uniplex DOSTM, Uniplex DatalinkTM and Uniplex WindowsTM are trademarks of Uniplex Limited. PostScript® is a registered trademark of Adobe Systems Inc. -
Emerging Technologies Multi/Parallel Processing
Emerging Technologies Multi/Parallel Processing Mary C. Kulas New Computing Structures Strategic Relations Group December 1987 For Internal Use Only Copyright @ 1987 by Digital Equipment Corporation. Printed in U.S.A. The information contained herein is confidential and proprietary. It is the property of Digital Equipment Corporation and shall not be reproduced or' copied in whole or in part without written permission. This is an unpublished work protected under the Federal copyright laws. The following are trademarks of Digital Equipment Corporation, Maynard, MA 01754. DECpage LN03 This report was produced by Educational Services with DECpage and the LN03 laser printer. Contents Acknowledgments. 1 Abstract. .. 3 Executive Summary. .. 5 I. Analysis . .. 7 A. The Players . .. 9 1. Number and Status . .. 9 2. Funding. .. 10 3. Strategic Alliances. .. 11 4. Sales. .. 13 a. Revenue/Units Installed . .. 13 h. European Sales. .. 14 B. The Product. .. 15 1. CPUs. .. 15 2. Chip . .. 15 3. Bus. .. 15 4. Vector Processing . .. 16 5. Operating System . .. 16 6. Languages. .. 17 7. Third-Party Applications . .. 18 8. Pricing. .. 18 C. ~BM and Other Major Computer Companies. .. 19 D. Why Success? Why Failure? . .. 21 E. Future Directions. .. 25 II. Company/Product Profiles. .. 27 A. Multi/Parallel Processors . .. 29 1. Alliant . .. 31 2. Astronautics. .. 35 3. Concurrent . .. 37 4. Cydrome. .. 41 5. Eastman Kodak. .. 45 6. Elxsi . .. 47 Contents iii 7. Encore ............... 51 8. Flexible . ... 55 9. Floating Point Systems - M64line ................... 59 10. International Parallel ........................... 61 11. Loral .................................... 63 12. Masscomp ................................. 65 13. Meiko .................................... 67 14. Multiflow. ~ ................................ 69 15. Sequent................................... 71 B. Massively Parallel . 75 1. Ametek.................................... 77 2. Bolt Beranek & Newman Advanced Computers ........... -
Appendix D an Alternative to RISC: the Intel 80X86
D.1 Introduction D-2 D.2 80x86 Registers and Data Addressing Modes D-3 D.3 80x86 Integer Operations D-6 D.4 80x86 Floating-Point Operations D-10 D.5 80x86 Instruction Encoding D-12 D.6 Putting It All Together: Measurements of Instruction Set Usage D-14 D.7 Concluding Remarks D-20 D.8 Historical Perspective and References D-21 D An Alternative to RISC: The Intel 80x86 The x86 isn’t all that complex—it just doesn’t make a lot of sense. Mike Johnson Leader of 80x86 Design at AMD, Microprocessor Report (1994) © 2003 Elsevier Science (USA). All rights reserved. D-2 I Appendix D An Alternative to RISC: The Intel 80x86 D.1 Introduction MIPS was the vision of a single architect. The pieces of this architecture fit nicely together and the whole architecture can be described succinctly. Such is not the case of the 80x86: It is the product of several independent groups who evolved the architecture over 20 years, adding new features to the original instruction set as you might add clothing to a packed bag. Here are important 80x86 milestones: I 1978—The Intel 8086 architecture was announced as an assembly language– compatible extension of the then-successful Intel 8080, an 8-bit microproces- sor. The 8086 is a 16-bit architecture, with all internal registers 16 bits wide. Whereas the 8080 was a straightforward accumulator machine, the 8086 extended the architecture with additional registers. Because nearly every reg- ister has a dedicated use, the 8086 falls somewhere between an accumulator machine and a general-purpose register machine, and can fairly be called an extended accumulator machine. -
Historical Perspective and Further Reading 162.E1
2.21 Historical Perspective and Further Reading 162.e1 2.21 Historical Perspective and Further Reading Th is section surveys the history of in struction set architectures over time, and we give a short history of programming languages and compilers. ISAs include accumulator architectures, general-purpose register architectures, stack architectures, and a brief history of ARMv7 and the x86. We also review the controversial subjects of high-level-language computer architectures and reduced instruction set computer architectures. Th e history of programming languages includes Fortran, Lisp, Algol, C, Cobol, Pascal, Simula, Smalltalk, C+ + , and Java, and the history of compilers includes the key milestones and the pioneers who achieved them. Accumulator Architectures Hardware was precious in the earliest stored-program computers. Consequently, computer pioneers could not aff ord the number of registers found in today’s architectures. In fact, these architectures had a single register for arithmetic instructions. Since all operations would accumulate in one register, it was called the accumulator , and this style of instruction set is given the same name. For example, accumulator Archaic EDSAC in 1949 had a single accumulator. term for register. On-line Th e three-operand format of RISC-V suggests that a single register is at least two use of it as a synonym for registers shy of our needs. Having the accumulator as both a source operand and “register” is a fairly reliable indication that the user the destination of the operation fi lls part of the shortfall, but it still leaves us one has been around quite a operand short. Th at fi nal operand is found in memory. -
SPARC64-III User's Guide
SPARC64-III User’s Guide HAL Computer Systems, Inc. Campbell, California May 1998 Copyright © 1998 HAL Computer Systems, Inc. All rights reserved. This product and related documentation are protected by copyright and distributed under licenses restricting their use, copying, distribution, and decompilation. No part of this product or related documentation may be reproduced in any form by any means without prior written authorization of HAL Computer Systems, Inc., and its licensors, if any. Portions of this product may be derived from the UNIX and Berkeley 4.3 BSD Systems, licensed from UNIX System Laboratories, Inc., a wholly owned subsidiary of Novell, Inc., and the University of California, respectively. RESTRICTED RIGHTS LEGEND: Use, duplication, or disclosure by the United States Government is subject to the restrictions set forth in DFARS 252.227-7013 (c)(1)(ii), FAR 52.227-19, and NASA FAR Supplement. The product described in this book may be protected by one or more U.S. patents, foreign patents, or pending applications. TRADEMARKS HAL, the HAL logo, HyperScalar, and OLIAS are registered trademarks and HAL Computer Systems, Inc. HALstation 300, and Ishmail are trademarks of HAL Computer Systems, Inc. SPARC64 and SPARC64/OS are trademarks of SPARC International, Inc., licensed by SPARC International, Inc., to HAL Computer Systems, Inc. Fujitsu and the Fujitsu logo are trademarks of Fujitsu Limited. All SPARC trademarks, including the SCD Compliant Logo, are trademarks or registered trademarks of SPARC International, Inc. SPARCstation, SPARCserver, SPARCengine, SPARCstorage, SPARCware, SPARCcenter, SPARCclassic, SPARCcluster, SPARCdesign, SPARC811 SPARCprinter, UltraSPARC, microSPARC, SPARCworks, and SPARCompiler are licensed exclusively to Sun Microsystems, Inc. -
DG Users Worldwide to Demon Tration Contact: Impliementation of INFOS Migrate to U IX
'2 ;> o C') c:: C') 1;1:1 o o -=- N ~ IC Wby wait? Get the fmancial aiIcl operational ...."...", in software migration and are a benefits of Open Systems now. plus U/FOS leading international upplier of Open improved functionality with ROBMS-Ievel Sy tem tool to the Data General transaction security - and make mas ive financial community. Our UBB Universal Bu ine savings on redevelopment and retraining. Basic product - nearly 5.000 copies sold to To obtain further detail and arrange a per onal date - has enabled DG users worldwide to demon tration contact: impliementation of INFOS migrate to U IX. And our powerful U/SQL TRA SOFT I C, 1899 Power Ferry Road. Universal Structured Query Language • smooth. rapid migration of your Suite 420, Marietta, GA 30067, USA. operate on a variety of COBOL. BASIC COBOL. Fortran and PUI application Tel: (404) 933 1965 Fax: (404) 933 3464 and ROBMS file type . TRA SOFT LTO , a h Hou e, Oatchet Road, • full INFOS functionality Slough, SL3 7LR, England. • automatic data migration The same - only better Tel: 0753 692332 (Int + 44 753 692332) • choice of AViiO and other major UNIXs With U/FOS you can achieve a mooth. rapid Fax : 0753 69425 I (Int + 44 753 69425 I) migration of your I FOS application to • added functionality and better U IX. and also utilise powerful additional utilities features - including better data compres ion. • API for third party software products better checkpointing and ROBMS-Ievel data TRAN integrity and recovery. SQL reporting i also Portability and Productivity Huge savings on redevelopment planned. -
Computer Conservation Society
Issue Number 88 Winter 2019/20 Computer Conservation Society Aims and Objectives The Computer Conservation Society (CCS) is a co-operative venture between BCS, The Chartered Institute for IT; the Science Museum of London; and the Science and Industry Museum (SIM) in Manchester. The CCS was constituted in September 1989 as a Specialist Group of the British Computer Society. It is thus covered by the Royal Charter and charitable status of BCS. The objects of the Computer Conservation Society (“Society”) are: To promote the conservation, restoration and reconstruction of historic computing systems and to identify existing computing systems which may need to be archived in the future; To develop awareness of the importance of historic computing systems; To develop expertise in the conservation, restoration and reconstruction of historic computing systems; To represent the interests of the Society with other bodies; To promote the study of historic computing systems, their use and the history of the computer industry; To publish information of relevance to these objectives for the information of Society members and the wider public. Membership is open to anyone interested in computer conservation and the history of computing. The CCS is funded and supported by a grant from BCS and from donations. There are a number of active projects on specific computer restorations and early computer technologies and software. Younger people are especially encouraged to take part in order to achieve skills transfer. The CCS also enjoys a close relationship with the National Museum of Computing. Resurrection The Journal of the Computer Conservation Society ISSN 0958-7403 Number 88 Winter 2019/20 Contents Society Activity 2 News Round-Up 9 The Data Curator 10 Paul Cockshott From Tea Shops to Computer Company: The Improbable 15 Story of LEO John Aeberhard Book Review: Early Computing in Britain Ferranti Ltd. -
Programming Languages, Database Language SQL, Graphics, GOSIP
b fl ^ b 2 5 I AH1Q3 NISTIR 4951 (Supersedes NISTIR 4871) VALIDATED PRODUCTS LIST 1992 No. 4 PROGRAMMING LANGUAGES DATABASE LANGUAGE SQL GRAPHICS Judy B. Kailey GOSIP Editor POSIX COMPUTER SECURITY U.S. DEPARTMENT OF COMMERCE Technology Administration National Institute of Standards and Technology Computer Systems Laboratory Software Standards Validation Group Gaithersburg, MD 20899 100 . U56 4951 1992 NIST (Supersedes NISTIR 4871) VALIDATED PRODUCTS LIST 1992 No. 4 PROGRAMMING LANGUAGES DATABASE LANGUAGE SQL GRAPHICS Judy B. Kailey GOSIP Editor POSIX COMPUTER SECURITY U.S. DEPARTMENT OF COMMERCE Technology Administration National Institute of Standards and Technology Computer Systems Laboratory Software Standards Validation Group Gaithersburg, MD 20899 October 1992 (Supersedes July 1992 issue) U.S. DEPARTMENT OF COMMERCE Barbara Hackman Franklin, Secretary TECHNOLOGY ADMINISTRATION Robert M. White, Under Secretary for Technology NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY John W. Lyons, Director - ;,’; '^'i -; _ ^ '’>.£. ; '':k ' ' • ; <tr-f'' "i>: •v'k' I m''M - i*i^ a,)»# ' :,• 4 ie®®;'’’,' ;SJ' v: . I 'i^’i i 'OS -.! FOREWORD The Validated Products List is a collection of registers describing implementations of Federal Information Processing Standards (FTPS) that have been validated for conformance to FTPS. The Validated Products List also contains information about the organizations, test methods and procedures that support the validation programs for the FTPS identified in this document. The Validated Products List is updated quarterly. iii ' ;r,<R^v a;-' i-'r^ . /' ^'^uffoo'*^ ''vCJIt<*bjteV sdT : Jr /' i^iL'.JO 'j,-/5l ':. ;urj ->i: • ' *?> ^r:nT^^'Ad JlSid Uawfoof^ fa«Di)itbiI»V ,, ‘ isbt^u ri il .r^^iytsrH n 'V TABLE OF CONTENTS 1. -
1992 Cern School of Computing
ORGANISATION EUROPEENNE POUR LA RECHERCHE NUCLEAIRE CERN EUROPEAN ORGANIZATION FOR NUCLEAR RESEARCH 1992 CERN SCHOOL OF COMPUTING Scuola Superiore G. Reiss Romoli, L'Aquila, Italy 30 August-12 September 1992 PROCEEDINGS Editor: C. Verkerk GENEVA 1993 © Copyright CERN, Genève, 1993 Propriété littéraire et scientifique réservée Literary and scientific copyrights reserved in pour tous les paya < 11» inonde. Ce document ne all countries of the world. This report, or peut être reproduit ou traduit en tout ou en any part of it. may not be reprinted or trans partie sans l'autorisation écrite du Directeur lated without written permission ol the copy général du CERN, titulaire du droit d'auteur. right holder, the Director-General of CERN. Dans les cas appropriés, et s'il s'agit d'utiliser However, permission will be freely granted for le document à des fins non commerciales, cette appropriate non-commercial use. autorisation sera volontiers accordée. If any patentable invention or registrable Le CERN ne revendique pas la propriété des design is described in the report. CERN makes inventions brevetables et dessins ou modèles no claim to property rights in it but offers i( susceptibles de dépôt qui pourraient être for the free use of research institutions, man décrits dans le présent document ; ceux-ci peu ufacturers and others. CERN, however, may vent être librement utilisés par les instituts de oppose any attempt by a user to claim any recherche, les industriels et autres intéressés. proprietary or patent rights in such inventions Cependant, le CERN se réserve le droit de or designs as may be described in the present s'opposer à toute revendication qu'un usager document.