Design and Control of Unidirectional DC/DC Modular Multilevel Converter for Offshore DC Collection Point: Theoretical Analysis & Experimental Validation He Liu, Mohamed Dahidah, Senior Member, IEEE, James Yu, R. T. Naayagi, Senior Member, IEEE, and Matthew Armstrong

Abstract —This paper presents the design and control of an transmission system, the input parallel output series (IPOS) advanced unidirectional DC/DC Modular Multilevel Converter configuration is commonly preferred [6], which is retained (MMC) which enables the integration of off-shore windfarms for this work as well. There are several papers investigated with the High- (HVDC) transmission SAB/DAB converter as DC collection point for the HVDC system. The proposed converter consists of a single-phase MMC system [7-12]. However, for such a converter, the full soft inverter, coupled with series-connected modules through a medium frequency of multiple secondary switching operation can only be achieved with a limited load windings. The modularity feature of the proposed converter and input voltage range, which substantially limits the enables scalability for different voltage levels. In addition to the efficiency and the performance of the converter due to the galvanic isolation, the transformer also provides stepping gain increased switching losses and electromagnetic interference to the output voltage. The proposed converter shows superior [9].To address this problem, an external large resonant performance in terms of efficiency, losses and devices utilization, inductor is usually connected in series with the transformer to when compared with the most competitive unidirectional extend the soft switching range, but the large inductance has cascaded DC/DC converters such as input series output series a detrimental effect on the performance of the converter since (ISOS) and input parallel output series (IPOS). Furthermore, it results in increased duty cycle losses, as well as a severe unlike the conventional d-q control method, which involves multiple transformations, this paper employs a simple voltage ringing due to the resonance between the inductance proportional resonant (PR) control strategy that directly acts on and the junction capacitance in the converter [10]. The the AC output of the MMC, under the stationary reference concept of using a saturation inductor instead of linear frame. The analytical design along with the simulation and inductor has been discussed in [11], which effectively extends experimentally validated results, confirmed the excellent the soft switching range with lower conduction losses and performance of the proposed converter. without a significant duty cycle loss. However, a large core is required for thermal dissipation, limiting the whole system Index Terms —Modular multilevel converter, DC/DC power density and large-scale applications. In addition, more converter, DC collection point, off-shore windfarm, generalized recently improved soft switching range was achieved by stationary frame regulators, unidirectional DC/DC converters. additional active switches [13-15]. However, the added switches complicate the control and increase the switching I. INTRODUCTION losses, especially for a larger-scale system. High voltage direct current (HVDC) transmission system is Modular Multilevel Converters (MMC) based DC collection a well-established and proven technology for delivering point for HVDC system have received great attention in the large-scale energy over a long distance with less power losses recent years due to their manifold advantages including: and lower reactive power requirements [1]. Large-scale modularity, straightforward scalability, and high-quality offshore wind energy is increasingly growing and the output voltage with low harmonic distortion, etc. A dual interconnection between multiple farms becomes more active MMC based DC/DC converter linked by a medium challenging. Medium-voltage DC collection networks are a frequency transformer, functioning as DC collection point in promising technology for such integration aiming to the HVDC system is proposed in [16-19]. Another variation eliminate the extra conversion stages and improve the system of the modular multilevel converter or else known as reliability [2]. High-voltage high-power DC/DC converters Alternate Arm Converter (AAC) has been also reported in are the key enabler for the DC grid. Various converter [20]. These converters feature bidirectional power flow and topologies have been investigated and reported in the mostly operate with medium frequency aiming to reduce the literature, which can be broadly classified as combined switching losses and the size/volume. However, bidirectional (consisting of multiple converter modules) and modular power transmission capability is unnecessary for the multilevel topologies [3]. proposed offshore windfarm DC collection point, as it Most notably, Dual Active Bridge (DAB) or Single Active contributes to more switching losses and increases the control Bridge (SAB) converter has received a great attention from complicity. the research community due to its distinctive features, such Other variation of high-voltage DC/DC converters have as: galvanic isolation, bidirectional power flow and ability to been also reported in [21-23], where in [22] an LCL based operate with high switching frequency [4]. However, the DC/DC converter is developed using technology. high-voltage and high-power requirements for the DC/DC While it has the capability of bidirectional power flow and converter based HVDC systems, necessitate series and/or DC fault clearance on both sides of the converter, however, parallel combinations at both, the power the conversion ratio of such a converter is limited, which devices and converter modules levels [5]. Furthermore, as the makes it improper for a large-scale HVDC system. Reference requirement for offshore DC collection point is to deliver a [23] introduces a multi-module high-gain and high-voltage high-voltage, facilitating the connection with HVDC transformer-less DC/DC converter using a single-switch and

a single-inductor. However, due to the absence of the obtained through series-connected full-bridge rectifier transformer, this converter lacks electrical isolation feature. modules at the multi-winding secondary side of the On the other hand, a high-efficiency, step-up resonant transformer. It is worth noting that the design is fully modular DC/DC converter for offshore wind farm HVDC system is at both sides and can be easily expanded as required by studied in [24]. The soft-switching technique is applied for all simply adding more modules. The DC output voltage is switches in the converter, therefore, the high switching controlled via controlling the AC voltage of the MMC at the frequency can be used resulting in a smaller volume and primary side and a PR regulator is employed in this paper to weight with lower switching losses. Nevertheless, the lack of perform the overall control of the converter. modularity, not only limits the system from flexible scalability but also increases control complexity and manufacturing cost. The research in this paper aimed at alleviating the abovementioned issues by proposing a unidirectional high voltage modular DC/DC converter, employing MMC at the primary side of a medium frequency transformer. It is noting that the medium voltage obtained from the medium voltage DC/DC converter as shown in Fig.1 are normally in the range of 10kV to 50kV or even higher, dependents on the (a) technology and the layout of the offshore wind farms. In such medium voltage range, the employed MMC at primary side of the proposed converter will not require a large number of SM 1 submodules, which in turns, significantly reduce the cost and SM 2 SM 2 Vdc_ in losses, hence higher efficiency. Furthermore, due to modular SM P SM P design of MMC, the number of submodules can be flexibly 2 changed to meet different input voltage levels requirement. Vdc_ out Meanwhile, the DC voltage is collected at the secondary side n through series-connected -bridge rectifier modules. Due to the use of diode bridge rectifier modules at the secondary Vdc _in SM 1 SM 1 side, the control system is not required. From the compassion 2 in Section IV, the proposed converter shows a superior SM 2 SM 2 performance in terms of efficiency, losses and devices SM N SM N utilization, when compared with the most competitive (b) unidirectional cascaded ISOS and IPOS converters, which Fig.1. (a)Typical schematic diagram of off-shore HVDC transmission system makes it more attractive for this particular application. A and (b) using the proposed high voltage (HV) DC/DC converter functioned control method based on proportional resonant (PR) strategy as DC collection point (red dashed line). is employed for the proposed converter. It should be noted that the proposed converter is just intended for the high B. Mathematical model of the proposed converter voltage DC collection point (HV DC/DC converter) as shown Fig. 2 shows the equivalent circuit of one-leg (Phase A) of in Fig,1 (red dashed line). the MMC, where and are the converter’s DC The rest of the paper is organized as follows: Section II _ _ input voltage and current, respectively. and are the describes the circuit configuration of the proposed DC/DC converter and its operating principle. The power balance upper and lower arm of the cascede submodules of analysis of the MMC at the primary side is presented in Phase A leg, respectively. and are the current of the upper and lower arms, respectively. is the equivalent Section III. Section IV details the losses calculation of the proposed converter and its medium frequency transformer. A output phase voltage as shown in Fig.2(b) and is output AC voltage, respectively. and are circulating current comparison between the proposed converter and the most competitive unidirectional topology based on Single Active and ouput AC current, respectively. Bridge (SAB) DC/DC converters with ISOS and IPOS is also From Fig.2, the upper and lower arm currents of Phase A leg presented in Section IV. A simple control strategy based on can be expressed as: the stationary reference frame, using PR controller is derived (1) = ⁄2 + in Section V. Section VI illustrates selected simulation and (2) = − ⁄2 + experimentally validated results. Finally, the work is where the circulating current, is flowing through both the concluded in Section VII. upper and lower amrs. It should be noted that the circulating current has no effect on II. PROPOSED DC/DC CONVERTER BASED SYSTEM the ouptut phase current and can be expressed as: (3) A. Structure of the proposed converter With reference to (1) and= (2), the+ equation ⁄2 of output AC Fig.1 shows a simplified schematic diagram of a typical current can be expressed in terms of upper and lower arm HVDC offshore windfarm using the proposed modular currents as: DC/DC converter, functioning as high voltage (HV) DC (4) collection point (red dashed line in Fig.1), where a single- Considering n as the neutral =point, −applying the Kirchhoff phase (two-leg) MMC inverter producing a controllable AC voltage is connected at the primary side of a medium frequency (400Hz) transformer. The DC output voltage is

Idc _ in a combination of individual and isolated rectifier modules.

IaP This can be regarded as a series connection of voltage sources SM 1 ( ). Therefore, the total equivalent voltage at , , … , Idc _ in SM 2 VaP the secondary side of the transformer , can be expressed as: Vdc _ in (17) SM P IaP = + + ⋯ + 2 where is the number of rectifier modules at the secondary L Vdc _ in arm V 2 aP V side of the transformer. I a cir n I E n Va cir a I L 2 If the equivelant primary-to-secondary winding turns ratio is I V a arm a dc _ in and the turns ratio of primary to each individual secondary VaN Larm 2 I winding is , the equivelant secondary volatge when it is V SM1 aN dc _ in referred to the primary side can then be given by: 2 V SM 2 aN (18) = = + + ⋯ + SM N Substituting (16) into (18), and with the transformer’s leakage I aN inductance referred to the primary side, the primary (a) (b) referred equivalent circuit of the proposed converter Fig.2. (a) Schematic diagram of the one-leg MMC and (b) its equivalent circuit. converter can be expressed by (19) and schematically represented by Fig.3. Voltage Laws (KVL) for the schematic diagram of one-leg (19) + = − MMC as shown in Fig.2(a) , therefore, the upper and lower voltages can be derived as:

(5) = − − (6) = + − Combining (5) and (6), the output phase voltage can be expressed as:

(7) = − − Fig.3. The equivalent circuit of the proposed converter referred to primary Substituting (4) into (7), the equivalent output phase voltage side. can be given by: (8) C. Voltage and current key-waveforms of the proposed = − = + Therefore, the mathmatical model of the one-leg MMC can converter be derived by rearranging (8) as: For the sake of simplicity and easy understanding, the (9) following are assumed for the MMC at the primary side. 1) = − According to (9), the equivalent circuit of Phase A can be The submodules’ voltages are balanced and - expressed as Fig.2 (b). free. 2) The converter is operating with a unity modulation Similarly, the mathmatical model of the second leg of MMC index. 3) High number of submodules, resulting in a very (i.e. phase B), can be given by: close to sinusoidal AC output waveform. Furthermore, the well-known carrier-phase-shift pulse width modulation (10) (CPS-PWM) [25] technique is used in this work to modulate = − where and are the equivalent output phase voltage and the MMC. output AC voltage of Phase B, respectively and is the ouptut AC current of Phase B. Combining (9) and (10), the mathmatical model of single E V ab phase (two-leg) MMC can be expressed as: dc _ in

(11) 0 θ = ω t − = − − − For simplicity, let: − (12) Vdc _ in = − (13) Vs R t V R Hence, (11) can be re-written =as: − dc _ out t

(14) 0 θ = ω t = − For a single phase (two-leg) MMC, the relationship between − the output current of Phase A and B can be expressed as : Vdc _ out R t (15) ϕ π π where is the transformer primary= = −current of the proposed 0 converter. 2 Substituting (15) into (14), yields: Fig.4. Typical voltage and current key waveforms of the equivalent circuit of the proposed converter with all voltages are referred to primary. (16) = − where the and can be considered as the equivalent With the above assumptions, the ideal primary and primary voltage and primary terminal voltage of the secondary referred voltage waveforms of the proposed transformer, respectively. converter can be represented as in Fig.4, where the power is From Fig.1 the secondary side of the transformer is made of transferred from to i.e. unidirectional power _ _

flow. As discussed in Section II-B above, is the equivalent Owing to the half-cycle symmetry, . secondary AC voltage, which is equal to Therefore, according to (27), the initial current0 = − can be and is the phase shift angle = by which+ the+ calculated as: 0 ⋯ + primary equivalent AC voltage, , leads the secondary _ _ _ (30) 0 = equivalent AC voltage, . Therefore, the ouput power of the proposed converter at any phase shift angle, , can be expressed by: D. Output power of the proposed converter _ (31) = It should be noted that in the analysis below takes the where G is defined as the primary-referred DC voltage gain following two assumptions into account: 1) the AC output of the proposed converter which is equal to _ , waveform is symmetrical and therefore, only half of the cycle G = is considered for the output power derivation. 2) for which is often known as the DC conversion ratio [26]. _ simplicity, the peak value of and are equal to , _ and , respectively, (i.e. ignoring any voltage drop E. Output power characteristics of the proposed converter across_ the circuit components). From Fig.4, the output power can be derived based on the Similar to the conventional Single Active Bridge (SAB) following operational intervals: DC/DC converter [27], pahse shift angle is the point where the primary current, crosses the zero, which means Interval 1 . Using this relationship ( ) gets: ( ): = 0 = 0 As it can be0 noticed ≤ < from Fig.4, during this interval is (32) = equal to the , and its primary refered voltage is Substituting (32) into (31), yields: −_ . Therefore, and can be expressed _ (33) as:− _ = (20) It should be noted that (33) is derived based on the = _ sin assumption of the modulation index M=1, which corresponds (21) to the maximum power transfer capability of the proposed = 0 + − replacing by and substituting (20) into (21), converter. −_ yields: For simplicity, the ouput power is normalized to a base (22) power of _ , which results in: = 0 + 2_ sin + _ According to (22), when , one can get: = (34) = _ where modulation index = sin is introduced cos in oder to = 0 + _ − _ cos + _ ∈ 0,1 (23) get the generalized equation of the ouput power. According to and (22), the output energy during this Fig. 5 illustrates the variation of the normalized power of interval can be obtained by: (34) with respect to phase shift angle (noting that the solid line represents theoretical results and dashed line represents _ simulation results based on parameters in Table V. E = ∗ = − − _ _ (24) Furthermore, it is also clear from the same figure that the _ 0 − power transfer capability of the proposed converter is Interval 2 ( ): influenced by the modulation index M, and the phase shift ≤ < angle , where the highest power is achieved with a unity During this interval, is equal to and _ modulation index. In theory, the maximum output power remains equal to , therefore, can be expressed as: _ sin occurs at the point of _ , for which . = 0 = (25) However, when taking losses of circuit and primary AC = + − voltage (non ideal sinusoidal) into considersion, the Substituting , and = _ = _ sin maximum output power point will deviate from as (23) into with (25) yields, = shown in Fig.5. = 0 + _ − _ cos − (26) 0.6 _ + 2_ Theoretical From (26), at , one can get: M=1 = 0.5 Results M=0.9 Simulation = 0 + 2_ − _ + 2_ 0.4 M=0.8 (27) Results Similarly, the transferred energy during this interval is given 0.3 by: Po(norm) 0.2 _ 0.1 E = ∗ = − 2 0 2_ − 2_ − 2_ sin + _ 0 20 40 60 80 100 +3_ − 20 + 20 − 4_ φ (28) Fig.5. Normalized output power versus pahse shift angle of the proposed Therefore, from (24) and (28), the ouput power of the φ proposed converter can be calcultaed as: converter.

(29) =

III. POWER BALANCE OF THE PROPOSED CONVERTER I IaP aP One of the most challenging aspect of MMC is how to keep VaP Vdc_ in V the submodule voltage controlled. Therefore, it is VaP dc _in 2 2 V kV V I a dc_in very important to analyze and understand the stored energy n a a n Z Ia and the power flow between the submodules and/or the Vdc_ in Vdc _in kV V dc_in converter arms [28-29]. To simplify the analysis, the 2 aN 2 following are assumed: 1) the converter's arm inductance are VaN IaN neglected. 2) only the fundamental component of the MMC IaN AC voltage is considered. 3) only one-leg of MMC converter (a) (b) Fig.6. Equivalent circuit of one-leg MMC (a) balanced energy condition (b) is considered as example. Therefore, the output AC current Unbalanced energy condition and voltage of Phase A can be approximately expressed as: (35) that the consumed power, is caused by biased DC = sin (36) on the AC load. 2 ∙ = sin − ∅ where and are the instantaneous output AC voltage and By substituting of (39) and of (45) into (46), the input its peak value, respectively; and are the instantaneous DC current can be obtained by: output AC current and its peak value, respectively. (47) The equivalent circuit of a balanced one-leg MMC is shown _ = cos ∅ + ∙ in Fig.6 (a), where the upper and lower submodules are Now, substituting (39), (45) and (47) into (43) and (44) modeled as a voltage source. Furthermore, an unbalanced yields: energy across the upper and lower arm causing a DC offset to (48) the output AC voltage, is presented by a DC source denoted = cos ∅ + ∙ + sin − ∅ − by (i.e. k is defined as unbalance factor, (49) = cos ∅ + − sin − ∅ + _ ) in the upper and lower arms as shown in Fig.6k ∈ From the above analysis,∙ the instantaneous power of the (b).−0.1,0.1 upper and lower arms is expressed by: Therefore, applying KVL, the upper and lower arms voltages can respectively be defined by (37) and (38). = × = − sin + ∙ (50) _ (37) cos ∅ + ∙ + sin − ∅ − = − sin + _ _ (38) = + sin − _ = × = + sin − ∙ Let M be the modulation index of the MMC output AC (51) cos ∅ + − sin − ∅ + voltage. Therefore, the peak output voltage of one-leg can be By integrating (50) and∙ (51) over one fundamental period, then given by: one can obtain the energy variation in the upper and lower (39) arms as follows: = _ Rearranging (39), the input DC voltage can be expressed as: (52) = = + cos ∅ − (40) _ = Substituting (40) into (37) and (38) yields: = = − + cos ∅ − (53) (41) Equations (52) and (53) describe the effect of the unbalance = − sin + (42) factor k on the arm energy, where in the case of k=0, the = + sin − average energy transferred to the upper and lower arms over It is well-known that DC voltage offset will produce a DC one cycle is zero, i.e. . However, when , current, denoted by in the upper and lower arms, which is although the transferred energy= in= 0one cycle betweenk upper ≠ 0 caused by the effect of the unbalanced energy. From Fig.6 and lower arms remains zero, i.e. ; but there (b), the upper and lower arms currents can be defined as: will be an unbalanced energy, i.e. + = 0 , which (43) = ≠ 0 causes deviations in submodules capacitor voltage and = _ + sin − ∅ − (44) therefore energy exchange between the upper and lower arms = _ − sin − ∅ + As the introduced unbalanced voltage sources are only DC, is necessary to balance. Furthermore, as the circulating consequently, the resultant currents are DC as well. current influences the charging and discharging of submodule Furthermore, this current flow through the load impedance, capacitors, therefore it is mandatory to control the circulating which is naturally inductive, however only the resistive part current to achieve voltage balance. A voltage balance control of the impedance needs to be considered as the current is a strategy which includes submodule voltage control and arm DC. Therefore, the unbalance DC current in the circuit can average voltage control, is employed for the proposed therefore be calculated by: converter. Since this control method has been well- documented [30], therefore, no further details are given here. _ (45) = where R is the load resistance. IV. LOSSES CALCULATION AND TOPOLOGICAL Neglecting the power losses in the circuit, the power flowing COMPARISON from DC side is equal to the power consumed at the AC side It is very important to demonstrate the superiority of the of MMC. Hence, proposed converter compared to its competitive (46) unidirectional DC/DC converters. For such applications = = _ _ = cos ∅ + 2 ∙ _ where and are the input DC voltage and current, high output voltage is required, therefore, cascaded respectively; is the . It is important to note topologies such as input series output series (ISOS) and cos ∅

Table I Submodule states of MMC states submodule 1 ON OFF Inserted > 0 (charging) 2 ON OFF Inserted < 0 (discharging) V 3 OFF ON 0 By-passed dc_in Vdc_ out 4 OFF ON > 0 0 By-passed < 0

(a)

Vdc _in

Fig. 8 Current definition of a submodule of MMC.

of Phase A as an example, each SM is either inserted or by- Vdc_ out passed, making the voltage of Phase A is either increased or decreased by a SM capacitor voltage, , respectively. When the modulation signal is greater than the carrier signal, is turned on and is turned off, which means SM is by-passed.T However, on theT other hand, when the modulation signal is less than the carrier signal, is turned off and is turned T T (b) on, which means SM is inserted in the circuit. Therefore, if Fig.7. Unidirectional cascaded DC/DC converters (a) input series output the carrier cycle is , then the conduction time of when series (ISOS) (b) input parallel output series (IPOS). the SM is by-passed is equal to accordingT to the derived duty cycle in (54). On the other ∙hand, the conduction input parallel output series (IPOS) as shown in Fig.7 are time of equals to , when the SM is inserted. selected for comparison with the proposed converter. Therefore,T based on1 above − analysis,∙ the current flowing To simplify the analysis, it should be noted that 1) only the through the upper and lower IGBT modules, and , fundamental component of the AC output current of the respectively can be expressed as: converter is considered for the power loss calculation. 2) (55) The power is equally shared between the SAB based = 1 − ∗ (56) submodules in the unidirectional cascaded converters. where is the upper= arm current∗ of Phase A. Furthermore, due to the current flown characteristics of From the operation principle of the MMC, in the normal unidirectional cascaded DC/DC converters (e.g. ISOS/IPOS) circumstances, the input DC current, would be evenly has been well introduced and analyzed in [7-8], hence just distributed between the two legs, and the_ AC output currents taking proposed converter as example to derive its losses of each phase are evenly distributed between the upper and calculation method. the lower arms. Therefore, the upper arm current of Phase A

can be expressed as:

A. Losses calculation of the proposed converter _ (57) = + sin − Since the proposed converter is a unidirectional, therefore, Substituting (54) and (57) into (55) and (56) yields: the losses are calculated only when the MMC operates as an _ (58) inverter, however, it should be noted that in both modes (i.e. = ∗ + sin − rectifier/inverter), the calculation process is the same. _ (59) = ∗ + sin − Furthermore, only the fundamental component of the AC From (58) and (59), the effective and average values of the output voltage of the MMC is considered in the power loss currents flowing through the switches and of SM can calculation. be derived as follows: Since CPS-PWM is utilized to control the switches of the 1) The average current flowing through diode is ： proposed MMC converter, therefore, the duty cycle of all switches is defined by: (60) _ = (54) Substituting (58) into (60) yields: = where M is the modulation index, is the fundamental _ _ (61) _ = + − − angular frequency of the AC output waveform. 2) The square of effective current flowing through diode Table I lists the possible operating modes of the MMC’s is ： submodule (SM) where the currents directions are (62) schematically presented in Fig.8 [28]. Taking the upper arm _ =

Substituting (58) into (62) yields: where and are the SM’s diode and switch _ _ conduction losses, respectively, within one fundamental AC _ _ _ _ = + + + − period, and are the threshold voltages of the diode _ _ _ _ and the switch, respectively, and and are the _ _ − + + + forward conduction resistance of the diode and the switch, _ _ respectively. It is worth noting that the blocking state losses + + (63) are much small compared with the conduction losses, hence are ignored in this analysis. 3) The average current flowing through switch is ： According to [31], the turn-on/off switching losses are (64) approximately proportional with the average current flowing _ = Substituting (58) into (64) yields: through the switch; therefore, the switching losses over one fundamental AC period can be calculated by: _ _ (65) _ = − − − + _ (78) 4) The square of effective current flowing through switch = + ： _ _ is _ (79) = (66) _ _ _ = where is the switching frequency; and are the Substituting (58) into (66) yields: switch’s turn-on and turn-off energy losses, _ _ _ respectively, and are the switch’s reference _ _ _ = − + − + voltage and current, respectively, is the reverse _ _ recovery energy losses of diode, and and are + + + − _ _ the diode’s reference voltage and current, respectively. The _ _ + − values of , , , , , , and _ _ _ _ (67) can be obtained from the datasheet of the particular device. 5) The average current flowing through switch is ： Similarly, the losses of diode bridge rectifier modules at the (68) secondary side can also be calculated using (76) and (79). _ = Substituting (59) into (68) yields: B. Losses evaluation of the medium frequency transformer _ _ (69) _ = + + + 6) The square of effective current flowing through switch In general, there are two types of losses in a transformer, copper losses and core losses. Copper losses are essentially is ： caused by the conductor resistivity; and with the skin and (70) proximity effects, these losses are increased with the _ = Substituting (59) into (70) yields: frequency. However, using Litz wires greatly reduces these effects and therefore for this approximate analysis, the skin _ _ _ and proximity effects will not be considered. Hence, the _ = + + + + copper losses, is defined as: _ _ + + + + (80) = _ _ where, R is the equivalent resistance of the transformer + + windings and is the effective current flowing through (71) these windings. 7) The average current flowing through diode is ： The core losses are proportionally influenced by the (72) maximum flux density, which is an important factor in _ = Substituting (59) into (72) yields: designing a transformer. However, for a given magnetic flux, the flux density is solely determined by the core cross- _ _ (73) _ = − − + − sectional area. In general, the Steinmetz Equation [32] is 8) The square of effective current flowing through diode used to predict the core losses, which can be expressed as is ： follows:

(74) (81) _ = = Substituting (59) into (74) yields: where and are the core losses and core volume, respectively; is the peak core flux density and the _ _ _ _ = − + − − coefficients , , and are given by the properties of the core material. is the AC frequency of the system. _ _ − + + − _ _ C. Comparison between the proposed converter and + + (75) unidirectional cascaded ISOS and IPOS converters The conduction losses are calculated over one fundamental The proposed converter aims to reduce the complexity and AC period using the above-derived average/effective currents, the losses of the DC collecting point converters of the off- using: shore wind farms. Therefore, it is very important to evaluate (76) its performance against other available unidirectional DC/DC _ = _ _ + __ (77) converter topologies. As the natural requirement of such a _ = _ _ + __ converter is boost the voltage at the output side, hence, the

proposed converter is compared with the unidirectional multi- total losses of the proposed converter are much smaller than model, SAB DC/DC converters with ISOS and IPOS the ISOS converter but slightly bigger than the IPOS configurations, reported in [5] [7-8]. converter. However, the number of employed IGBT module Table II presents the parameters of the proposed converter of the IPOS converter is much bigger than the proposed and the two SAB converter systems. For a sensible converter and ISOS converter as shown in Fig.9(b), which comparison, both converters are rated at the same power as would complicate the control system, hence decrease the the proposed converter. Moreover, the three topologies utilize reliability. the same diode-bridge rectifier modules (i.e. unidirectional), connected in series at the secondary side. In this paper, Table II System parameters of the DC/DC converters fourteen diode-bridge rectifier modules are cascaded in series Items Proposed Conventional Conventional Converter Unidirectional Unidirectional to produce an output DC voltage of 140kV. It should be noted ISOS IPOS that each valve of the diode-bridge rectifier module consists Converters Converters of two diodes in series [33], with a voltage blocking Rated power 10MW capability of 5kV, each. Furthermore, the unidirectional ISOS Input DC voltage 15kV and IPOS DC/DC converters are designed with the same Output DC voltage 140kV Total number of 112 56 784 requirement as of the proposed converter (i.e. blocking IGBT modules at the (28*4) (14*4) (14*4*14) voltage capability of each SAB based submodule at primary primary side side is 1.07kV). This necessitates a total of 56 IGBT modules Primary rated IGBT 1.07kV for ISOS converter and 784 IGBT modules for IPOS module voltage Total number of 112 converter at primary side as opposed to 112 IGBT modules Diode modules at (14*8) for the proposed converter. However, it should be noted that the secondary side for the conventional ISOS and IPOS converters, the number Primary rated 1.07kV of converter modules on the primary and the secondary sides submodule voltage are dependent on each other. If higher voltage is required at Secondary rated 5kV diode voltage the output side, then the same number of converter modules Modulation method Sinusoidal pulse width modulation (SPWM) must be added at both side with their associated , carrier-reference 5 hence losses and complexity. However, with the proposed frequency ratio ( = ⁄ = converter, these are independent of each other, where more AC frequency ( ) 400Hz rectifier modules can be added at the secondary side without Switching frequency 2kHz ( ) increasing the number of IGBT modules at the primary side. For a fair comparison, all three topologies are modulated utilizing sinusoidal pulse width modulation (SPWM) with the Table III Parameters of IGBT/Diode same carrier-reference frequency ratio, denoted by (i.e. IGBT/Diode Code Rated Voltage Rated Current , where and are frequency of the triangular FZ1200R12HE4 1.2kV 1.2kA carrier = and⁄ reference waveform, respectively). 400Hz is FZ1600R12HP4 1.2kV 1.6kA selected as the AC fundamental frequency of all these three DC/DC converters. FZ400R12KE4 1.2kV 0.4kA The losses of topologies are also evaluated based on the D1131SH 6.5kV 1.1kA analysis presented in above of Section IV to estimate the efficiency of the topologies across the whole range of the output power. For this purpose, the suitable IGBTs and Table IV Parameters of the medium frequency transformers Diodes for topologies must be selected. As above mentioned, Items Transformer Transformer Transformer for a sensible comparison, all three unidirectional converters for proposed for for are rated at the same power and input/output DC voltage as Converter unidirectional unidirectional ISOS IPOS shown in table II. However, due to the different Converters Converters configurations at primary side of the topologies, the current Required 1 14 14 stress of every single IGBT module is different. Therefore, transformer according to different current stresses, FZ1200R12HE4 numbers IGBT modules [34] considered for the primary IGBT Rated power 10MW 0. 8MW 0. 8MW Rated frequency 400Hz 400 Hz 400 Hz modules of the proposed converter; FZ1600R12HP4 and Rated primary 10kV 1.1kV 10kV FZ400R12KE4 IGBT modules [34] considered for the voltage primary IGBT modules of unidirectional cascaded ISOS and Rated secondary 140kV 10kV 10kV IPOS converters, respectively. Meanwhile, due to the similar voltage configuration at secondary side of all three topologies, Primary equivalent 5.2mΩ 0.66mΩ 54.29mΩ re sistance D1131SH diodes [35] is selected for all of them. Table III Secondary 580mΩ 54.29mΩ 54.29mΩ shows the parameters of selected IGBTs/Diode. equivalent The losses of the medium frequency transformer are resistance calculated based on the parameters tabulated in Table IV, Core material Magnetic alloy 2605SA1 [35] Core coefficients , , which are reported in [36]. The power losses and efficiency for Steinmetz = 1.4 α = 1.47 β = 1.52 of the different topologies are illustrated in Fig.9 and Fig.10, Equation respectively. As expected, the proposed converter shows a Saturated flux 1.56T better performance in many aspects compared with density Core volume unidirectional ISOS and IPOS, especially, in terms of losses 0.21m 0.033m 0.033m and components utilization. From Fig.9 (a), it can get that the

Switching losses Conduction losses Transformer losses

150 100 50

0 Fig.11. Block diagram of implementation of the close loop control. Proposed ISOS IPOS Power Power losses (kW) converter of the employed control method, which is schematically (a) depicted in Fig.11.

Number of IGBT Module Number of Diode t = ∙ sin ∗ ∙ sin + (82) where is the ∙input cos AC error∗ signal, ∙ cos represents e 1000 the unit impulse response under time domain of PI regulator, 800 and donates the convolution product. The output of this ′ ∗ ′ 600 control loop is used as a modulating signal to drive 400 the power switches. 200 Actually, after multiplying with reference signal, sine and 0 Proposed ISOS IPOS cos, the error signal is converted into a DC and AC Number Number of components converter components with two times the fundamental frequency. This is then fed into the PI regulators, which perform the (b) integration to get the steady-state error and also work as a Fig.9 (a) Distribution of the power losses and (b) the number of employed IGBT/Diode of the proposed converter, ISOS and IPOS converters for low-pass filter to extract out the DC signal to achieve a zero operation at rated power 10MW. steady-state error in the stationary reference frame. Applying Laplace transform to (82), yields:

(83) 99.50% = + + − For the conventional PI controller, the Laplace transform of a 99.00% unity impulse response can be described by the following 98.50% equation: Proposed converter 98.00% (84) ISOS = + 97.50% By substituting (84) into (83), the transfer function of the IPOS 97.00% control system with derived generalized integrator can be 0 2 4 6 8 10 12 given as: Ouput Power (MW) ∙ (85) = + where is the proportional constant which is used to Fig.10 Efficiency of the proposed converter (blue line), ISOS (red line) and improve the transient response of the control system, is the IPOS (green line) converters based on different rated power. integral constant and is the resonant frequency of the

derived integrator. Therefore,ω the infinity gain can be achieved when . V. THE OVERALL CONTROL OF THE PROPOSED CONVERTER s = jω B. Theoretical verification of the derived generalized A. Implementation of the closed loop control integrator The MMC converter in the proposed configuration operates To simplify the theoretical verification, the proposed as a voltage source to produce constant amplitude and converter is approximated as an MMC with a simple RL load frequency AC voltage to control the output voltage and ( and ), where the MMC is represented by a unit gain. current produced by the cascaded diode bridge to Fig.12 shows the resultant simplified control system (i.e.in S- facilitate the employment of the HVDC transmission lines. domain). Since the proposed converter is controlled via the Therefore, this section employed a stationary frame regulator, primary MMC only, therefore, the AC voltage is fed back the Proportional Resonant (PR) regulator, which achieves the from the primary side of the transformer and compared with same transient and steady-state performance as a synchronous frame PI regulator [37]. The proposed regulator is applicable its reference value, . Then, the resultant AC voltage error, to the single-phase system. Considering single-phase MMC is divided by the equivalent load ( and ) in the as an example, the implementation of the employed closed circuit to get the AC current error , which is used as an loop control is illustrated in Fig.11. It is realized by input to the generalized integrator, . The output of the multiplying the transfer functions of the conventional functions as the reference signal of the primary AC Proportional Integral ( and ) regulators with the sin and voltage. According to Fig.12, the transfer function of the PI PI cos reference signals. This is applicable for both, steady-state MMC voltage controller from to can be and transient operations as the PI regulator operates under the expressed as: d-q synchronous rotating reference frame [37]. It is worth (86) noting that there is no Park transformation or any other = transformations between the stationary and rotating reference where and are the output and the reference frame involved. Equation (82) describes the implementation

Fig.12. Simplified close loop control block diagram for the primary MMC of the proposed DC/DC converter. voltages of the MMC, respectively and is the transfer function of the generalized integrator, which s is given by

∙ (87) s = + where is set to the fundamental frequency. Substitutingω into (87) yields; = ω ∙ (88) s = + → +∞ Substituting (88) into (86) yields the characteristics of the proposed controller at the fundamental frequency . ω (89) = 1 In order to get a pure sinusoidal without harmonic distortion, the input voltage reference is set to the fundamental frequency component only. Furthermore, (89) reveals that the actual output voltage exactly ω matches its reference value, . This confirms that the proposed voltage controller canω successfully achieve zero steady-state error at the fundamental frequency.

VI. SIMULATION AND EXPERIMENTAL RESULTS A. Simulation results A simulation model of the proposed converter rated at 10 MW/140kV is developed with the tabulated parameters in Table V using MATLAB/SIMULINK to validate the feasibility and the effectiveness of the proposed system and its control system performance. In this paper, the MMC at the primary side is constructed using fourteen half-bridge SMs per arm and there are fourteen series-connected diode-bridge rectifier modules at the secondary side of the transformer. Furthermore, the medium frequency transformer with turn ratios of 1:1:1: :1 is chosen, : : : ⋯ : = ⋯ where and to are the primary winding and the corresponding secondary winding-one to winding-fourteen, Fig.13. (a) Transformer primary terminal voltage waveform , (b) respectively. However, different turns ratio can be also transformer secondary winding-one voltage waveform , (c) transformer considered for different stepping gain if required. secondary winding-two voltage waveform , (d) transformer primary The steady-state voltage and current of the proposed current waveform ,(e) transformer secondary winding-one current waveform , (f) transformer secondary winding-two current waveform . converter, operating at 400Hz is depicted in Fig.13. Since the proposed converter uses MMC at the primary side and diode bridge rectifier modules at the secondary side, the resultant The output DC voltage of the proposed converter is shown primary terminal voltage, and secondary voltages as in Fig.17 and with the given transformer turns ratio in this shaped as multilevel and square waveforms (taking and paper ( 1:1:1: :1), the average : : : ⋯ : = ⋯ as exmaple), respectively. output DC voltage is maintained around 140kV. To demonstrate the effect of unbalance phenomena between ×10 3 the MMC arms, Figs.14 and 15 show the voltage, current and VaP VaN instantaneous power of the upper and lower arms for both, balanced (k=0) and unbalanced (k=0.08) cases, respectively. Fig. 15 shows that the upper arm voltage is charged to a higher-level due to the introduced positive unbalanced factor. Meanwhile, the arm current and the instantaneous power flow become unbalance which will seriously influence the I I converter operation. aP aN The performance of the voltage balance control is demonstrated in Fig.16, where it can be clearly observed that, the capacitor voltages are perfectly controlled, and closed to one-fourteenth of the input DC voltage (i.e. 15kV/14).

The performance of the employed control strategy is further

PaP PaN investigated and confirmed with a step change in the output load ((i.e. 2kΩ to 2.4kΩ). Fig.18 shows the dynamic response of the controller when the load changed at , causing the output current to decrease from 70At to = 60A, 2.5s however the output voltage is perfectly maintained constant, which confirms the effectiveness of the control system. Fig.14. The primary side MMC key-waveforms with balanced state k=0: (a) upper arm voltage and lower arm voltage , (b) upper arm current and lower arm current , (c) upper arm power and lower arm power . ×10 3 VaP VaN

IaN

I aP Fig.18. The output waveforms of the proposed converter under a step change at 2.5s: (a) output DC voltage, (b) output DC current.

Table V Parameters of the simulated system Parameter Value PaN Rated power 10MW Input DC voltage 15kV Output DC voltage 140kV PaP Output load resistor 2000Ω Number of MMC’s SM s per arm 14 Number of diode -bridge rectifier modules 14

Fig.15. The primary side MMC key-waveforms with unbalanced state Transformer ratio 1:14 k=0.08: (a) upper arm voltage and lower arm voltage , (b) upper arm SM capacitor of MMC 2.2mF current and lower arm current , (c) upper arm power and lower Arm Inductor 1mH arm power . Output capacitor 3mF Output inductor 1mH Switching frequency 2kHz AC fundamental frequency 400Hz

B. Experimental validation Low voltage scaled down laboratory prototype is developed to validate and confirm the simulation and the theoretical

studies of the proposed converter and the performance of the control strategies. Table VI summarizes the main parameters of the test-rig. The scaled down laboratory prototype and its schematic diagram are illustrated in Fig.19. It is worth noting that the proposed converter is intended for high-voltage high- power applications; therefore, the simulation is presented for (b) t/s close-to-reality systems. However, implementing such a Fig.16. Upper and lower submodule voltages. system in the laboratory is not feasible from the safety and the resources point of view, therefore scaled down prototype is developed as a proof of concept and to validate the proposed control methods and their effectiveness. The scaled down prototype is developed with the following considerations: • The one-leg MMC is used for the primary side of the test-rig, instead of using single-phase MMC, (e.g.,

two-legs) as shown in the simulation. This will help to reduce the number of submodules (only 3 SMs) and the control complexity of the test-rig but satisfy the validation of the proposed topology and its control strategy. • Likewise, as the proposed converter is modular at both sides, only 2 diode-bridge rectifier models are Fig.17. The output waveforms of the proposed converter under steady-state considered at the secondary side, which is enough to operation: (a) output DC voltage, (b) output DC current. accommodate the requirement of the designed

prototype. Once again, due to the modularity waveform is equal to the peak value). Furthermore, the feature, this can be easily extended as presented in current and voltage stresses of the diode bridge rectifier the simulation, if resources are available. modules will be further reduced if higher number of modules • As it can be seen from Fig.19, the test-rig is are considered. Fig. 20(c) shows the experimental output DC developed using the six drive circuit boards, seven voltage and current waveforms of the proposed converter, voltage sensors, three current sensors, A/D Sample- which are perfectly smooth and regulated at the required Interface board, and TMS320F28335DSP control value, confirming the effectiveness of the proposed control board. However, in real applications, where a large system. number of submodules is required, different Fig.21 shows the performance of the submodule voltage arrangement maybe needed, which include a higher balance control, where it can be seen that the capacitor number of control boards, more sophisticated voltages are well balanced and closed to one third of the DC controllers such as DSP, FPGA, and CPLD to meet input voltage (i.e. 23V). Meanwhile, the voltage ripple of these requirements. In general, most of large-scale each submodule is relatively small. control systems are built by the company, such as The dynamic performance of the system is experimentally ABB and SIEMENS. validated as well, a step change to the load is applied causing the output power to decrease from 84W to 44W. This can be clearly seen from Fig.22, where the primary peak current changes from (peak value of primary _ = 8.2A current) to (peak value of primary current _ = 4.5A after a step change) as a response to the variations of the output side load. At the same time, primary peak terminal voltage, remains controlled at , which _ 30V effectively demonstrates the excellent performance of the primary voltage control strategy. Consequently, the output DC current quickly decreased from 2.1A to 1.1A and DC voltage remains at 40V, as illustrated in Fig.22 (b). This further verify the effectiveness of the proposed system and its control strategy.

(a)

Voltage/Current Measurements

3 x Drive Circuit Board

SM 2 Vdc_in SM 3 2 (a) (2ms/div ) L arm A/D Sample and Vdc_ out Interface Board n

Larm Host PC Vdc_in SM 1 DSP DSP TMS320F28335 2 SM 2 3 x Drive Circuit Board SM 3

Voltage/Current Measurements (b) Fig .19 (a)Scaled down laboratory prototype and its (b) schematic diagram. (b) (2ms/div )

Fig.20 shows the steady-state performance of the proposed converter. The 400Hz AC voltages at primary and secondary are shown in Fig. 20(a), and the corresponding currents at primary and the secondary side windings are depicted in Fig.20(b). It is worth noting that the peak of secondary currents is just half of the primary one (i.e. _ = ), which effectively reduce the _ = _ = 4.1A current rating of the associated diode bridge rectifier (c) (10ms/div ) submodules. This can be further reduced if more windings on Fig.20 Under steady state, (a) transformer primary terminal voltage the secondary side are considered. The Root Mean Square (40V/div ), secondary winding-one voltage , and winding-two voltage (20V/div ), (b) transformer primary current (10A/div ), secondary (RMS ) value of the primary terminal voltage is stepped up by winding-one current , and winding-two current (5A/div ), (c) proposed a transformer with turn ratios of 1 from converter output DC current (5A/div ) and voltage (40V/div ). : : = 1: 1: _ _ to _ = = 21V _ = _ + _ = √ , (noting that: the RMS value of the square 19V + 19V = 38V

VII. CONCLUSION A modular unidirectional DC/DC converter based offshore DC collecting point is presented in this paper. The proposed converter utilized the state-of-the-art MMC at the primary side of a medium frequency transformer and cascaded diode- bridge rectifier modules at the secondary side. The converter design features modularity, expandability, galvanic isolation, less losses, lower device voltage and current ratings, and (a) (10ms/div ) higher efficiency. Detailed theoretical design analysis is presented and parameters that effect the operation of the converter are defined and thoroughly discussed. This includes the energy management between the MMC arms and submodules, power balancing, the power transfer capability of the converter, converter and transformer losses calculation, and comparative study with a competitive circuit topology. As expected, the proposed converter shows superior performance in terms of efficiency, losses and devices

(b) (10ms/div ) utilization, when compared with the most competitive Fig.21 Under steady state, (a) upper arm voltages , and unidirectional cascaded ISOS and IPOS converters, which (10V/div ), (b) lower arm submodule voltages , and makes it more attractive for this particular application. An (10V/div ). advanced stationary frame regulator, the Proportional Resonant (PR) regulator, which achieves the same transient

and steady-state performance as a synchronous frame PI regulator along with other sub-control loops including submodule voltage balance control and circulation current suppression is employed for the proposed converter. The employed control strategy abolishes all complexity associated with the multiple transformations required for the conventional d-q synchronous reference frame methods. The employed generalized controller directly acts on the AC single of the primary side, avoiding complex transformation (a) (10ms/div ) and providing robustness against system variations. The performance of the proposed converter and its control strategy is validated through various simulation and experimentally verified results.

APPENDIX 1) The parameter of the submodule capacitor is determined by [38] [39]: (90) C = ∆ ⁄ ∆ Where is the capacitance of the submodule capacitor; (b) (10ms/div ) is the energy variations in the arms; N is submodule Fig.22 Dynamic response, (a) transformer primary terminal voltage ∆ (30V/div ) and current (10A/div ), (b) proposed converter output DC voltage number per arm; is voltage ripple of submodule (40V/div ) and current (1A/div ). capacitor; is average∆ voltage of submodule capacitor. _ _

Table VI Parameters of the experimental setup 2) The parameter of the arm inductor is determined by [40] Parameter Value [41]: Rated power 80W Input DC voltage 70V Output load resistor 20Ω A. Taking reducing fault current as criterion: Primary side AC peak voltage of transformer 35V (91) Submodule numbers of MMC per arm 3 = Submodule numbers of combined converter 2 Where ; is the submodule capacitor Transformer ratio 1:1:1 = = Submodule capacitor of MMC 2.2mF voltage; N is the submodule number per arm. Inductance of per arm 1mH Output capacitor 3mF B. Taking suppressing circulating current as criterion: Output inductor 1mH (92) Switching frequency 2000Hz _ = ∙∙ + AC frequency 400Hz Where is the allowed value of second order arm current Sampling rate (F28335) 20kHz component; is the fundamental angular frequency; C is the

submodule capacitance; is the submodule capacitor voltage; is the apparent power of the converter. is the input DC voltage. _

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