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Birthing the Computer Birthing the Computer Birthing the Computer: From Relays to Vacuum Tubes By Stephen H. Kaisler, D.Sc. Birthing the Computer: From Relays to Vacuum Tubes Series: Historical Computing Machine Series By Stephen H. Kaisler, D.Sc. This book first published 2016 Cambridge Scholars Publishing Lady Stephenson Library, Newcastle upon Tyne, NE6 2PA, UK British Library Cataloguing in Publication Data A catalogue record for this book is available from the British Library Copyright © 2016 by Stephen H. Kaisler, D.Sc. All rights for this book reserved. No part of this book may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopying, recording or otherwise, without the prior permission of the copyright owner. ISBN (10): 1-4438-9778-7 ISBN (13): 978-1-4438-9778-5 CONTENTS List of Figures............................................................................................ xv List of Tables ............................................................................................ xix Part I ............................................................................................................ 1 Precursor Machines Chapter One ................................................................................................. 3 Konrad Zuse’s Computers 1.1 The Z1 .............................................................................................. 5 1.2 The Z2 .............................................................................................. 6 1.3 The Z3 .............................................................................................. 7 1.3.1 Z3 Architecture ....................................................................... 9 1.3.2 Memory ................................................................................. 10 1.3.3 Floating Point Registers ........................................................ 10 1.3.4 Input and Output .................................................................... 10 1.3.5 Instruction Execution ............................................................ 11 1.3.6 Instruction Set ....................................................................... 11 1.3.7 Programming the Z3 .............................................................. 12 1.3.8 Z3 Assessment ....................................................................... 12 1.4 The Z4 ............................................................................................ 13 1.4.1 ETH and the Z4 ..................................................................... 14 1.4.2 The Z5 ................................................................................... 15 1.5 Plankalkul ...................................................................................... 16 1.6 The Z11 .......................................................................................... 17 1.7 The Z22 .......................................................................................... 19 1.8 The Z23 .......................................................................................... 20 1.9 The Z31 .......................................................................................... 21 1.10 Assessment of Zuse’s Computing Machines ................................. 22 Chapter Two .............................................................................................. 24 The Atanasoff-Berry Computer 2.1 ABC System Architecture ............................................................... 24 2.2 The Atanasoff-Mauchly Conflict .................................................... 27 vi Contents 2.3 The ABC Reconstructed ................................................................. 28 2.4 ABC Assessment ............................................................................. 28 Chapter Three ............................................................................................ 30 Stibitz’s Relay Computers 3.1 Model I: The Complex Numerical Calculator ................................ 32 3.2 Model II: The Relay Interpolator ................................................... 33 3.3 Model III: The Ballistic Computer ................................................. 34 3.4 Model IV: The Error Detector Mark II .......................................... 35 3.5 Model V .......................................................................................... 35 3.6 Model VI ........................................................................................ 36 3.7 Later BTL Machines ...................................................................... 37 3.8 Assessment of Stibitz’s Relay Computers ....................................... 37 Chapter Four .............................................................................................. 39 Colossus 4.1 Rebuilding Colossus ....................................................................... 44 4.2 Colossus Architecture .................................................................... 46 4.3 Colossus and Code Breaking ......................................................... 47 4.4 Assessment of Colossus .................................................................. 49 Chapter Five .............................................................................................. 51 Aiken’s ASCC/Mark I 5.1 ASCC System Architecture ............................................................. 54 5.1.1 Automatic Sequence Unit ...................................................... 54 5.1.2 Arithmetic Calculations ......................................................... 55 5.1.3 Interpolators .......................................................................... 55 5.1.4 Special Registers ................................................................... 56 5.2 I/O System ...................................................................................... 56 5.3 Programming the ASCC ................................................................ 56 5.4 ASCC Assessment .......................................................................... 57 Chapter Six ................................................................................................ 59 Harvard Mark Machines 6.1 Mark II ........................................................................................... 59 6.2 Mark III .......................................................................................... 61 6.3 Mark IV .......................................................................................... 63 6.4 Mark Machines Assessment ........................................................... 63 Birthing the Computer: From Relays to Vacuum Tubes vii Chapter Seven ............................................................................................ 64 IBM’s Selective Sequence Electronic Calculator 7.1 SSEC System Architecture ............................................................. 66 7.1.1 Electronic Storage Units ........................................................ 67 7.1.2 Relay Storage ........................................................................ 67 7.1.3 Tape Storage .......................................................................... 67 7.1.4 Dial Storage ........................................................................... 67 7.1.5 Pluggable Storage .................................................................. 67 7.1.6 Program Tapes ....................................................................... 68 7.2 SSEC Reliability ............................................................................. 69 7.3 SSEC Assessment ........................................................................... 70 Chapter Eight ............................................................................................. 72 Who Invented the Computer? Further Reading ......................................................................................... 73 Exercises for the Reader ............................................................................ 76 Part II ......................................................................................................... 79 Pre-Stored Program Machines Chapter Nine .............................................................................................. 80 ENIAC 9.1 ENIAC System Architecture ........................................................... 84 9.1.1 Accumulators ........................................................................ 85 9.1.2 Control Units ......................................................................... 86 9.1.3 Master Programmer ............................................................... 86 9.1.4 Arithmetic Units .................................................................... 86 9.1.5 Constant Transmitter ............................................................. 87 9.1.6 Function Table ....................................................................... 87 9.1.7 Input/Output Units ................................................................. 87 9.2 Later Modifications ........................................................................ 88 9.3 Applying ENIAC ............................................................................ 88 9.4 The ENIAC Women ........................................................................ 89 9.5 Myths and Stories About ENIAC .................................................... 90 9.6 Assessment of ENIAC ....................................................................
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