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Key Parameters Key Parameters Key ADC Specifications • Static Specifications – Offset / Full-scale / Gain – Differential Non-linearity (DNL) / Integral Non-linearity (INL) – No Missing Codes • Dynamic Specifications – Signal to Noise Ration (SNR) – Spurious Free Dynamic Range (SFDR) – Total Harmonic Distortion (THD) / SIgnal to Noise And Distortion (SINAD) – Effective Number Of Bits (ENOB) 2 Key DAC Specifications • Static Specifications – Zero-Code / Offset / Full-scale / Gain – Differential Non-linearity (DNL) / Integral Non-linearity (INL) – Monotonicity • Dynamic Specifications – Glitch impulse – Settling time – Update rate 3 Offset Error Offset error is the difference in voltage between the ideal first code transition and the actual code transition of an ADC, respectively the difference to the reference at code 000xxx in case of a DAC Ideal FS 3/4 FS Positive Offset Analog Output error Voltage 1/2 FS 1/4 FS 0 000 001 010 011 100 101 110 111 Digital Input Code 4 Gain Error (Full Scale Error) Gain Error = Full-scale Error - Offset Error Positive Gain Ideal error FS 3/4 FS Analog Output Voltage 1/2 FS Negative Gain 1/4 FS error 0 000 001 010 011 100 101 110 111 Digital Input Code 5 Differential Nonlinearity (DNL): A DNL error beyond +/-1LSB can cause missing codes in an ADC or Non-Monotonic behavior of a DAC.. FS 3/4 FS Analog Output Voltage 1/2 FS 1/4 FS Ideal 0 000 001 010 011 100 101 110 111 Digital Input Code 6 DAC Monotonicity Non-monotonic FS Non-monotonic DAC’s are not 3/4 FS appropriate Analog for control loop Output Voltage 1/2 FS Applications! 1/4 FS Ideal DNL < -1 0 000 001 010 011 100 101 110 111 Digital Input Code 7 Integral Nonlinearity INL An INL error is the maximum deviation of a transition point from the corresponding point of the ideal transfer curve, with the measured offset and gain errors zeroed. FS Positive 3/4 FS INL error Analog Output Voltage 1/2 FS 1/4 FS Ideal 0 000 001 010 011 100 101 110 111 Digital Input Code 8 AC Applications Six popular specifications for quantifying ADC dynamic performance are: • SINAD (signal-to-noise-and-distortion ratio), • ENOB (effective number of bits), • SNR (signal-to-noise ratio), • THD (total harmonic distortion), • THD + N (total harmonic distortion plus noise), • SFDR (spurious free dynamic range). 9 Spurious-Free Dynamic Range (SFDR) SFDR = ratio RMS value of the signal to RMS value of worst spur 10 Signal-to-Noise Ratio (SNR) ⎛ [] ⎞ = value of Fs input rms SNRdB 20log10 ⎜ ⎟ ⎝ value of quantization noise[]rms ⎠ N = ()= ⎡q2 ⎤ ()π Fs INPUT v t ⎢ ⎥ sin 2 ft ⎣ 2 ⎦ q2N RMS Value of FSinewave = s 2 2 q RMS Value of Quantization Noise = 12 SNR = 6.02N +1,76dB 11 THD and THD+N Total harmonic distortion (plus noise): power ratio of single tone vs. sum of harmonics THD+N includes Noise as well ⎛ 2 2 2 2 ⎞ ()A []+ A []+ + A []+ Noise [] HD2 rms HD3 rms K HDn rms rms THD + N = 20log ⎜ 10 ⎜ ⎜ A [] ⎝ fin rms ⎠ 12 Signal-to-Noise and Distortion Ratio (SINAD) and ENOB SINAD = ratio of RMS signal vs. mean of the root-sum-squares (RSS) of all other spectral components ENOB is calculated from SINAD (SINAD – 1.76) ENOB = 6.02 13 dBc vs dBFS • dBc – measurement made relative to the carrier power • dBFS – measurement made relative to the converter’s Full Scale – full scale is 0dBFS, but it is common to use -1dBFS, allowing some headroom in case there is noise or a slight DC shift 14 ADC Clock Rates • ADC clock rates: usually specified as xSPS • analog input frequency: specified in Hz • But, xSPS is still xHz • 100MSPS = 100MHz clock • 1GSPS = 1GHz clock • 100kSPS = 100 kHz clock. 15 Settling Time Determines Bandwidth Final Value Settling Time, Output Initial Value DEAD SLEW RECOVERY TIME TIME TIME TIME LINEAR SETTLING Settling Time, Input-to-Output 16 Settling Time vs. Update Rate • Settling time: the time the output takes to reach the final state – usually given in a unit of time. • Update Rate: the speed of the interface – usually given in a unit of frequency, Hz or SPS • Settling time should be shorter than the period time, otherwise dynamic performance suffers, in particular at full-scale-swings 17 Glitch Impulse Defined Glitch-impulse Glitch-impulse Area, G Area, G1 Voltage (V) 2 Voltage (V) Code: 8000 Code: 8000 Code: 7FFF Code: 7FFF time (s) time (s) Glitch-impulse Area, G1 Glitch-impulse = G2 –G1 Glitch-impulse = G1 a.) b.) 18.
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