Learning from 3D NAND

Storage Class Memory: Learning from 3D NAND

Siva Sivaram EVP of Memory Technology, Western Digital Corporation

August 9, 2016

This presentation contains forward-looking statements that involve risks and uncertainties, including, but not limited to, statements regarding our product and technology positioning, the anticipated benefits of our new technologies and transitioning into 3D NAND. Forward-looking statements should not be read as a guarantee of future performance or results, and will not necessarily be accurate indications of the times at, or by, which such performance or results will be achieved, if at all. Forward-looking statements are subject to risks and uncertainties that could cause actual performance or results to differ materially from those expressed in or suggested by the forward-looking statements.

Additional key risks and uncertainties include the impact of continued uncertainty and volatility in global economic conditions; actions by competitors; difficulties associated with go-to-market capabilities and transitioning into 3D NAND; business conditions; growth in our markets; and pricing trends and fluctuations in average selling prices. More information about the other risks and uncertainties that could affect our business are listed in our filings with the Securities and Exchange Commission (the “SEC”) and available on the SEC’s website at www.sec.gov, including our and SanDisk’s most recently filed periodic reports, to which your attention is directed. We do not undertake any obligation to publicly update or revise any forward-looking statement, whether as a result of new information, future developments or otherwise, except as otherwise required by law.

Bringing the Possibilities of Data to Life

$18.3

$15.9 1

$11.2 $11.2 $10.3

$5.5

LTM Revenue LTM $4.8 $3.4 $2.5

(Information (Storage & (NAND) (NAND) Storage) Memory) (NAND) (NAND)

1 LTM revenues based on most recent public filings and Wall Street research; Western Digital and SanDisk LTM as of 4/1/2016; Toshiba represents March 2016 LTM revenue.

Source: IDC Digital Universe Study, sponsored by EMC, December 2012

Core Core Core Shared DRAM HDD Register L1 Cache L2 Cache L3 Cache

Source: Western Digital estimates

Conventional Applications BIG DATA Applications

Hits

Access <1% misses Misses >90% misses Cache Cache

Compute 10% data 96% data Energy / transfer Memory transfer Access System TimeConsumption

Source: S.Wong, CCD 2015 presentation

100G Ethernet

Pooled SCM SRAM / DRAM / eDRAM DDR MRAM

Server Nodes SCM Controller DDR / New eDRAM SCM CPU / SCM DDR / Controller Server Nodes CS New SSD PCIe-NVMe TM NAND AP CNTLR SCM Server Nodes

Pooled Flash

JBOD

1,000,000 DRAM

100,000 )/L 2 10,000 NAND x2 NAND x3

1,000

Cell size (nm 30X

100

10 2000 2005 2010 2015 2020

Source: Western Digital estimates

Core Core Core Shared DRAM HDD Register L1 Cache L2 Cache L3 Cache

Source: Western Digital estimates

SCM

2016 2017 2018 2019 2020 2021

Source: Western Digital estimates

1.E-02 Storage HDD 1.E-03

1.E-04

(sec) NAND 1.E-05 CBRAM 1.E-06 ReRAM PCM 1.E-07 Embedded Access Time Time Access Storage-Class DRAM 1.E-08 Memory STT-MRAM ReRAM Memory SRAM 1.E-09 0.01 0.1 1 10 Die Cost ($/GB)

Non-Volatile Volatile

1Gb, X2-160nm 2Gb, X2-130nm OVER 4Gb, X2-90nm 8Gb, X2-70nm 50,000X Cumulative cost reduction 16Gb, X3-56nm over 20 years* 32Gb, X3-43nm 64Gb, Cost Cost X3-32nm 64Gb, X3 24nm128Gb, X3 19nm 128Gb, X3 1Ynm 128Gb, X3 1Znm

2001 2003 2005 2007 2009 2011 2013 2015 2017 2020

Note: Images are not to scale *Based on historical SanDisk NAND pricing 1992*

Number of wafers Eiffel Tower Burj Khalifa Mount Fuji produced in 2016 984ft 2717ft 12,388ft In Yokkaichi

BL Floating Gate Source BL Contact (memory cell) Plate

WL SGD SGS

NAND String Si-sub

©2016 Western Digital Corporation or its affiliates. All rights reserved. 16 Case Study Scaling Stopped the Music 2D NAND for 2D NAND! è 3D NAND Transition − Cost of lithography − Density of electron storage in the floating gate − Proximity effects from adjacent cells

3D NAND: A necessary revolution

Gate Control Gate

Poly-Si Body SG

SGD

SGS

Memory Holes Source Plate Memory Cell

WL Direction BL Direction Effect Proximity

4X nm 3X nm 2X nm 1X nm BiCS

World’s first 64-layer Capacities up to 512Gb 3D NAND architecture on a single chip

Smallest 256Gb chip OEM sampling in the in the industry current quarter; retail shipments expected in calendar Q4 2016 NAND Cost Scaling Continues

64L 48L

24L

BiCS5 BiCS4 BiCS3 BiCS1 BiCS2

Industry 2D NAND vs. 3D NAND Bit Output

100%

75% 2D 3D

50% Industry bit 2D NAND cross-over 3D NAND 25% in mid-2017

2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020

©2016 Western Digital Corporation or its affiliates. All rights reserved. 23 Cost Cost Scalingfor SCM Market Adoption ReRAM & 3DXP greenfield greenfield & 3DXP ReRAM Note: Technologytransition cadence assumed 18 months for all technologies Cost ($/GB) [LogScale] 2016 ~2x 2017 fabs , NAND & DRAM existing existing & DRAM NAND , 2018 21 Western or All CorporationrightsDigital ©2016affiliates.its reserved. 2019 fabs 2020 DRAM BiCS SCM 2021 ** 13 nm: assumes EUV EUV 13 assumes @ ** 1.4x nm: * DRAM data source: IDC ASPforecast with 45% GM assumed 2022 2023 ~ i - ArF 20x capex cost, 2160 w/day 2024 2025 24 3D Technologies for SCM

3D XPoint 3D NAND • Cell and Materials • Selector • Process Architecture • Product • Ecosystem

8-layer 32Gb, 24nm, 2-layer 3D cross-point array memory 3D cross-point array ReRAM ca. 2002 2013

Latency & Endurance

Lower Cost 3D Ecosystem Support ReRAM Scalability Scale & Capital with 3D Efficiency

ReRAM is Western Digital’s Choice for SCM

Western Digital + SanDisk: A leading combination

Data explosion enabled by edge devices

3D NAND: A revolution underway

Lower latency memory component needed for data-centric computing

3D ReRAM is a scalable SCM solution