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Musings RIK FARROWOPINION
Musings RIK FARROWOPINION Rik is the editor of ;login:. While preparing this issue of ;login:, I found myself falling down a rabbit hole, like [email protected] Alice in Wonderland . And when I hit bottom, all I could do was look around and puzzle about what I discovered there . My adventures started with a casual com- ment, made by an ex-Cray Research employee, about the design of current super- computers . He told me that today’s supercomputers cannot perform some of the tasks that they are designed for, and used weather forecasting as his example . I was stunned . Could this be true? Or was I just being dragged down some fictional rabbit hole? I decided to learn more about supercomputer history . Supercomputers It is humbling to learn about the early history of computer design . Things we take for granted, such as pipelining instructions and vector processing, were impor- tant inventions in the 1970s . The first supercomputers were built from discrete components—that is, transistors soldered to circuit boards—and had clock speeds in the tens of nanoseconds . To put that in real terms, the Control Data Corpora- tion’s (CDC) 7600 had a clock cycle of 27 .5 ns, or in today’s terms, 36 4. MHz . This was CDC’s second supercomputer (the 6600 was first), but included instruction pipelining, an invention of Seymour Cray . The CDC 7600 peaked at 36 MFLOPS, but generally got 10 MFLOPS with carefully tuned code . The other cool thing about the CDC 7600 was that it broke down at least once a day . -
Mi!!Lxlosalamos SCIENTIFIC LABORATORY
LA=8902-MS C3b ClC-l 4 REPORT COLLECTION REPRODUCTION COPY VAXNMS Benchmarking 1-’ > .— u) 9 g .— mi!!lxLOS ALAMOS SCIENTIFIC LABORATORY Post Office Box 1663 Los Alamos. New Mexico 87545 — wAifiimative Action/Equal Opportunity Employer b . l)lS(”L,\l\ll K “Thisreport wm prcpmd J, an xcttunt ,,1”wurk ,pmwrd by an dgmcy d the tlnitwl SIdtcs (kvcm. mm:. Ncit her t hc llniml SIJIL.. ( Lwcrnmcm nor any .gcncy tlhmd. nor my 08”Ihcif cmployccs. makci my wur,nly. mprcss w mphd. or JwImL.s m> lcg.d Iululity ur rcspmuhdily ltw Ilw w.cur- acy. .vmplctcncs. w uscftthtc>. ttt”any ml’ormdt ml. dpprdl us. prudu.i. w proccw didowd. or rep. resent%Ihd IIS us wuukl not mfrm$e priwtcly mvnd rqdtts. Itcl”crmcti herein 10 my sp.xi!l tom. mrcial ptotlucr. prtxcm. or S.rvskc hy tdc mmw. Irdcnmrl.. nmu(a.lurm. or dwrwi~.. does nut mmwsuily mnstitutc or reply its mdursmwnt. rccummcnddton. or favorin: by the llniwd States (“mvcmment ormy qxncy thctcd. rhc V!C$VSmd opinmm d .mthor% qmxd herein do nut net’. UMrily r;~lt or died lhow. ol”the llnttcd SIJIL.S( ;ovwnnwnt or my ugcncy lhure of. UNITED STATES .. DEPARTMENT OF ENERGY CONTRACT W-7405 -ENG. 36 . ... LA-8902-MS UC-32 Issued: July 1981 G- . VAX/VMS Benchmarking Larry Creel —. I . .._- -- ----- ,. .- .-. .: .- ,.. .. ., ..,..: , .. .., . ... ..... - .-, ..:. .. *._–: - . VAX/VMS BENCHMARKING by Larry Creel ABSTRACT Primary emphasis in this report is on the perform- ance of three Digital Equipment Corporation VAX-11/780 computers at the Los Alamos National Laboratory. Programs used in the study are part of the Laboratory’s set of benchmark programs. -
HDF-EOS Interface Based on HDF5, Volume 2: Function Reference Guide Was Prepared Under the EOSDIS Evolution and Development-2 Contract (NNG15HZ39C)
This page intentionally left blank. Preface This document is a Users Guide for HDF-EOS (Hierarchical Data Format - Earth Observing System) library tools. The version described in this document is HDF-EOS Version 5.1.16. The software is based on HDF5, a new version of HDF provided by by The HDF Group. HDF5 is a complete rewrite of the earlier HDF4 version, containing a different data model and user interface. HDF-EOS V5.1.16 incorporates HDF5, and keeps the familier HDF4-based interface. There are a few exceptions and these exceptions are described in this document. Note that the major functional difference is that Version 5.1.16 of the HDF-EOS library is a thread-safe. HDF is the scientific data format standard selected by NASA as the baseline standard for EOS. This Users Guide accompanies Version 5.1.16 software, which is available to the user community on the EDHS1 server. This library is aimed at EOS data producers and consumers, who will develop their data into increasingly higher order products. These products range from calibrated Level 1 to Level 4 model data. The primary use of the HDF-EOS library will be to create structures for associating geolocation data with their associated science data. This association is specified by producers through use of the supplied library. Most EOS data products which have been identified, fall into categories of Point, Grid, Swath or Zonal Average structures, the latter two of which are implemented in the current version of the library. Services based on geolocation information will be built on HDF-EOS structures. -
Cielo Computational Environment Usage Model
Cielo Computational Environment Usage Model With Mappings to ACE Requirements for the General Availability User Environment Capabilities Release Version 1.1 Version 1.0: Bob Tomlinson, John Cerutti, Robert A. Ballance (Eds.) Version 1.1: Manuel Vigil, Jeffrey Johnson, Karen Haskell, Robert A. Ballance (Eds.) Prepared by the Alliance for Computing at Extreme Scale (ACES), a partnership of Los Alamos National Laboratory and Sandia National Laboratories. Approved for public release, unlimited dissemination LA-UR-12-24015 July 2012 Los Alamos National Laboratory Sandia National Laboratories Disclaimer Unless otherwise indicated, this information has been authored by an employee or employees of the Los Alamos National Security, LLC. (LANS), operator of the Los Alamos National Laboratory under Contract No. DE-AC52-06NA25396 with the U.S. Department of Energy. The U.S. Government has rights to use, reproduce, and distribute this information. The public may copy and use this information without charge, provided that this Notice and any statement of authorship are reproduced on all copies. Neither the Government nor LANS makes any warranty, express or implied, or assumes any liability or responsibility for the use of this information. Bob Tomlinson – Los Alamos National Laboratory John H. Cerutti – Los Alamos National Laboratory Robert A. Ballance – Sandia National Laboratories Karen H. Haskell – Sandia National Laboratories (Editors) Cray, LibSci, and PathScale are federally registered trademarks. Cray Apprentice2, Cray Apprentice2 Desktop, Cray C++ Compiling System, Cray Fortran Compiler, Cray Linux Environment, Cray SHMEM, Cray XE, Cray XE6, Cray XT, Cray XTm, Cray XT3, Cray XT4, Cray XT5, Cray XT5h, Cray XT5m, Cray XT6, Cray XT6m, CrayDoc, CrayPort, CRInform, Gemini, Libsci and UNICOS/lc are trademarks of Cray Inc. -
EOS: a Project to Investigate the Design and Construction of Real-Time Distributed Embedded Operating Systems
c EOS: A Project to Investigate the Design and Construction of Real-Time Distributed Embedded Operating Systems. * (hASA-CR-18G971) EOS: A PbCJECZ 10 187-26577 INVESTIGATE TEE CESIGI AND CCES!I&CCIXOti OF GEBL-1IIBE DISZEIEOTEO EWBEECIC CEERATIN6 SPSTEI!!S Bid-Year lieport, 1QE7 (Illinois Unclas Gniv.) 246 p Avail: AlIS BC All/!!P A01 63/62 00362E8 Principal Investigator: R. H. Campbell. Research Assistants: Ray B. Essick, Gary Johnston, Kevin Kenny, p Vince Russo. i Software Systems Research Group University of Illinois at Urbana-Champaign Department of Computer Science 1304 West Springfield Avenue Urbana, Illinois 61801-2987 (217) 333-0215 TABLE OF CONTENTS 1. Introduction. ........................................................................................................................... 1 2. Choices .................................................................................................................................... 1 3. CLASP .................................................................................................................................... 2 4. Path Pascal Release ................................................................................................................. 4 5. The Choices Interface Compiler ................................................................................................ 4 8. Summary ................................................................................................................................. 5 ABSTRACT: Project EOS is studying the problems -
Final Report and Recommendation on New
CERN LIBRARIES, GENEVA CERN/FC/661 Original: English 5 December, 1963 CM-P00085196 ORGANISATION EUROPĒENNE POUR LA RECHERCHE NUCLĒAIRE CERN EUROPEAN ORGANIZATION FOR NUCLEAR RESEARCH FINANCE COMMITTEE Fifty-sixth Meeting Geneva - 16 December, 1963 FINAL REPORT AND RECOMMENDATION ON NEW COMPUTERS FOR CERN This paper contains the results of the enquiries and studies unfinished at the time of the meeting of the Finance Committee, on 13 November, together with the Director-General's conclusions and request to the Finance Committee to authorize CERN to purchase a CDC 6600 computer for delivery early in 1965. 7752/e CERN/FC/661 FINAL REPORT AND RECOMMENDATION ON NEW COMPUTERS FOR CERN 1. Introduction The Finance Committee, at its meeting, on 13 November, discussed an interim report on CERN's computing needs (CERN/FC/653), which accompanied the Report of the European Committee on the Future Computing Needs of CERN, CERN/516 (hereinafter referred to as "the Report"). Since then, the final offers from manufacturers have been received and evaluated, and the outstanding technical studies referred to in the conclusion of the Interim Report (section 5) have been carried out. This paper contains: - a short report on the results of these technical studies, - the evaluation of the final offers, technically and financially, - a proposal for financing the purchase of the new computer, - the implications on the CERN budget and programme of a new computer, - the conclusion, with a request that the Finance Committee authorize CERN to purchase a CDC 6600 computer and to raise a loan for the necessary amount, - an annex containing prices and other material from the offers. -
Lecture 14 Data Level Parallelism (2) EEC 171 Parallel Architectures John Owens UC Davis Credits • © John Owens / UC Davis 2007–9
Lecture 14 Data Level Parallelism (2) EEC 171 Parallel Architectures John Owens UC Davis Credits • © John Owens / UC Davis 2007–9. • Thanks to many sources for slide material: Computer Organization and Design (Patterson & Hennessy) © 2005, Computer Architecture (Hennessy & Patterson) © 2007, Inside the Machine (Jon Stokes) © 2007, © Dan Connors / University of Colorado 2007, © Kathy Yelick / UCB 2007, © Wen-Mei Hwu/David Kirk, University of Illinois 2007, © David Patterson / UCB 2003–7, © John Lazzaro / UCB 2006, © Mary Jane Irwin / Penn State 2005, © John Kubiatowicz / UCB 2002, © Krste Asinovic/Arvind / MIT 2002, © Morgan Kaufmann Publishers 1998. Outline • Vector machines (Cray 1) • Vector complexities • Massively parallel machines (Thinking Machines CM-2) • Parallel algorithms Vector Processing • Appendix F & slides by Krste Asanovic, MIT Supercomputers • Definition of a supercomputer: • Fastest machine in world at given task • A device to turn a compute-bound problem into an I/O bound problem • Any machine costing $30M+ • Any machine designed by Seymour Cray • CDC 6600 (Cray, 1964) regarded as first supercomputer Seymour Cray • “Anyone can build a fast CPU. The trick is to build a fast system.” • When asked what kind of CAD tools he used for the Cray-1, Cray said that he liked “#3 pencils with quadrille pads”. Cray recommended using the backs of the pages so that the lines were not so dominant. • When he was told that Apple Computer had just bought a Cray to help design the next Apple Macintosh, Cray commented that he had just bought -
An HDF-EOS and Data Formatting Primer for the ECS Project
175-WP-001-002 An HDF-EOS and Data Formatting Primer for the ECS Project White Paper March 2001 Prepared Under Contract NAS5-60000 RESPONSIBLE ENGINEER E. M. Taaheri /s/ 3-1-2001 David Wynne, Abe Taaheri Date EOSDIS Core System Project SUBMITTED BY Larry Klein /s/ 2-28-2001 Darryl Arrington, Manager Toolkit Date Larry Klein, Manager Toolkit EOSDIS Core System Project Raytheon Company Upper Marlboro, Maryland This page intentionally left blank. Abstract This document is a release of a primer manual for using the Hierarchical Data Format (HDF) and extensions (HDF-EOS) in Earth Observing System (EOS), Version 1 and later. We confine our discussion in this document to HDF V4 and the versions of HDF-EOS (V2), which are based on that version of HDF. A new version of HDF (V5) has been released. Additional material for HDF5 and versions of HDF-EOS, based on HDF5 will be provided in a separate document. Comments and suggestions should be sent to: Larry Klein Emergent Information Technologies 9315 Largo Dr. West, Suite 250 Largo, MD 20774 USA Email: [email protected] Phone: (301) 925-0764 Fax: (301) 925-0321 Keywords: HDF, HDF-EOS, Swath, Grid, Point, Data Formats, Metadata, Standard Data Products, Disk Formats, Browse iii 175-WP-001-002 This page intentionally left blank. iv 175-WP-001-002 Table of Contents Abstract 1. Introduction 1.1 Purpose of this Document.......................................................................................... 1-1 1.2 Organization of this Document .................................................................................. 1-1 1.3 HDF and EOS: Introduction ...................................................................................... 1-1 1.4 HDF and EOS: General Philosophy........................................................................... 1-3 2. -
Seymour Cray: the Father of World Supercomputer
History Research 2019; 7(1): 1-6 http://www.sciencepublishinggroup.com/j/history doi: 10.11648/j.history.20190701.11 ISSN: 2376-6700 (Print); ISSN: 2376-6719 (Online) Seymour Cray: The Father of World Supercomputer Si Hongwei Department of the History of Science, Tsinghua University, Beijing, China Email address: To cite this article: Si Hongwei. Seymour Cray: The Father of World Supercomputer. History Research. Vol. 7, No. 1, 2019, pp. 1-6. doi: 10.11648/j.history.20190701.11 Received : May 14, 2019; Accepted : June 13, 2019; Published : June 26, 2019 Abstract: Seymour R. Cray was an American engineer and supercomputer developer who designed a series of the fastest computers in the world in 1960-1980s. The difference between Cray and most other corporate engineers is that he often won those business battles. His success was attributable to his existence in a postwar culture where engineers were valued. He was able to also part of an extraordinary industry where revolutionary developments were encouraged, and even necessary. Lastly Cray is recognized as "the father of world supercomputer". From the perspective of science and technology history, this paper describes the history of Cray and his development of supercomputer. It also sums up his innovative ideas and scientific spirit. It provides a reference for supercomputer enthusiasts and peers in the history of computer research. Keywords: Seymour R. Cray, Supercomputer, Science and Technology History 1. Introduction 2. The Genius Seymour Supercomputer refers to the most advanced electronic computer system with the most advanced technology, the Seymour Cray was born on September 28th, 1925 in the fastest computing speed, the largest storage capacity and the town of Chippewa, Wisconsin. -
CHAPTER 1 Introduction
CHAPTER 1 Introduction 1.1 Overview 1 1.2 The Main Components of a Computer 3 1.3 An Example System: Wading through the Jargon 4 1.4 Standards Organizations 15 1.5 Historical Development 16 1.5.1 Generation Zero: Mechanical Calculating Machines (1642–1945) 17 1.5.2 The First Generation: Vacuum Tube Computers (1945–1953) 19 1.5.3 The Second Generation: Transistorized Computers (1954–1965) 23 1.5.4 The Third Generation: Integrated Circuit Computers (1965–1980) 26 1.5.5 The Fourth Generation: VLSI Computers (1980–????) 26 1.5.6 Moore’s Law 30 1.6 The Computer Level Hierarchy 31 1.7 The von Neumann Model 34 1.8 Non-von Neumann Models 37 Chapter Summary 40 CMPS375 Class Notes (Chap01) Page 1 / 11 by Kuo-pao Yang 1.1 Overview 1 • Computer Organization o We must become familiar with how various circuits and components fit together to create working computer system. o How does a computer work? • Computer Architecture: o It focuses on the structure and behavior of the computer and refers to the logical aspects of system implementation as seen by the programmer. o Computer architecture includes many elements such as instruction sets and formats, operation code, data types, the number and types of registers, addressing modes, main memory access methods, and various I/O mechanisms. o How do I design a computer? • The computer architecture for a given machine is the combination of its hardware components plus its instruction set architecture (ISA). • The ISA is the agreed-upon interface between all the software that runs on the machine and the hardware that executes it. -
A Look at Some Compilers MATERIALS from the DRAGON BOOK and WIKIPEDIA MICHAEL WOLLOWSKI
2/11/20 A Look at some Compilers MATERIALS FROM THE DRAGON BOOK AND WIKIPEDIA MICHAEL WOLLOWSKI EQN oTakes inputs like “E sub 1” and produces commands for text formatter TROFF to produce “E1” 1 2/11/20 EQN EQN oTreating EQN as a language and applying compiler technologies has several benefits: oEase of implementation. oLanguage evolution. In response to user needs 2 2/11/20 Pascal Developed by Nicolas Wirth. Generated machine code for the CDC 6000 series machines To increase portability, the Pascal-P compiler generates P-code for an abstract stack machine. One pass recursive-descent compiler Storage is organized into 4 areas: ◦ Code for procedures ◦ Constants ◦ Stack for activation records ◦ Heap for data allocated by the new operator. Procedures may be nested, hence, activation record for a procedure contains both access and control links. CDC 6000 series The first member of the CDC 6000 series Was the supercomputer CDC 6600, Designed by Seymour Cray and James E. Thornton Introduced in September 1964 Performed up to three million instructions per second, three times faster than the IBM Stretch, the speed champion for the previous couple of years. It remained the fastest machine for five years until the CDC 7600 Was launched. The machine Was Freon refrigerant cooled. Control Data manufactured about 100 machines of this type, selling for $6 to $10 million each. 3 2/11/20 CDC 6000 series By Steve Jurvetson from Menlo Park, USA - Flickr, CC BY 2.0, https://commons.Wikimedia.org/w/index.php?curid=1114605 CDC 205 CDC 205 DKRZ 4 2/11/20 CDC 205 CDC 205 Wiring, davdata.nl Pascal 5 2/11/20 Pascal One of the compiler Writers states about the use of a one-pass compiler: ◦ Easy to implement ◦ Imposes severe restrictions on the quality of the generated code and suffers from relatively high storage requirements. -
VHSIC and ETA10
VHSIC and The First CMOS and Only Cryogenically Cooled Super Computer David Bondurant Former Honeywell Solid State Electronics Division VHSIC System Applications Manager ETA10 Supercomputer at MET Office - UK’s National Weather Forecasting Service Sources • “Very High Speed Integrated Circuits (VHSIC) Final Program Report 1980-1990, VHSIC Program Office”, Office of the Under Secretary of Defense for Acquisition, Deputy Director, Defense Research and Engineering for Research and Advanced Technology, September 30, 1990 • Carlson, Sullivan, Bach, and Resnick, “The ETA10 Liquid-Nitrogen-Cooled Supercomputer System”, IEEE Transactions on Electron Devices, Vol. 36, No. 8, August 1989. • Cummings and Chase, “High Density Packaging for Supercomputers” • Tony Vacca, “First Hand: The First CMOS And The Only Cryogenically Cooled Supercomputer”, ethw.org • Robert Peglar, “The ETA Era or How to (Mis-)Manage a Company According to Control Data Corp.”, April 17, 1990 Background • I graduated from Missouri S&T in May 1971 • My first job was at Control Data Corporation, the leading Supercomputer Company • I worked in Memory Development • CDC 7600 was in production, 8600 (Cray 1) was in development by Seymour Cray in Chippewa Falls, WI • Star 100 Vector Processor was in Development in Arden Hills • I was assigned to the development of the first DRAM Memory Module for a CDC Supercomputer • I designed the DRAM Module Tester Using ECL Logic Control Data Corporation Arden Hills • First DRAM Module was 4Kx32 using 128 1K DRAM Development Center - June 1971 Chips