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CENTRAL PROCESSOR INSTRUCTION EXECUTION TIMES (Times Listed in Minor Cycles) BRANCH UNIT I_- a, STOP 36 INTEGER SUM of XI and Xk to Xi 3 01 RETURN JUMP to K 14 37 INTEGER DIFFERENCE of Xj and Xk to Xi 3 02 GO TO K + BI (Note 1) 14 030 GO TO K if XI = zero 99 03 1 GO TO K if XI # zero 9. 9" 032 GO TO K if XI = positive 44 FLOATING DIVIDE XJ by Xk to Xi 9' 29 033 GO TO K if XI = negative Note 45 ROUND FLOATING DIVIDE Xi by Xk to Xi 9' 29 034 GO TO K if XI IS in range 2 46 PASS - GO TO K if XI is out of range 9* 035 47 SUM of 1's in Xk to XI a 036 GO TO K if XI is definite 9" 037 GO TO K if XI is indefinite 94 04 GO TO K if Bi = BI 8' 05 GO TO K if Bi # B) Note 8* 40 FLOATING PRODUCT of XI and Xk to Xi 06 GO TO K if Bi 2 BI 1 8O 10 41 ROUND FLOATING PRODUCT of XI and Xk to Xi 07 GO TO K if BI <: BI 8* 10 42 FLOATING DP PRODUCT of XI and Xk to Xi 10 INCREMENT UNIT* - 50 SUM of A1 and K to Ai 3 51 SUM of €3) and K to Ai 3 52 SUM of XI and K to Ai 3 53 SUM of XI and Bk to At 3 54 SUM of A1 and Bk to Ai 3 10 TRANSMIT XI to XI 3 55 DIFFERENCE of AI and Bk to Ai 3 11 LOGICAL PRODUCT of XI and Xk to Xi 3 56 SUM of B1 and Bk to 21 3 12 LOGICAL SUM of XI and Xk to Xi 3 57 DIFFERENCE of B1 and Bk to 21 3 13 LOGICAL DIFFERENCE of Xj and Xk to XI 3 14 TRANSMIT Xk COMP to Xi 3 60 SUM of A1 and K to Bi 3 15 LOGICAL PRODUCT of XJ and Xk COMP to Xi 3 61 SUM of B] and K to Bi 3 16 LOGICAL SUM of XI and Xk COMP to Xi 3 62 SUM of XI and K to Bi 3 17 LOGICAL DIFFERENCE of XI and Xk COMP to Xi 3 63 SUM of XI and Bk to Bi 3 64 SUM of A1 and Bk to BI 3 65 DIFFERENCE of A] and Bk to Bi SHIFT UNIT 3 66 SUM of BI and Bk to Bi 3 67 DIFFERENCE of BJand Bk to BI 20 SHIFT XI LEFT lk places 3 21 SHIFT Xi RIGHT lk places 70 SUM of A1 and K to Xi 22 SHlFT XI NOMINALLY LEFT Bj places 3 71 SUM of BJ and to Xi 23 SHIFT XI NOMINALLY RIGHT 81 places K 3 24 NORMALIZE Xk in Xi and BJ 72 SUM of XI and K to XI 3 73 25 ROUND AND NORMALIZE Xk in XI and BJ SUM of XI and Bk to Xi 3 26 UNPACK Xk to Xi and BJ 74 SUM of A] and Bk to Xi 3 27 PACK XI from Xk and BJ 75 DIFFERENCE of At and Bk to XI 3 43 FORM Ik MASK in Xi 76 SUM of Bj and Bk to XI 3 -77 DIFFERENCE of BJand Bk to XI 3 ADD UNIT 'Duplexed units-instruction goes to free unit 30 FLOATING SUM of XI and Xk to XI Octal Code at left of instruction 31 FLOATING DIFFERENCE of XI and Xk to Xi Cornp-Complement 32 FLOATING DP SUM of XI and Xk to XI DP-Double Precision 33 FLOATING DP DIFFERENCE of XJ and Xk to Xi 34 ROUND FLOATING SUM of XJ and Xk to Xi 35 ROUND FLOATING DIFFERENCE of XI and Xk to Xi 4 DCSlGN OF A COMPUTfR THE CONTROL DATA 6600 In the editorial series of MALCOLM C. HARRISON Courant Institute of Mathematical Sciences New York University ! DESIGN Of A COMPUTtR CON J. E. THORNTON Vice President Advanced Design Laboratory Control Data Corporation SCOTT, FORESMAN AND COMPANY The type on the cover and title page of Design of a Computer- The Control Data 6600 is a sample of the 6600 display lettering. The display unit contains two cathode ray tubes and a manual keyboard. Information is displayed in alphabetic and numeric symbols which are formed on the surface of each tube. The symbols are then traced out or “painted” on the phosphor of each CRT by the action of its electron beam. Control of the beam forthis purpose is provided by electrostatic deflection in two dimensions, horizontal and vertical. A symbol is painted by electronically converting from the symbol, as it is stored in .the computer, to deflection voltages applied to CRT. The letters appearing on the cover of this book were photographed from the display unit. Library of Congress Catalog Number 74-96462 Copyright 01970 by Scott, Foresman and Company, Glenview, Illinois 60025. Philippines Copyright 1970 by Scott, Foresman and Company. All Rights Reserved. Printed in the United States of America. Regional offices of Scott, Foresman and Company are located in Atlanta, Dallas, Glenview, Palo Alto, Oakland, N.J., and London, England. FOREWORD In spite of the large number of computing systems which have been de- signed and are in use today there is no clear-cut optimum approach to a gen- eral purpose computing system. Rather, it would seem, we are just begin- ning to explore the really basic variations from the one address sequential machines that launched the digital computing industry. Early in digital computer history circuit technology advanced so rapidly that giant strides were made in equipment performance with little variation in design structure. The very presence of this rapid technological advance discouraged exploration of system struct we. Electrical circuits tend to in- teract with system organization, and a good system design could become obsolete in a short period of time because the associated electrical circuits had been passed by. In the early 1960's electrical circuit performance began to stabilize with the advent of integrated circuit technology. Circuit speed improvement continued but at a somewhat lower rate. In addition the integrated circuit offered the alternative of using larger quantities of mass produced configura- tions for the same cost as might be obtained by brute force efforts at speed in serial processors. System design then began to diverge into parallel structures. This book describes one of the early machines attempting to explore parallelism in electrical structure without abandoning the serial structure of the com- puter programs. Yet to be explored are parallel machines with wholly new programming philosophies in which serial execution of a single program is abandoned. A book describing the characteristics of a modern large-scale digital computer is a challenging undertaking. There is more detail information to be presented than is possible in a single volume. An overview of the system without being specific is generally too vague to convey the important char- acteristics that are of real interest. The author in this book selects special areas for detail treatment where those areas are unique to the machine de- scribed. These are interconnected with a general description of the system as a whole. The reader can rest assured that the material presented is accurate and from the best authority as Mr. Thornton was personally responsible for most of the detailed design of the Control Data model 6600 system. SEYMOUR R. CRAY 'Vice President and General Manager Chippewa Laboratory TABLE OF CONTENTS 1. INTRODUCTION 1 A. Justification for Large Computers 1 B. Building Blocks 4 C. The Approach 5 11. ORGANIZATION OF THE 6600 9 A. General 9 B. Peripheral Subsystem 10 C. Central Processor-CPU 12 D. Central Storage 15 E. Extended Core Storage 17 111. BASIC CIRCUIT PROPERTIES 19 A. The Silicon Transistor 19 B. DCTL Logic Circuits 21 C. Logic Symbols 24 D. Transmission Lines 28 E. Packaging 32 IV. CENTRAL STORAGE SYSTEM 37 A. Storage Module 37 B. Theory of Interleaved Storage 44 C. Stunt Box 47 D. Storage Bus System 51 E. Extended Core Storage 53 F. ECS Coupler and Controller 55 V. CENTRAL PROCESSOR FUNCTIONAL UNITS 57 A. Boolean Unit 59 B. Fixed Add Unit 63 C. Data Trunks 69 D. Shift Unit 71 E. Add Unit 77 F. Multiply Unit 88 G. Divide Unit 101 H. Increment Unit 105 I. Branch Unit 111 J. ECS Coupler-Controller 114 VI. CENTRAL PROCESSOR CONTROL 117 A. Exchange Jump 117 B. Instruction Fetch 120 C. Instruction Issue 123 D. Scoreboard 125 E. Register Entry/Exit Control 134 F. Summary 137 VII. PERIPHERAL SUBSYSTEM 141 A. Peripheral Processors 141 B. Dead Start 154 C. Disk Storage 157 VIII. SYSTEMS OPERATION 163 A. Files 163 B. Tables 165 C. Circular Buffer for 1/0 166 D. Job Processing 167 E. System Monitor MTR 168 F. Control Points 169 G. Summary 171 APPENDIX 173 INDE:X 177 TRODUCTION Reduction to practice is a desirable and necessary test of any theory. The growing body of theory and understanding about digital computation is no exception. Particularly evident in recent years are attempts to define new organization or architecture of digital computers which offer significant performance improvement. Of interest are theories involving simultaneous or concurrent Computation, sometimes called functional parallelism, sub- function concurrency, multiprocessing, and so on. ‘This book is offered as a “case study” of a major digital computer which has reduced to practice a number of interesting theories involving parallelism and concurrency.

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