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Armv6-M Architecture Reference Manual

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Armv6-M Architecture Reference Manual ARMv6-M Architecture Reference Manual Copyright © 2007-2008, 2010 ARM Limited. All rights reserved. ARM DDI 0419C (ID092410) ARMv6-M Architecture Reference Manual Copyright © 2007-2008, 2010 ARM Limited. All rights reserved. Release Information The following changes have been made to this document. Change History Date Issue Confidentiality Change March 2007 A Non-Confidential First release September 2008 B Non-Confidential, Restricted Access Additions to the System Control Block, power management support, corrections to errata and clarifications September 2010 C Non-confidential Additions to describe the Unprivileged/Privileged Extension and the Protected Memory System Architecture (PMSA) Extension. Also extensive clarification and reorganization. Proprietary Notice This ARM Architecture Reference Manual is protected by copyright and the practice or implementation of the information herein may be protected by one or more patents or pending applications. No part of this ARM Architecture Reference Manual may be reproduced in any form by any means without the express prior written permission of ARM. No license, express or implied, by estoppel or otherwise to any intellectual property rights is granted by this ARM Architecture Reference Manual. Your access to the information in this ARM Architecture Reference Manual is conditional upon your acceptance that you will not use or permit others to use the information for the purposes of determining whether implementations of the ARM architecture infringe any third party patents. This ARM Architecture Reference Manual is provided “as is”. ARM makes no representations or warranties, either express or implied, included but not limited to, warranties of merchantability, fitness for a particular purpose, or non-infringement, that the content of this ARM Architecture Reference Manual is suitable for any particular purpose or that any practice or implementation of the contents of the ARM Architecture Reference Manual will not infringe any third party patents, copyrights, trade secrets, or other rights. This ARM Architecture Reference Manual may include technical inaccuracies or typographical errors. To the extent not prohibited by law, in no event will ARM be liable for any damages, including without limitation any direct loss, lost revenue, lost profits or data, special, indirect, consequential, incidental or punitive damages, however caused and regardless of the theory of liability, arising out of or related to any furnishing, practicing, modifying or any use of this ARM Architecture Reference Manual, even if ARM has been advised of the possibility of such damages. Words and logos marked with ® or TM are registered trademarks or trademarks of ARM Limited, except as otherwise stated below in this proprietary notice. Other brands and names mentioned herein may be the trademarks of their respective owners. Copyright © 2007-2008, 2010 ARM Limited 110 Fulbourn Road Cambridge, England CB1 9NJ Restricted Rights Legend: Use, duplication or disclosure by the United States Government is subject to the restrictions set forth in DFARS 252.227-7013 (c)(1)(ii) and FAR 52.227-19. ii Copyright © 2007-2008, 2010 ARM Limited. All rights reserved. ARM DDI 0419C Non-Confidential ID092410 This document is Non-Confidential but any disclosure by you is subject to you providing notice to and the acceptance by the recipient of, the conditions set out above. In this document, where the term ARM is used to refer to the company it means “ARM or any of its subsidiaries as appropriate”. Note The term ARM is also used to refer to versions of the ARM architecture, for example ARMv6 refers to version 6 of the ARM architecture. The context makes it clear when the term is used in this way. ARM DDI 0419C Copyright © 2007-2008, 2010 ARM Limited. All rights reserved. iii ID092410 Non-Confidential iv Copyright © 2007-2008, 2010 ARM Limited. All rights reserved. ARM DDI 0419C Non-Confidential ID092410 Contents ARMv6-M Architecture Reference Manual Preface About this manual ............................................................................... xvi Using this manual .............................................................................. xvii Conventions ........................................................................................ xix Additional reading ................................................................................ xx Feedback ............................................................................................ xxi Part A Application Level Architecture Chapter A1 Introduction A1.1 About the ARM architecture profiles .............................................. A1-26 A1.2 Privileged and unprivileged execution ............................................ A1-27 Chapter A2 Application Level Programmers’ Model A2.1 About the application level programmers’ model ........................... A2-30 A2.2 ARM processor data types and arithmetic ..................................... A2-31 A2.3 Registers and execution state ........................................................ A2-36 A2.4 Exceptions, faults and interrupts .................................................... A2-39 A2.5 Coprocessor support ...................................................................... A2-40 ARM DDI 0419C Copyright © 2007-2008, 2010 ARM Limited. All rights reserved. v ID092410 Non-Confidential Contents Chapter A3 ARM Architecture Memory Model A3.1 Address space ............................................................................... A3-42 A3.2 Alignment support .......................................................................... A3-43 A3.3 Endian support ............................................................................... A3-44 A3.4 Synchronization and semaphores .................................................. A3-47 A3.5 Memory types and attributes and the memory order model .......... A3-48 A3.6 Access rights .................................................................................. A3-56 A3.7 Memory access order .................................................................... A3-58 A3.8 Caches and memory hierarchy ...................................................... A3-63 Chapter A4 The ARMv6-M Instruction Set A4.1 About the instruction set ................................................................ A4-66 A4.2 Unified Assembler Language ......................................................... A4-68 A4.3 Branch instructions ........................................................................ A4-70 A4.4 Data-processing instructions .......................................................... A4-71 A4.5 Status register access instructions ................................................ A4-74 A4.6 Load and store instructions ............................................................ A4-75 A4.7 Load Multiple and Store Multiple instructions ................................ A4-77 A4.8 Miscellaneous instructions ............................................................. A4-78 A4.9 Exception-generating instructions .................................................. A4-79 Chapter A5 The Thumb Instruction Set Encoding A5.1 Thumb instruction set encoding ..................................................... A5-82 A5.2 16-bit Thumb instruction encoding ................................................. A5-84 A5.3 32-bit Thumb instruction encoding ................................................. A5-91 Chapter A6 Thumb Instruction Details A6.1 Format of instruction descriptions .................................................. A6-94 A6.2 Standard assembler syntax fields .................................................. A6-98 A6.3 Conditional execution ..................................................................... A6-99 A6.4 Shifts applied to a register ........................................................... A6-101 A6.5 Memory accesses ........................................................................ A6-103 A6.6 Hint Instructions ........................................................................... A6-104 A6.7 Alphabetical list of ARMv6-M Thumb instructions ........................ A6-105 Part B System Level Architecture Chapter B1 System Level Programmers’ Model B1.1 Introduction to the system level ................................................... B1-204 B1.2 About the ARMv6-M memory mapped architecture ..................... B1-205 B1.3 Overview of system level terminology and operation ................... B1-206 B1.4 Registers ...................................................................................... B1-211 B1.5 ARMv6-M exception model .......................................................... B1-218 vi Copyright © 2007-2008, 2010 ARM Limited. All rights reserved. ARM DDI 0419C Non-Confidential ID092410 Contents Chapter B2 System Memory Model B2.1 About the system memory model ................................................. B2-246 B2.2 Declarations and support functions .............................................. B2-247 B2.3 Memory accesses ........................................................................ B2-251 B2.4 Control of the endianness model in ARMv6-M ............................. B2-254 B2.5 Barrier support for system correctness ........................................ B2-255 Chapter B3 System Address Map B3.1 The system address map ............................................................. B3-258 B3.2 System Control Space (SCS) ....................................................... B3-262
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