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Master's Thesis Eindhoven University of Technology MASTER Mapping a China Digital Radio (CDR) receiver on a software-defined-radio platform Cheng, Y. Award date: 2017 Link to publication Disclaimer This document contains a student thesis (bachelor's or master's), as authored by a student at Eindhoven University of Technology. Student theses are made available in the TU/e repository upon obtaining the required degree. The grade received is not published on the document as presented in the repository. The required complexity or quality of research of student theses may vary by program, and the required minimum study period may vary in duration. General rights Copyright and moral rights for the publications made accessible in the public portal are retained by the authors and/or other copyright owners and it is a condition of accessing publications that users recognise and abide by the legal requirements associated with these rights. • Users may download and print one copy of any publication from the public portal for the purpose of private study or research. • You may not further distribute the material or use it for any profit-making activity or commercial gain Department of Mathematics and Computer Science Algorithm & Software Innovation Mapping a China Digital Radio (CDR) receiver on a Software-Defined-Radio platform Master Thesis Yan Cheng Supervisors: prof.dr.ir.C.H.(Kees) van Berkel Dr.Hong Li Eindhoven, August 2017 Abstract With the launch of the China Digital Radio (CDR) standard in hundreds of cities in China, CDR radio receiver chips are required in market. To explore fast and efficient embedded Software- Defined-Radio (SDR) CDR receiver design and realization, this thesis project used Data-Flow (DF) modeling to study architectural options of a CDR receiver design for an existing NXP SDR chip. Next to a study on the CDR standard and CDR processing algorithms. The CDR receiver architectural requirements, constrains and options are extracted and analyzed for three receiver use-cases: Single radio, Single radio plus background scanning, and Dual radios to listen to two radio channels simultaneously. Abstract Cyclo Static Data-Flow(CSDF) models of all CDR pro- cessing tasks and Data-flow (DF) graphs for each use-case are established with processing load, states and memory measurements of the tasks, and simulated using a HAPI tool to evaluate architecture options in different CDR transmission modes. With the CSDF modeling and simulation, we have shown that the NXP chip and processing algorithms can support CDR baseband processing in all use-cases when the broadcasting is in QPSK modulation. It has sufficient processing capacity for 16QAM, but cannot support the Dual Radios use-case in 64QAM modulation, although 64QAM is not expected in real broadcasting. The DF simulation shows also the best LDPC decoding options for different transmission config- urations, which allows dynamical selection for the best reception quality according to the detected broadcasting mode in run-time. Mapping a China Digital Radio (CDR) receiver on a Software-Defined-Radio platform iii Chapter 1 Introduction With the technology development in internet and telecommunication, the infotainment behaviors of users have changed dramatically, the traditional analog radio broadcasting are facing more and more challenges. Compared with the traditional analog FM radio, the digital radio can provide new features including: 1. Efficient use of spectrum space 2. More channels and content offering a wider variety of radio services 3. Clear sound quality and clarity 4. Pause and rewind of live radio Many digital radio standards have been launched in different areas of the world, China has also developed own standard - the China Digital Radio (CDR) standard, and now it is being deployed in more than 500 cities in China. 1.1 Project Context Because of the market demand for the CDR receiver chips, a CDR receiver is designed for a Software Defined Radio (SDR) platform in this project. SDR enables a flexible approach to support a wide range of wireless communication standards by function designs and configurations. It can support new standard by updating the software and the reprogrammable logic without making any changes to the hardware platform. However, lots of expert experience and architecture art are required for mapping and schedul- ing functional tasks onto the embedded target platform. Moreover, during searching about an optimized design from a series of options, large amount of quantitative analysis about the demand of each task and available resource on the platform are involved in evaluation of the advantages, disadvantages, potential issues and problems for each option. In order to deal with the complexity and issues arising from the architecture design, model- based analysis is an efficient solution. Complicated systems can be described by mathematical models, which can represent system components and their interactions with their surrounding environment [1]. These models can be used to facilitate different stages in the design procedure, including system simulation, stability analysis, and scheduling on the target platform. Data-flow modeling is a widely used model-based analysis approach for signal processing ap- plications. Many tools can provide the simulation based on the DF model to improve the quality and efficiency of the analysis. With the simulator, engineers are able to evaluate the design options, critical problems can be detected before the implementation phase. Therefore, the implementation of the CDR receiver in this project will benefit from data-flow modeling and simulation. The approach is explored to improve the quality and efficiency of the design procedure in industry. Mapping a China Digital Radio (CDR) receiver on a Software-Defined-Radio platform 1 CHAPTER 1. INTRODUCTION 1.2 Related Work The demodulation and decoding subsystem in the CDR receiver is defined by the standard [6]. A signal processing simulation chain was designed and tested according to the CDR standard [16], with several issues investigated and solutions explored in Matlab. Another subsystem for demul- tiplexing is defined in the standard [7]. In the research about architecture design for the radio receiver on a SDR platform, a flexible architecture is proposed in [8] to support multiple channels in the FM band and two single tuners for DAB, which is a pure digital radio standard in Europe. Four single channels are extracted up in real-time, each channel is buffered in a FIFO memory to allow further time sharing of the decoder blocks. To deal with the complexity in the design procedure, many researches have explored data-flow based analysis and design. A reconfigurable phase-shift keying system as an SDR application was designed and implemented with a light weight data-flow approach [13], which facilitates the pro- cesses of cross-language, cross-platform migration and prototyping in signal processing application domains for efficient implementation. The Synchronous Data-Flow (SDF) is an important type of the data-flow in application mod- eling. But it is hard to describe the dynamic behavior of the SDR system, since the SDF is a restriction of Kahn process networks [12], where actors produce and consume a fixed number of data items per firing with static scheduling. In order to address the limitation in Data-flow based modeling, the dynamic data processing behavior is divided into a group of static modes of operation, where each group is modeled by a SDF graph referred to as a scenario [15], and the worst-case throughput analysis is applied for the scenarios. However, the dependencies between scenarios are lack in the scenario based data flow model, it will lead to an invalid worst-case temporal analysis. Then a technique for modeling the dependency with Finite-State machine is explored, and the results of throughput were compared and validated with that by the previous scenario-aware data-flow model [14]. As an extension of the SDF modeling, the Cyclo-Static Data-Flow (CSDF) is much more expressive, it supports algorithms with a cyclically changing, but predefined behavior [3]. The data-dependent and state-dependent conditional behaviors can be described by the CSDF. A static scheduling can be done with CSDF, because the behavior changes with a group of predictable sequences. Because the CDR standard supports multi-transmission modes and spectrum modes, the CSDF is suitable to describe the signal processing tasks which fires in a periodical and data-dependent pattern. In this report, the CDR receiver will be modeled by the CSDF, the architecture options will be applied on the models and simulated with a data-flow simulator to analyze and generate optimal design options. 1.3 Problem Definition The goal of this project is to research the architecture options, including optimization in the schedule policy and the resources usage for a CDR receiver. To improve the efficiency in the research on the architecture options for industrial embedded architecture design, issues and solutions will be explored to benefit from the data-flow modeling and a simulation tool. The research about design options includes: 1. Describing the CDR receiver use cases, setting up the requirements based on an existed signal processing Matlab chain and the de-multiplexing sub-system, the statistics about the resource usage on the target platform are also taken as constraints. 2. Building the data-flow model for the CDR receiver. The model should be flexible enough to express the behaviors of the system in multiple transmission modes and spectrum modes for three use cases. 2 Mapping a China Digital Radio (CDR) receiver on a Software-Defined-Radio platform CHAPTER 1. INTRODUCTION 3. Doing simulation with a data-flow simulator using the receiver and several graphs for different architecture design options, in order to generate analyzable data and results. 4. Analyzing and evaluating the designs with the simulation results. The recommended design options can be made for the CDR receiver system. In order to understand the requirements of the processing functions and advanced receiver use cases, it is a task of the project to complete a CDR de-multiplexer, which includes the API design and testing based on an initial CDR de-multiplexer implementation.
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