Efficient Methods and Hardware for Deep Learning

Home , AlphaGo, Tensor processing unit

Song Han Stanford University May 25, 2017 Intro

Song Han Bill Dally PhD Candidate Chief Scientist Stanford NVIDIA Professor Stanford

2 Deep Learning is Changing Our Lives

Self-Driving Car Machine Translation

This image is licensed under CC-BY 2.0 This image is in the public domain

This image is in the public domain This image is licensed under CC-BY 2.0

3 AlphaGo Smart Robots

3 Models are Getting Larger

IMAGE RECOGNITION SPEECH RECOGNITION

Important Property of Neural Networks 16X 10X Results get better with Model Training Ops 152 layers 465 GFLOP more data + 22.6 GFLOP 12,000 hrs of Data bigger models + ~3.5% error ~5% Error more computation 8 layers 80 GFLOP 1.4 GFLOP 7,000 hrs of Data (Better algorithms, new insights and ~16% Error ~8% Error improved techniques always help, too!) 2012 2015 2014 2015 AlexNet ResNet Deep Speech 1 Deep Speech 2 Microsoft Baidu

Dally, NIPS’2016 workshop on Efficient Methods for Deep Neural Networks

4 The first Challenge: Model Size

Hard to distribute large models through over-the-air update

App icon is in the public domain This image is licensed under CC-BY 2.0 Phone image is licensed under CC-BY 2.0

5 The Second Challenge: Speed

Error rate Training time ResNet18: 10.76% 2.5 days ResNet50: 7.02% 5 days ResNet101: 6.21% 1 week ResNet152: 6.16% 1.5 weeks

Such long training time limits ML researcher’s productivity

Training time benchmarked with fb.resnet.torch using four M40 GPUs

6 The Third Challenge: Energy Efficiency

AlphaGo: 1920 CPUs and 280 GPUs, $3000 electric bill per game This image is in the public domain This image is in the public domain

on mobile: drains battery on data-center: increases TCO Phone image is licensed under CC-BY 2.0 This image is licensed under CC-BY 2.0

7 Where is the Energy Consumed? larger model => more memory reference => more energy

8 Where is the Energy Consumed?

larger model => more memory reference => more energy

Figure 1: Energy tableFigure for 45nm 1: Energy CMOS table process for 45nm [7]. MemoryCMOS process access [ is7]. 3 Memory orders of access magnitude is 3 orders more of magnitude more energy expensive thanenergy simple1 expensive arithmetic. than simple arithmetic.= 1000

This image is in the public domain

To achieve this goal, weTo achievepresent athis method goal, we to prune present network a method connections to prune network in a manner connections that preserves in a manner the that preserves the original accuracy. Afteroriginal an initial accuracy. training After phase, an initial we remove training all phase, connections we remove whose all connections weight is lower whose weight is lower than a threshold. Thisthan pruning a threshold. converts This a dense, pruning fully-connected converts a dense, layer fully-connected to a sparse layer. layer This to a first sparse layer. This9 first phase learns the topologyphase of learns the networks the topology — learning of the networks which connections — learning are which important connections and removing are important and removing the unimportant connections.the unimportant We then connections. retrain the sparse We then network retrain so the the sparse remaining network connections so the remaining can connections can compensate for the connectionscompensate that for the have connections been removed. that have The beenphases removed. of pruning The and phases retraining of pruning may and retraining may be repeated iterativelybe to repeated further iteratively reduce network to further complexity. reduce network In effect, complexity. this training In effect, process this learns training process learns the network connectivitythe network in addition connectivity to the weights in addition - much to as the in weights the mammalian - much as brain in the [8][9], mammalian where brain [8][9], where synapses are created insynapses the first are few created months in of the a first child’s few development, months of a child’s followed development, by gradual followed pruning byof gradual pruning of little-used connections,little-used falling to connections, typical adult falling values. to typical adult values.

2 Related Work2 Related Work

Neural networks are typically over-parameterized, and there is significant redundancy for deep learn- Neural networks are typically over-parameterized, and there is significant redundancy for deep learning models [10]. This results in a waste of both computation and memory. There have been various ing models [10]. This results in a waste of both computation and memory. There have been various proposals to remove the redundancy: Vanhoucke et al. [11] explored a fixed-point implementation proposals to remove the redundancy: Vanhoucke et al. [11] explored a fixed-point implementation with 8-bit integer (vs 32-bit floating point) activations. Denton et al. [12] exploited the linear with 8-bit integer (vs 32-bit floating point) activations. Denton et al. [12] exploited the linear structure of the neural network by finding an appropriate low-rank approximation of the parameters structure of the neural network by finding an appropriate low-rank approximation of the parameters and keeping the accuracy within 1% of the original model. With similar accuracy loss, Gong et al. and keeping the accuracy[13] compressed within 1% of deep the convnets original model. using vector With quantization.similar accuracy These loss, approximation Gong et al. and quantization [13] compressed deeptechniques convnets are using orthogonal vector quantization. to network pruning, These andapproximation they can be and used quantization together to obtain further gains techniques are orthogonal[14]. to network pruning, and they can be used together to obtain further gains [14]. There have been other attempts to reduce the number of parameters of neural networks by replacing There have been otherthe attempts fully connected to reduce layer the number with global of parameters average pooling. of neural The networks Network by in replacing Network architecture [15] the fully connected layerand GoogLenet with global [16 average] achieves pooling. state-of-the-art The Network results in Network on several architecture benchmarks [15 by] adopting this idea. and GoogLenet [16]However, achieves state-of-the-arttransfer learning, results i.e. reusing on several features benchmarks learned on by the adopting ImageNet this dataset idea. and applying them However, transfer learning,to new i.e. tasks reusing by only features fine-tuning learned the onfully the connected ImageNet layers, dataset is andmore applying difficult them with this approach. This to new tasks by onlyproblem fine-tuning is noted the fully by Szegedyconnectedet layers, al. [16 is] and more motivates difficult them with thisto add approach. a linear Thislayer on the top of their problem is noted by Szegedynetworkset to al. enable[16] transfer and motivates learning. them to add a linear layer on the top of their networks to enable transfer learning. Network pruning has been used both to reduce network complexity and to reduce over-fitting. An Network pruning hasearly been approach used both to to pruning reduce was network biased complexity weight decay and [17 to]. reduce Optimal over-fitting. Brain Damage An [18] and Optimal early approach to pruningBrain was Surgeon biased [19 weight] prune decay networks [17]. to Optimal reduce the Brain number Damage of connections [18] and Optimal based on the Hessian of the Brain Surgeon [19] pruneloss function networks and to reduce suggest the that number such pruning of connections is more accurate based on than the Hessian magnitude-based of the pruning such as loss function and suggestweight that decay. such However, pruning is second more accurate order derivative than magnitude-based needs additional pruning computation. such as weight decay. However, second order derivative needs additional computation. HashedNets [20] is a recent technique to reduce model sizes by using a hash function to randomly HashedNets [20] is agroup recent connection technique weightsto reduce into model hash sizes buckets, by using so that a hash all connections function to withinrandomly the same hash bucket group connection weightsshare a into single hash parameter buckets, value. so that This all technique connections may within benefit the from same pruning. hash Asbucket pointed out in Shi et al. share a single parameter[21] value. and Weinberger This techniqueet al. may[22], benefit sparsity from will pruning. minimize As hash pointed collision out in making Shi et al. feature hashing even [21] and Weinbergermoreet al. effective.[22], sparsity HashedNets will minimize may be hashused together collision with making pruning feature to give hashing even better even parameter savings. more effective. HashedNets may be used together with pruning to give even better parameter savings. 2 2 Where is the Energy Consumed?

larger model => more memory reference => more energy

Relative Energy Cost Relative Energy Cost OperationOperation Energy [pJ] Relative Energy Cost [pJ] RelativeRelative Cost Energy Cost 32 bit int ADD32 bit int 0.1 ADD 1 0.1 1 32 bit float ADD32 bit float 0.9 ADD 9 0.9 9 32 bit Register File32 bit Register 1 File 10 1 10 32 bit int MULT32 bit int 3.1 MULT 31 3.1 31 32 bit float MULT32 bit float 3.7 MULT 37 3.7 37 32 bit SRAM Cache32 bit SRAM 5 Cache 50 5 50 32 bit DRAM Memory32 bit 640DRAM Memory 6400 640 6400 1 10 100 11000 1010000 100 1000 10000 how to make deep learning more efficient? Figure 1: Energy tableFigure for 45nm 1: Energy CMOS table process for 45nm [7]. MemoryCMOS process access [ is7]. 3 Memory orders of access magnitude is 3 orders more of magnitude more energy expensive thanenergy simple expensive arithmetic. than simple arithmetic.

Battery images are in the public domain To achieve thisImage 1, goal,image 2, image weTo 2, image achievepresent 4 athis method goal, we to prune present network a method connections to prune network in a manner connections that preserves in a manner the that preserves the original accuracy. Afteroriginal an initial accuracy. training After phase, an initial we remove training all phase, connections we remove whose all connections weight is lower whose weight is lower than a threshold. Thisthan pruning a threshold. converts This a dense, pruning fully-connected converts a dense, layer fully-connected to a sparse layer. layer This to a first sparse layer. This10 first phase learns the topologyphase of learns the networks the topology — learning of the networks which connections — learning are which important connections and removing are important and removing the unimportant connections.the unimportant We then connections. retrain the sparse We then network retrain so the the sparse remaining network connections so the remaining can connections can compensate for the connectionscompensate that for the have connections been removed. that have The beenphases removed. of pruning The and phases retraining of pruning may and retraining may be repeated iterativelybe to repeated further iteratively reduce network to further complexity. reduce network In effect, complexity. this training In effect, process this learns training process learns the network connectivitythe network in addition connectivity to the weights in addition - much to as the in weights the mammalian - much as brain in the [8][9], mammalian where brain [8][9], where synapses are created insynapses the first are few created months in of the a first child’s few development, months of a child’s followed development, by gradual followed pruning byof gradual pruning of little-used connections,little-used falling to connections, typical adult falling values. to typical adult values.

2 Related Work2 Related Work

11 Application as a Black Box

Spec 2006 Algorithm

This image is in the public domain

Hardware

This image is in CPU the public domain

12 Open the Box before Hardware Design

? Algorithm

This image is in the public domain

Hardware

This image is in ?PU the public domain

Breaks the boundary between algorithm and hardware

13 Agenda

Inference Training Agenda

Algorithm

Inference Training

Hardware Agenda

Algorithm

Inference Training

Hardware Agenda

Algorithm

Algorithms for Algorithms for Efﬁcient Inference Efﬁcient Training

Inference Training

Hardware for Hardware for Efﬁcient Inference Efﬁcient Training Hardware Hardware 101: the Family

Hardware

General Purpose* Specialized HW

CPU GPU FPGA ASIC

latency throughput programmable ﬁxed oriented oriented logic logic

* including GPGPU Hardware 101: Number Representation

E (-1)s x (1.M) x 2

Range Accuracy 1 8 23 -38 38 FP32 S E M 10 - 10 .000006% 1 5 10 S E M -5 4 FP16 6x10 - 6x10 .05% 1 31 0 – 2x109 ½ Int32 S M

1 15 0 – 6x104 ½ Int16 S M

1 7 0 – 127 ½ Int8 S M - - Fixed point S I F

radix point Dally, High Performance Hardware for Machine Learning, NIPS’2015 Hardware 101: Number Representation

Operation: Energy (pJ) Area (µm2) 8b Add 0.03 36 16b Add 0.05 67 32b Add 0.1 137 16b FP Add 0.4 1360 32b FP Add 0.9 4184 8b Mult 0.2 282 32b Mult 3.1 3495 16b FP Mult 1.1 1640 32b FP Mult 3.7 7700 32b SRAM Read (8KB) 5 N/A 32b DRAM Read 640 N/A

Energy numbers are from Mark Horowitz “Computing’s Energy Problem (and what we can do about it)”, ISSCC 2014 Area numbers are from synthesized result using Design Compiler under TSMC 45nm tech node. FP units used DesignWare Library. Agenda

Algorithm

Algorithms for Algorithms for Efﬁcient Inference Efﬁcient Training

Inference Training

Hardware for Hardware for Efﬁcient Inference Efﬁcient Training Hardware Part 1: Algorithms for Efficient Inference

• 1. Pruning

• 2. Weight Sharing

• 3. Quantization

• 4. Low Rank Approximation

• 5. Binary / Ternary Net

• 6. Winograd Transformation Part 1: Algorithms for Efficient Inference

• 1. Pruning

• 2. Weight Sharing

• 3. Quantization

• 4. Low Rank Approximation

• 5. Binary / Ternary Net

• 6. Winograd Transformation Pruning Neural Networks

[Lecun et al. NIPS’89] [Han et al. NIPS’15]

Pruning Trained Quantization Huffman Coding 24 [Han et al. NIPS’15] Pruning Neural Networks

-0.01x2 +x+1

60 Million 6M 10x less connections

Pruning Trained Quantization Huffman Coding 25 [Han et al. NIPS’15] Pruning Neural Networks

0.5% 0.0% -0.5% -1.0% -1.5% -2.0% -2.5% -3.0% AccuracyLoss -3.5% -4.0% -4.5% 40% 50% 60% 70% 80% 90% 100% Parameters Pruned Away

Pruning Trained Quantization Huffman Coding 26 [Han et al. NIPS’15] Pruning Neural Networks

Pruning 0.5% 0.0% -0.5% -1.0% -1.5% -2.0% -2.5% -3.0% AccuracyLoss -3.5% -4.0% -4.5% 40% 50% 60% 70% 80% 90% 100% Parameters Pruned Away

Pruning Trained Quantization Huffman Coding 27 [Han et al. NIPS’15] Retrain to Recover Accuracy

Pruning Pruning+Retraining 0.5% 0.0% -0.5% -1.0% -1.5% -2.0% -2.5% -3.0% AccuracyLoss -3.5% -4.0% -4.5% 40% 50% 60% 70% 80% 90% 100% Parameters Pruned Away

Pruning Trained Quantization Huffman Coding 28 [Han et al. NIPS’15] Iteratively Retrain to Recover Accuracy

Pruning Pruning+Retraining Iterative Pruning and Retraining 0.5% 0.0% -0.5% -1.0% -1.5% -2.0% -2.5% -3.0% AccuracyLoss -3.5% -4.0% -4.5% 40% 50% 60% 70% 80% 90% 100% Parameters Pruned Away

Pruning Trained Quantization Huffman Coding 29 [Han et al. NIPS’15] Pruning RNN and LSTM

Image Captioning

Explain Images with Multimodal Recurrent Neural Networks, Mao et al. Deep Visual-Semantic Alignments for Generating Image Descriptions, Karpathy and Fei-Fei Show and Tell: A Neural Image Caption Generator, Vinyals et al. Long-term Recurrent Convolutional Networks for Visual Recognition and Description, Donahue et al. Learning a Recurrent Visual Representation*Karpathy for etImage al, "DeepCaption Generation,Visual- Chen and Zitnick Semantic Alignments for Generating Fei-Fei Li & Andrej KarpathyImage & Justin Descriptions”, Johnson 2015.Lecture 10 - 51 8 Feb 2016 Figure copyright IEEE, 2015; reproduced for educational purposes.

Pruning Trained Quantization Huffman Coding 30 [Han et al. NIPS’15] Pruning RNN and LSTM

• Original: a basketball player in a white uniform is playing with a ball 90% • Pruned 90%: a basketball player in a white uniform is playing with a basketball

• Original : a brown dog is running through a grassy field 90% • Pruned 90%: a brown dog is running through a grassy area

• Original : a man is riding a surfboard on a wave 90% • Pruned 90%: a man in a wetsuit is riding a wave on a beach

• Original : a soccer player in red is running in the field 95% • Pruned 95%: a man in a red shirt and black and white black shirt is running through a field

Pruning Trained Quantization Huffman Coding 31 Pruning Happens in Human Brain

1000 Trillion Synapses 50 Trillion 500 Trillion Synapses Synapses

This image is in the public domain This image is in the public domain This image is in the public domain Newborn 1 year old Adolescent

Christopher A Walsh. Peter Huttenlocher (1931-2013). Nature, 502(7470):172–172, 2013.

Pruning Trained Quantization Huffman Coding 32 [Han et al. NIPS’15] Pruning Changes Weight Distribution

Before Pruning After Pruning After Retraining

Conv5 layer of Alexnet. Representative for other network layers as well.

Pruning Trained Quantization Huffman Coding 33 Part 1: Algorithms for Efficient Inference

• 1. Pruning

• 2. Weight Sharing

• 3. Quantization

• 4. Low Rank Approximation

• 5. Binary / Ternary Net

• 6. Winograd Transformation [Han et al. ICLR’16] Trained Quantization

2.09, 2.12, 1.92, 1.87

2.0

Pruning Trained Quantization Huffman Coding 35 Published as a conference paper at ICLR 2016

[Han et al. ICLR’16] Trained Quantization Quantization: less bits per weight Pruning: less number of weights Huffman Encoding

Cluster the Weights

Train Connectivity Encode Weights original same same same network 2.09, 2.12, 1.92,accuracy 1.87 Generate Code Book accuracy accuracy Prune Connections original 9x-13x Quantize the Weights 27x-31x Encode Index 35x-49x size reduction with Code Book reduction reduction Train Weights 2.0 Retrain Code Book

Figure 1: The three stage compression pipeline: pruning,32 bit quantization and Huffman coding. Pruning reduces the number of weights by 10 ,4bit while8x less memory footprint quantization further improves the compression rate: between 27 and 31 . Huffman coding⇥ gives more compression: between 35 and 49 . The Pruning Trained Quantization Huffman Coding compression⇥ rate already⇥ included the meta-data for sparse representation. The compression⇥ 36 ⇥ scheme doesn’t incur any accuracy loss. features such as better privacy, less network bandwidth and real time processing, the large storage overhead prevents deep neural networks from being incorporated into mobile apps. The second issue is energy consumption. Running large neural networks require a lot of memory bandwidth to fetch the weights and a lot of computation to do dot products— which in turn consumes considerable energy. Mobile devices are battery constrained, making power hungry applications such as deep neural networks hard to deploy. Energy consumption is dominated by memory access. Under 45nm CMOS technology, a 32 bit floating point add consumes 0.9pJ, a 32bit SRAM cache access takes 5pJ, while a 32bit DRAM memory access takes 640pJ, which is 3 orders of magnitude of an add operation. Large networks do not fit in on-chip storage and hence require the more costly DRAM accesses. Running a 1 billion connection neural network, for example, at 20fps would require (20Hz)(1G)(640pJ) = 12.8W just for DRAM access - well beyond the power envelope of a typical mobile device. Our goal is to reduce the storage and energy required to run inference on such large networks so they can be deployed on mobile devices. To achieve this goal, we present “deep compression”: a three- stage pipeline (Figure 1) to reduce the storage required by neural network in a manner that preserves the original accuracy. First, we prune the networking by removing the redundant connections, keeping only the most informative connections. Next, the weights are quantized so that multiple connections share the same weight, thus only the codebook (effective weights) and the indices need to be stored. Finally, we apply Huffman coding to take advantage of the biased distribution of effective weights. Our main insight is that, pruning and trained quantization are able to compress the network without interfering each other, thus lead to surprisingly high compression rate. It makes the required storage so small (a few megabytes) that all weights can be cached on chip instead of going to off-chip DRAM which is energy consuming. Based on “deep compression”, the EIE hardware accelerator Han et al. (2016) was later proposed that works on the compressed model, achieving significant speedup and energy efficiency improvement.

2NETWORK PRUNING

Network pruning has been widely studied to compress CNN models. In early work, network pruning proved to be a valid way to reduce the network complexity and over-ﬁtting (LeCun et al., 1989; Hanson & Pratt, 1989; Hassibi et al., 1993; Strom,¨ 1997). Recently Han et al. (2015) pruned state- of-the-art CNN models with no loss of accuracy. We build on top of that approach. As shown on the left side of Figure 1, we start by learning the connectivity via normal network training. Next, we prune the small-weight connections: all connections with weights below a threshold are removed from the network. Finally, we retrain the network to learn the ﬁnal weights for the remaining sparse connections. Pruning reduced the number of parameters by 9 and 13 for AlexNet and VGG-16 model. ⇥ ⇥

2 Published as a conference paper at ICLR 2016

[Han et al. ICLR’16] Figure 2: Representing the matrixTrained sparsity Quantization with relative index. Padding ﬁller zero to prevent overﬂow.

weights cluster index fine-tuned (32 bit float) (2 bit uint) centroids centroids

2.09 -0.98 1.48 0.09 3 0 2 1 3: 2.00 1.96

0.05 -0.14 -1.08 2.12 cluster 1 1 0 3 2: 1.50 1.48

-0.91 1.92 0 -1.03 0 3 1 0 1: 0.00 -0.04

1.87 0 1.53 1.49 3 1 2 2 0: -1.00 lr -0.97

gradient

-0.03 -0.01 0.03 0.02 -0.03 0.12 0.02 -0.07 0.04

-0.01 0.01 -0.02 0.12 group by 0.03 0.01 -0.02 reduce 0.02

-0.01 0.02 0.04 0.01 0.02 -0.01 0.01 0.04 -0.02 0.04

-0.07 -0.02 0.01 -0.02 -0.01 -0.02 -0.01 0.01 -0.03

Figure 3: Weight sharing by scalar quantization (top) and centroids ﬁne-tuning (bottom). Pruning Trained Quantization Huffman Coding 37

We store the sparse structure that results from pruning using compressed sparse row (CSR) or compressed sparse column (CSC) format, which requires 2a + n +1numbers, where a is the number of non-zero elements and n is the number of rows or columns. To compress further, we store the index difference instead of the absolute position, and encode this difference in 8 bits for conv layer and 5 bits for fc layer. When we need an index difference larger than the bound, we the zero padding solution shown in Figure 2: in case when the difference exceeds 8, the largest 3-bit (as an example) unsigned number, we add a ﬁller zero.

3TRAINED QUANTIZATION AND WEIGHT SHARING

Network quantization and weight sharing further compresses the pruned network by reducing the number of bits required to represent each weight. We limit the number of effective weights we need to store by having multiple connections share the same weight, and then ﬁne-tune those shared weights. Weight sharing is illustrated in Figure 3. Suppose we have a layer that has 4 input neurons and 4 output neurons, the weight is a 4 4 matrix. On the top left is the 4 4 weight matrix, and on the bottom left is the 4 4 gradient matrix.⇥ The weights are quantized to⇥ 4 bins (denoted with 4 colors), all the weights in the⇥ same bin share the same value, thus for each weight, we then need to store only a small index into a table of shared weights. During update, all the gradients are grouped by the color and summed together, multiplied by the learning rate and subtracted from the shared centroids from last iteration. For pruned AlexNet, we are able to quantize to 8-bits (256 shared weights) for each CONV layers, and 5-bits (32 shared weights) for each FC layer without any loss of accuracy.

To calculate the compression rate, given k clusters, we only need log2(k) bits to encode the index. In general, for a network with n connections and each connection is represented with b bits, constraining the connections to have only k shared weights will result in a compression rate of:

nb r = (1) nlog2(k)+kb

For example, Figure 3 shows the weights of a single layer neural network with four input units and four output units. There are 4 4 = 16 weights originally but there are only 4 shared weights: similar weights are grouped together⇥ to share the same value. Originally we need to store 16 weights each

3 Published as a conference paper at ICLR 2016

[Han et al. ICLR’16] Figure 2: Representing the matrixTrained sparsity Quantization with relative index. Padding ﬁller zero to prevent overﬂow.

weights cluster index fine-tuned (32 bit float) (2 bit uint) centroids centroids

2.09 -0.98 1.48 0.09 3 0 2 1 3: 2.00 1.96

0.05 -0.14 -1.08 2.12 cluster 1 1 0 3 2: 1.50 1.48

-0.91 1.92 0 -1.03 0 3 1 0 1: 0.00 -0.04

1.87 0 1.53 1.49 3 1 2 2 0: -1.00 lr -0.97

gradient

-0.03 -0.01 0.03 0.02 -0.03 0.12 0.02 -0.07 0.04

-0.01 0.01 -0.02 0.12 group by 0.03 0.01 -0.02 reduce 0.02

-0.01 0.02 0.04 0.01 0.02 -0.01 0.01 0.04 -0.02 0.04

-0.07 -0.02 0.01 -0.02 -0.01 -0.02 -0.01 0.01 -0.03

Figure 3: Weight sharing by scalar quantization (top) and centroids ﬁne-tuning (bottom). Pruning Trained Quantization Huffman Coding 38

3TRAINED QUANTIZATION AND WEIGHT SHARING

nb r = (1) nlog2(k)+kb

3 Published as a conference paper at ICLR 2016

[Han et al. ICLR’16] Figure 2: Representing the matrixTrained sparsity Quantization with relative index. Padding ﬁller zero to prevent overﬂow.

weights cluster index fine-tuned (32 bit float) (2 bit uint) centroids centroids

2.09 -0.98 1.48 0.09 3 0 2 1 3: 2.00 1.96

0.05 -0.14 -1.08 2.12 cluster 1 1 0 3 2: 1.50 1.48

-0.91 1.92 0 -1.03 0 3 1 0 1: 0.00 -0.04

1.87 0 1.53 1.49 3 1 2 2 0: -1.00 lr -0.97

gradient

-0.03 -0.01 0.03 0.02 -0.03 0.12 0.02 -0.07 0.04

-0.01 0.01 -0.02 0.12 group by 0.03 0.01 -0.02 reduce 0.02

-0.01 0.02 0.04 0.01 0.02 -0.01 0.01 0.04 -0.02 0.04

-0.07 -0.02 0.01 -0.02 -0.01 -0.02 -0.01 0.01 -0.03

Figure 3: Weight sharing by scalar quantization (top) and centroids ﬁne-tuning (bottom). Pruning Trained Quantization Huffman Coding 39

3TRAINED QUANTIZATION AND WEIGHT SHARING

nb r = (1) nlog2(k)+kb

3 Published as a conference paper at ICLR 2016

[Han et al. ICLR’16] Figure 2: Representing the matrixTrained sparsity Quantization with relative index. Padding ﬁller zero to prevent overﬂow.

weights cluster index fine-tuned (32 bit float) (2 bit uint) centroids centroids

2.09 -0.98 1.48 0.09 3 0 2 1 3: 2.00 1.96

0.05 -0.14 -1.08 2.12 cluster 1 1 0 3 2: 1.50 1.48

-0.91 1.92 0 -1.03 0 3 1 0 1: 0.00 -0.04

1.87 0 1.53 1.49 3 1 2 2 0: -1.00 lr -0.97

gradient

-0.03 -0.01 0.03 0.02 -0.03 0.12 0.02 -0.07 0.04

-0.01 0.01 -0.02 0.12 group by 0.03 0.01 -0.02 reduce 0.02

-0.01 0.02 0.04 0.01 0.02 -0.01 0.01 0.04 -0.02 0.04

-0.07 -0.02 0.01 -0.02 -0.01 -0.02 -0.01 0.01 -0.03

Figure 3: Weight sharing by scalar quantization (top) and centroids ﬁne-tuning (bottom). Pruning Trained Quantization Huffman Coding 40

3TRAINED QUANTIZATION AND WEIGHT SHARING

nb r = (1) nlog2(k)+kb

3 Published as a conference paper at ICLR 2016

[Han et al. ICLR’16] Figure 2: Representing the matrixTrained sparsity Quantization with relative index. Padding ﬁller zero to prevent overﬂow.

weights cluster index fine-tuned (32 bit float) (2 bit uint) centroids centroids

2.09 -0.98 1.48 0.09 3 0 2 1 3: 2.00 1.96

0.05 -0.14 -1.08 2.12 cluster 1 1 0 3 2: 1.50 1.48

-0.91 1.92 0 -1.03 0 3 1 0 1: 0.00 -0.04

1.87 0 1.53 1.49 3 1 2 2 0: -1.00 lr -0.97

gradient

-0.03 -0.01 0.03 0.02 -0.03 0.12 0.02 -0.07 0.04

-0.01 0.01 -0.02 0.12 group by 0.03 0.01 -0.02 reduce 0.02

-0.01 0.02 0.04 0.01 0.02 -0.01 0.01 0.04 -0.02 0.04

-0.07 -0.02 0.01 -0.02 -0.01 -0.02 -0.01 0.01 -0.03

Figure 3: Weight sharing by scalar quantization (top) and centroids ﬁne-tuning (bottom). Pruning Trained Quantization Huffman Coding 41

3TRAINED QUANTIZATION AND WEIGHT SHARING

nb r = (1) nlog2(k)+kb

3 Published as a conference paper at ICLR 2016

[Han et al. ICLR’16] Figure 2: Representing the matrixTrained sparsity Quantization with relative index. Padding ﬁller zero to prevent overﬂow.

weights cluster index fine-tuned (32 bit float) (2 bit uint) centroids centroids

2.09 -0.98 1.48 0.09 3 0 2 1 3: 2.00 1.96

0.05 -0.14 -1.08 2.12 cluster 1 1 0 3 2: 1.50 1.48

-0.91 1.92 0 -1.03 0 3 1 0 1: 0.00 -0.04

1.87 0 1.53 1.49 3 1 2 2 0: -1.00 lr -0.97

gradient

-0.03 -0.01 0.03 0.02 -0.03 0.12 0.02 -0.07 0.04

-0.01 0.01 -0.02 0.12 group by 0.03 0.01 -0.02 reduce 0.02

-0.01 0.02 0.04 0.01 0.02 -0.01 0.01 0.04 -0.02 0.04

-0.07 -0.02 0.01 -0.02 -0.01 -0.02 -0.01 0.01 -0.03

Figure 3: Weight sharing by scalar quantization (top) and centroids ﬁne-tuning (bottom). Pruning Trained Quantization Huffman Coding 42

3TRAINED QUANTIZATION AND WEIGHT SHARING

nb r = (1) nlog2(k)+kb

3 Published as a conference paper at ICLR 2016

[Han et al. ICLR’16] Figure 2: Representing the matrixTrained sparsity Quantization with relative index. Padding ﬁller zero to prevent overﬂow.

weights cluster index fine-tuned (32 bit float) (2 bit uint) centroids centroids

2.09 -0.98 1.48 0.09 3 0 2 1 3: 2.00 1.96

0.05 -0.14 -1.08 2.12 cluster 1 1 0 3 2: 1.50 1.48

-0.91 1.92 0 -1.03 0 3 1 0 1: 0.00 -0.04

1.87 0 1.53 1.49 3 1 2 2 0: -1.00 lr -0.97

gradient

-0.03 -0.01 0.03 0.02 -0.03 0.12 0.02 -0.07 0.04

-0.01 0.01 -0.02 0.12 group by 0.03 0.01 -0.02 reduce 0.02

-0.01 0.02 0.04 0.01 0.02 -0.01 0.01 0.04 -0.02 0.04

-0.07 -0.02 0.01 -0.02 -0.01 -0.02 -0.01 0.01 -0.03

Figure 3: Weight sharing by scalar quantization (top) and centroids ﬁne-tuning (bottom). Pruning Trained Quantization Huffman Coding 43

3TRAINED QUANTIZATION AND WEIGHT SHARING

nb r = (1) nlog2(k)+kb

3 [Han et al. ICLR’16] Before Trained Quantization: Continuous Weight Count

Weight Value

Pruning Trained Quantization Huffman Coding 44 [Han et al. ICLR’16] After Trained Quantization: Discrete Weight Count

Weight Value

Pruning Trained Quantization Huffman Coding 45 [Han et al. ICLR’16] After Trained Quantization: Discrete Weight after Training Count

Weight Value

Pruning Trained Quantization Huffman Coding 46 [Han et al. ICLR’16] How Many Bits do We Need?

Pruning Trained Quantization Huffman Coding 47 [Han et al. ICLR’16] How Many Bits do We Need?

Pruning Trained Quantization Huffman Coding 48 [Han et al. ICLR’16] Pruning + Trained Quantization Work Together

Pruning Trained Quantization Huffman Coding 49 [Han et al. ICLR’16] Pruning + Trained Quantization Work Together

AlexNet on ImageNet

Pruning Trained Quantization Huffman Coding 50 [Han et al. ICLR’16]

Published as a conference paper at ICLR 2016 Huffman Coding

Quantization: less bits per weight Pruning: less number of weights Huffman Encoding

Cluster the Weights

Train Connectivity Encode Weights original same same same network accuracy Generate Code Book accuracy accuracy Prune Connections original 9x-13x Quantize the Weights 27x-31x Encode Index 35x-49x size reduction with Code Book reduction reduction Train Weights

Retrain Code Book

Figure 1: The three stage compression pipeline: pruning, quantization and Huffman coding. Pruning• In-frequent weights: use more bits to represent reduces the number of weights by 10 , while quantization further improves the compression rate:• Frequent weights: use less bits to represent between 27 and 31 . Huffman coding⇥ gives more compression: between 35 and 49 . The compression⇥ rate already⇥ included the meta-data for sparse representation. The compression⇥ ⇥ scheme doesn’t incur any accuracy loss. Pruning Trained Quantization Huffman Coding 51 features such as better privacy, less network bandwidth and real time processing, the large storage overhead prevents deep neural networks from being incorporated into mobile apps. The second issue is energy consumption. Running large neural networks require a lot of memory bandwidth to fetch the weights and a lot of computation to do dot products— which in turn consumes considerable energy. Mobile devices are battery constrained, making power hungry applications such as deep neural networks hard to deploy. Energy consumption is dominated by memory access. Under 45nm CMOS technology, a 32 bit floating point add consumes 0.9pJ, a 32bit SRAM cache access takes 5pJ, while a 32bit DRAM memory access takes 640pJ, which is 3 orders of magnitude of an add operation. Large networks do not fit in on-chip storage and hence require the more costly DRAM accesses. Running a 1 billion connection neural network, for example, at 20fps would require (20Hz)(1G)(640pJ) = 12.8W just for DRAM access - well beyond the power envelope of a typical mobile device. Our goal is to reduce the storage and energy required to run inference on such large networks so they can be deployed on mobile devices. To achieve this goal, we present “deep compression”: a three- stage pipeline (Figure 1) to reduce the storage required by neural network in a manner that preserves the original accuracy. First, we prune the networking by removing the redundant connections, keeping only the most informative connections. Next, the weights are quantized so that multiple connections share the same weight, thus only the codebook (effective weights) and the indices need to be stored. Finally, we apply Huffman coding to take advantage of the biased distribution of effective weights. Our main insight is that, pruning and trained quantization are able to compress the network without interfering each other, thus lead to surprisingly high compression rate. It makes the required storage so small (a few megabytes) that all weights can be cached on chip instead of going to off-chip DRAM which is energy consuming. Based on “deep compression”, the EIE hardware accelerator Han et al. (2016) was later proposed that works on the compressed model, achieving significant speedup and energy efficiency improvement.

2NETWORK PRUNING

2 [Han et al. ICLR’16] Summary of Deep Compression Published as a conference paper at ICLR 2016

Quantization: less bits per weight Pruning: less number of weights Huffman Encoding

Cluster the Weights

Retrain Code Book

Figure 1: The three stage compression pipeline: pruning, quantization and Huffman coding. Pruning reduces the number of weights by 10 , while quantization further improves the compression rate: between 27 and 31 . Huffman coding⇥ gives more compression: between 35 and 49 . The compression⇥ rate already⇥ included the meta-data for sparse representation. The compression⇥ ⇥ scheme doesn’t incur any accuracy loss. Pruning Trained Quantization Huffman Coding 52 features such as better privacy, less network bandwidth and real time processing, the large storage overhead prevents deep neural networks from being incorporated into mobile apps. The second issue is energy consumption. Running large neural networks require a lot of memory bandwidth to fetch the weights and a lot of computation to do dot products— which in turn consumes considerable energy. Mobile devices are battery constrained, making power hungry applications such as deep neural networks hard to deploy. Energy consumption is dominated by memory access. Under 45nm CMOS technology, a 32 bit floating point add consumes 0.9pJ, a 32bit SRAM cache access takes 5pJ, while a 32bit DRAM memory access takes 640pJ, which is 3 orders of magnitude of an add operation. Large networks do not fit in on-chip storage and hence require the more costly DRAM accesses. Running a 1 billion connection neural network, for example, at 20fps would require (20Hz)(1G)(640pJ) = 12.8W just for DRAM access - well beyond the power envelope of a typical mobile device. Our goal is to reduce the storage and energy required to run inference on such large networks so they can be deployed on mobile devices. To achieve this goal, we present “deep compression”: a three- stage pipeline (Figure 1) to reduce the storage required by neural network in a manner that preserves the original accuracy. First, we prune the networking by removing the redundant connections, keeping only the most informative connections. Next, the weights are quantized so that multiple connections share the same weight, thus only the codebook (effective weights) and the indices need to be stored. Finally, we apply Huffman coding to take advantage of the biased distribution of effective weights. Our main insight is that, pruning and trained quantization are able to compress the network without interfering each other, thus lead to surprisingly high compression rate. It makes the required storage so small (a few megabytes) that all weights can be cached on chip instead of going to off-chip DRAM which is energy consuming. Based on “deep compression”, the EIE hardware accelerator Han et al. (2016) was later proposed that works on the compressed model, achieving significant speedup and energy efficiency improvement.

2NETWORK PRUNING

2 [Han et al. ICLR’16] Results: Compression Ratio

Original Compressed Compression Original Compressed Network Size Size Ratio Accuracy Accuracy

LeNet-300 1070KB 27KB 40x 98.36% 98.42%

LeNet-5 1720KB 44KB 39x 99.20% 99.26%

AlexNet 240MB 6.9MB 35x 80.27% 80.30%

VGGNet 550MB 11.3MB 49x 88.68% 89.09%

GoogleNet 28MB 2.8MB 10x 88.90% 88.92%

ResNet-18 44.6MB 4.0MB 11x 89.24% 89.28%

Can we make compact models to begin with?

Compression Acceleration Regularization 53 SqueezeNet

Input

64 1x1 Conv Squeeze 16 1x1 Conv 3x3 Conv Expand Expand 64 64 Output Concat/Eltwise 128

Iandola et al, “SqueezeNet: AlexNet-levelVanilla accuracy Firewith 50x module fewer parameters and <0.5MB model size”, arXiv 2016

Compression Acceleration Regularization 54 Compressing SqueezeNet

Network Approach Size Ratio Top-1 Top-5 Accuracy Accuracy

AlexNet - 240MB 1x 57.2% 80.3%

AlexNet SVD 48MB 5x 56.0% 79.4%

Deep AlexNet 6.9MB 35x 57.2% 80.3% Compression

SqueezeNet - 4.8MB 50x 57.5% 80.3%

Deep SqueezeNet 0.47MB 510x 57.5% 80.3% Compression

Iandola et al, “SqueezeNet: AlexNet-level accuracy with 50x fewer parameters and <0.5MB model size”, arXiv 2016

Compression Acceleration Regularization 55 Results: Speedup

Average

0.6x

CPU GPU mGPU

Compression Acceleration Regularization 56 Results: Energy Efficiency

Average

CPU GPU mGPU

Compression Acceleration Regularization 57 Deep Compression Applied to Industry

Deep Compression

Compression Acceleration Regularization 58 Part 1: Algorithms for Efficient Inference

• 1. Pruning

• 2. Weight Sharing

• 3. Quantization

• 4. Low Rank Approximation

• 5. Binary / Ternary Net

• 6. Winograd Transformation Quantizing the Weight and Activation

• Train with float • Quantizing the weight and activation: • Gather the statistics for weight and activation • Choose proper radix point position • Fine-tune in float format • Convert to fixed-point format

Qiu et al. Going Deeper with Embedded FPGA Platform for Convolutional Neural Network, FPGA’16 Quantization Result

Qiu et al. Going Deeper with Embedded FPGA Platform for Convolutional Neural Network, FPGA’16 Part 1: Algorithms for Efficient Inference

• 1. Pruning

• 2. Weight Sharing

• 3. Quantization

• 4. Low Rank Approximation

• 5. Binary / Ternary Net

• 6. Winograd Transformation Low Rank Approximation for Conv

Zhang et al Efficient and Accurate Approximations of Nonlinear Convolutional Networks CVPR’15 Low Rank Approximation for Conv

Zhang et al Efficient and Accurate Approximations of Nonlinear Convolutional Networks CVPR’15 Low Rank Approximation for FC

Novikov et al Tensorizing Neural Networks, NIPS’15 Part 1: Algorithms for Efficient Inference

• 1. Pruning

• 2. Weight Sharing

• 3. Quantization

• 4. Low Rank Approximation

• 5. Binary / Ternary Net

• 6. Winograd Transformation Under review as a conference paper at ICLR 2017 Binary / Ternary Net: Motivation

Train on Dense (D) Pruning the Network Train on Sparse (S) Recover Zero Weights Train on Dense (D) 6400 6400 6400 6400 6400 Trained Normalized Intermediate Ternary Weight Final Ternary Weight 4800 Full Precision4800 Weight 4800 Full Precision4800 Weight 4800 Quantization

3200 3200 3200 3200 3200 Scale Count

Count Count Count => Count Normalize Quantize 1600 1600 1600 1600 1600 Wn Wp

0 0 0 0 0 −0.05 0 0.05 −0.05 0 0.05 −0.05 0 0.05 −0.05 0 0.05 −0.05 0 0.05 Weight-1 Value 0 1Weight Value Weight-1 Value-t 0 t Weight1 Value Weight-1 Value 0 1 -Wn 0 Wp (a) (b) (c) (d) (e) gradient1 gradient2 Figure 2: Weight distribution of the original GoogLeNet (a), pruned GoogLeNet (b), after retraining Loss the sparsity-constrainedFeed Forward GoogLeNetBack (c), Propagate ignoring the sparistyInference constraint Time and recovering the zero weights (d), and after retraining the dense network (e).

Initial Dense Training: The ﬁrst D step learns the connection weights and importance via normal network training on the dense network. Unlike conventional training, however, the goal of this D step is not only to learn the values of the weights; we are also learning which connections are important. We use the simple heuristic to quantify the importance of the weights using their absolute value. Sparse Training: The S step prunes the low-weight connections and trains a sparse network. We applied the same sparsity to all the layers, thus there’s a single hyper parameter: the sparsity, the percentage of weights that are pruned to 0. For each layer W with N parameters, we sorted the parameters, picked the k-th largest one = Sk as the threshold where k = N (1 sparsity), and generated a binary mask to remove all the weights smaller than . Details are shown⇤ in Algorithm 1 . The reason behind removing small weight is partially due to the Taylor expansion of the loss function, shown in Equation (1)(2). We want to minimize the increase in Loss when conducting hard threshold in pruning, so we need to minimize the ﬁrst and second terms in equation 2. Since we are zeroing out parameters, Wi is actually Wi 0=Wi. At local minimum point with @Loss/@Wi 0 @2Loss 2 ⇡2 and 2 > 0, only the second order term matters. Since second order gradient @ Loss/@Wi is @Wi expensive to calculate and Wi has a power of 2, we use Wi as the metric of pruning. Smaller Wi means smaller increase to the loss function. | | | |

Loss = f(x, W1,W2,W3...) (1) 2 @Loss 1 @ Loss 2 Loss = Wi + 2 Wi + ... (2) @Wi 2 @Wi Retraining while enforcing the binary mask in each iteration, we converted a dense network into a sparse network which has a known sparsity support and can fully recover or even increase the original accuracy of initial dense model under the sparsity constraint. The sparsity can be tuned using validation and we found values between 25% and 50% generally work well in our experiments. Final Dense Training: The final D step recovers the pruned connections, making the network dense again. These previously-pruned connections are initialized to zero and the entire network is retrained with 1/10 the original learning rate (since the sparse network is already at a good local minima). Hyper parameters like dropout ratios and weight decay remained unchanged. By restoring the pruned connections, the final D step increases the model capacity of the network and make it possible to arrive at a better local minima compared with the sparse model from S step. To visualize the DSD training flow, we plotted the progression of weight distribution in Figure 2. The figure is plotted using GoogLeNet inception_5b3x3 layer, and we found that this progression of weight distribution is very representative for VGGNet and ResNet as well. The original distribution of weight is centered on zero with tails dropping off quickly. Pruning is based on absolute value so after pruning the large center region is truncated away. The network parameters un-truncated adjust themselves during the retraining phase, so in (c) the boundary becomes soft and forms a bimodal distribution. In (d), at the beginning of the re-dense training step, all the pruned weights come back again and are reinitialized to zero. Finally, in (e), the previously-pruned weights are retrained together with the survived weights. In this step, we kept the same learning hyper-parameters (weight decay, learning rate, etc.) for reborn weights and old weights. Comparing Figure (d) and (e), the old weights’ distribution almost remained the same, while the new weights become more spread around zero. The overall mean absolute value of the weight distribution is much smaller.

3 Trained Ternary Quantization

Trained Normalized Intermediate Ternary Weight Final Ternary Weight Full Precision Weight Full Precision Weight Quantization Scale Normalize Quantize Wn Wp

-1 0 1 -1 -t 0 t 1 -1 0 1 -Wn 0 Wp

gradient1 gradient2 Loss Feed Forward Back Propagate Inference Time

Zhu, Han, Mao, Dally. Trained Ternary Quantization, ICLR’17 Pruning Trained Quantization Huffman Coding Under review as a conference paper at ICLR 2017

Equation 2. We use scaled gradients for 32-bit weights: @L W p :˜w > l ⇥ @wt l l 8 l @L > @L = > 1 t : w˜l l (8) @w˜l > ⇥ @wl | |  <> n @L Wl t :˜wl < l > ⇥ @wl > > Note we use scalar number 1 as factor of:> gradients of zero weights. The overall quantization process is illustrated as Figure 1. The evolution of the ternary weights from different layers during training is shown in Figure 2. We observe that as training proceeds, different layers behave differently: for the p n ﬁrst quantized conv layer, the absolute values of Wl and Wl get smaller and sparsity gets lower, p n while for the last conv layer and fully connected layer, the absolute values of Wl and Wl get larger and sparsity gets higher. We learn the ternary assignments (index to the codebook) by updating the latent full-resolution weights during training. This may cause the assignments to change between iterations. Note that the thresholds are not constants as the maximal absolute values change over time. Once an updated weight crosses the threshold, the ternary assignment is changed. p n The beneﬁts of using trained quantization factors are: i) The asymmetry of Wl = Wl enables neural networks to have more model capacity. ii) Quantized weights play the role of6 "learning rate multipliers" during back propagation.

3.2 QUANTIZATION HEURISTIC

In previous work on ternary weight networks, Li & Liu (2016) proposed Ternary Weight Networks (TWN) using as thresholds to reduce 32-bit weights to ternary values, where is deﬁned ± l ± l as Equation 5. They optimized value of l by minimizing expectation of L2 distance between full precision weights and ternary weights.± Instead of using a strictly optimized threshold, we adopt different heuristics: 1) use the maximum absolute value of the weights as a reference to the layer’s threshold and maintain a constant factor t for all layers:

= t max( w˜ ) (9) l ⇥ | | and 2) maintain a constant sparsity r for all layers throughout training. By adjusting the hyper- parameterWeightr we are able to obtainEvolution ternary weight networks during with various Training sparsities. We use the ﬁrst method and set t to 0.05 in experiments on CIFAR-10 and ImageNet dataset and use the second one to explore a wider range of sparsities in section 5.1.1.

res1.0/conv1/Wn res1.0/conv1/Wp res3.2/conv2/Wn res3.2/conv2/Wp linear/Wn linear/Wp 3 2 1

0 -1 -2 Ternary Weight Value Value Weight Ternary -3 Negatives Zeros Positives Negatives Zeros Positives Negatives Zeros Positives 100%

75%

50%

Percentage 25% Ternary Weight Weight Ternary 0% 0 50 100 150 0 50 100 150 0 50 100 150 Epochs

Figure 2: Ternary weights value (above) and distribution (below) with iterations for different layers of ResNet-20 on CIFAR-10.

4 Zhu, Han, Mao, Dally. Trained Ternary Quantization, ICLR’17

1 Visualization of the TTQ Kernels

Zhu, Han, Mao, Dally. Trained Ternary Quantization, ICLR’17 Pruning Trained Quantization Huffman Coding Error Rate on ImageNet

Zhu, Han, Mao, Dally. Trained Ternary Quantization, ICLR’17 Pruning Trained Quantization Huffman Coding Part 1: Algorithms for Efficient Inference

• 1. Pruning

• 2. Weight Sharing

• 3. Quantization

• 4. Low Rank Approximation

• 5. Binary / Ternary Net

• 6. Winograd Transformation 3x3 DIRECT Convolutions Compute Bound

9xC FMAs/Output: Math Intensive Image Tensor 0 8 1 7 2 6 0 1 2 3 4 5 3 5 4 4 5 3 6 7 8 ∑ Filter 6 2 7 1 8 0 8 7 6 ✽ 5 4 3 2 1 0 9xK FMAs/Input: Good Data Reuse

4 0 4 1 4 2

4 3 4 4 4 5

4 6 4 7 4 8

Direct convolution: we need 9xCx4 = 36xC FMAs for 4 outputs

Julien Demouth, Convolution OPTIMIZATION: Winograd, NVIDIA

73 3x3 WINOGRAD Convolutions Transform Data to Reduce Math Intensity

4x4 Tile

Data Transform ∑ over C

Point-wise Output Transform Filter multiplication

Filter Transform

Direct convolution: we need 9xCx4 = 36xC FMAs for 4 outputs Winograd convolution: we need 16xC FMAs for 4 outputs: 2.25x fewer FMAs

See A. Lavin & S. Gray, ”Fast Algorithms for Convolutional Neural Networks Julien Demouth, Convolution OPTIMIZATION: Winograd, NVIDIA

74 Speedup of Winograd Convolution

VGG16, Batch Size 1 – Relative Performance

cuDNN 3 cuDNN 5

2.00

1.50

1.00

0.50

0.00 conv 1.1 conv 1.2 conv 2.1 conv 2.2 conv 3.1 conv 3.2 conv 4.1 conv 4.2 conv 5.0

Measured on Maxwell TITAN X

Julien Demouth, Convolution OPTIMIZATION: Winograd, NVIDIA

75 Agenda

Algorithm

Algorithms for Algorithms for Efﬁcient Inference Efﬁcient Training

Inference Training

Hardware for Hardware for Efﬁcient Inference Efﬁcient Training Hardware Hardware for Efficient Inference a common goal: minimize memory access

Sparse Matrix Read Unit. The sparse-matrix read unit uses pointers pj and pj+1 to read the non-zero elements (if SpMat any) of this PE’s slice of column Ij from the sparse-matrix SRAM. Each entry in the SRAM is 8-bits in length and contains one 4-bit element of v and one 4-bit element of x. Act_0 Act_1 For efficiency (see Section VI) the PE’s slice of encoded Ptr_Even Arithm Ptr_Odd sparse matrix I is stored in a 64-bit-wide SRAM. Thus eight entries are fetched on each SRAM read. The high 13 bits of the current pointer p selects an SRAM row, and the low SpMat 3-bits select one of the eight entries in that row. A single (v, x) entry is provided to the arithmetic unit each cycle. Arithmetic Unit. The arithmetic unit receives a (v, x) Figure 5. Layout of one PE in EIE under TSMC 45nm process. entry from the sparse matrix read unit and performs the Eyeriss DaDiannaomultiply-accumulate operation b = b TPU+ v a . Index Table II x x ⇥ j THE IMPLEMENTATION RESULTSEIE OF ONE PE IN EIE AND THE x is used to index an accumulator array (the destination BREAKDOWN BY COMPONENT TYPE (LINE 3-7), BY MODULE (LINE MIT CASactivation registers) while v is multipliedGoogle by the activation 8-13). THE CRITICAL PATH OF EIE IS 1.15 NS value at the head of the activation queue. Because v is stored StanfordPower Area (%) 2 (%) in 4-bit encoded form, it is first expanded to a 16-bit fixed- (mW) (µm ) eDRAM Total 9.157 638,024 RS Dataflow point number via a table look up.8-bit A bypass pathInteger is provided memoryCompression/ 5.416 (59.15%) 594,786 (93.22%) to route the output of the adder to its input if the same clock network 1.874 (20.46%) 866 (0.14%) accumulator is selected on two adjacent cycles. register 1.026 (11.20%) 9,465 (1.48%) combinationalSparsity 0.841 (9.18%) 8,946 (1.40%) Activation Read/Write.“ThisThe unit Activation is designed Read/Write Unit for densefiller cell 23,961 (3.76%) contains two activation register files that accommodate the Act queue 0.112 (1.23%) 758 (0.12%) source and destinationmatrices. activation values Sparse respectively architectural during PtrRead 1.807 (19.73%) 121,849 (19.10%) SpmatRead 4.955 (54.11%) 469,412 (73.57%) a single round of FCsupport layer computation. was omitted The source for and time-to-ArithmUnit 1.162 (12.68%) 3,110 (0.49%) destination register files exchange their role for next layer. ActRW 1.122 (12.25%) 18,934 (2.97%) Thus no additional datadeploy transfer reasons. is needed to support Sparsity multi- willfiller have cell 23,961 (3.76%) layer feed-forward computation. Each activation registerhigh filepriority holds 64 16-bitin future activations. designs”Central Unit: I/O and Computing. In the I/O mode, all of This is sufficient to accommodate 4K activation vectors the PEs are idle while the activations and weights in every across 64 PEs. Longer activation vectors can be accommo- PE can be accessed by a DMA connected with the Central dated with the 2KB activation SRAM. When the activation Unit. This is one time cost. In the Computing mode, the vector has a length greater than 4K, the M V will be CCU repeatedly collects a non-zero value from the LNZD Compression Acceleration Regularization ⇥ completed in several batches, where each batch is of length quadtree and broadcasts this value to all PEs. This77 process 4K or less. All the local reduction is done in the register continues until the input length is exceeded. By setting the file. The SRAM is read only at the beginning and written at input length and starting address of pointer array, EIE is the end of the batch. instructed to execute different layers. Distributed Leading Non-Zero Detection. Input activations are hierarchically distributed to each PE. To take V. E VA L UAT I O N METHODOLOGY advantage of the input vector sparsity, we use leading non- Simulator, RTL and Layout. We implemented a custom zero detection logic to select the first non-zero result. Each cycle-accurate C++ simulator for the accelerator aimed to group of 4 PEs does a local leading non-zero detection on model the RTL behavior of synchronous circuits. Each their input activation. The result is sent to a Leading Non- hardware module is abstracted as an object that implements zero Detection Node (LNZD Node) illustrated in Figure 4. two abstract methods: propagate and update, corresponding Each LNZD node finds the next non-zero activation across to combination logic and the flip-flop in RTL. The simulator its four children and sends this result up the quadtree. The is used for design space exploration. It also serves as a quadtree is arranged so that wire lengths remain constant as checker for RTL verification. we add PEs. At the root LNZD Node, the selected non-zero To measure the area, power and critical path delay, we activation is broadcast back to all the PEs via a separate implemented the RTL of EIE in Verilog. The RTL is verified wire placed in an H-tree. against the cycle-accurate simulator. Then we synthesized Central Control Unit. The Central Control Unit (CCU) EIE using the Synopsys Design Compiler (DC) under the is the root LNZD Node. It communicates with the master, TSMC 45nm GP standard VT library with worst case PVT for example a CPU, and monitors the state of every PE by corner. We placed and routed the PE using the Synopsys IC setting the control registers. There are two modes in the compiler (ICC). We used Cacti [25] to get SRAM area and Google TPU

David Patterson and the Google TPU Team, In-Data Center Performance Analysis of a Tensor Processing Unit

78 Google TPU

● The Matrix Unit: 65,536 (256x256) 8-bit multiply-accumulate units ● 700 MHz clock rate ● Peak: 92T operations/second ○ 65,536 * 2 * 700M ● >25X as many MACs vs GPU ● >100X as many MACs vs CPU ● 4 MiB of on-chip Accumulator memory ● 24 MiB of on-chip Unified Buffer (activation memory) ● 3.5X as much on-chip memory vs GPU ● Two 2133MHz DDR3 DRAM channels ● 8 GiB of off-chip weight DRAM memory

David Patterson and the Google TPU Team, In-Data Center Performance Analysis of a Tensor Processing Unit

79 Google TPU

David Patterson and the Google TPU Team, In-Data Center Performance Analysis of a Tensor Processing Unit

80 Inference Datacenter Workload

Layers TPU Ops / TPU Nonlinear % Name LOC Weights Weight Batch function Deployed FC Conv Vector Pool Total Byte Size MLP0 0.1k 5 5 ReLU 20M 200 200 61% MLP1 1k 4 4 ReLU 5M 168 168 sigmoid, LSTM0 1k 24 34 58 52M 64 64 tanh 29% sigmoid, LSTM1 1.5k 37 19 56 34M 96 96 tanh CNN0 1k 16 16 ReLU 8M 2888 8 5% CNN1 1k 4 72 13 89 ReLU 100M 1750 32

David Patterson and the Google TPU Team, In-Data Center Performance Analysis of a Tensor Processing Unit

81 Roofline Model: Identify Performance Bottleneck

Samuel Williams, Andrew Waterman, and David Patterson. "Roofline: an insightful visual performance model for multicore architectures."Communications of the ACM 52.4 (2009): 65-76. David Patterson and the Google TPU Team, In-Data Center Performance Analysis of a Tensor Processing Unit

82 TPU Roofline

David Patterson and the Google TPU Team, In-Data Center Performance Analysis of a Tensor Processing Unit

83 Log Rooflines for CPU, GPU, TPU

Star = TPU Triangle = GPU Circle = CPU

David Patterson and the Google TPU Team, In-Data Center Performance Analysis of a Tensor Processing Unit

84 Linear Rooflines for CPU, GPU, TPU

Star = TPU Triangle = GPU Circle = CPU

David Patterson and the Google TPU Team, In-Data Center Performance Analysis of a Tensor Processing Unit

85 Why so far below Rooflines?

Low latency requirement => Can’t batch more => low ops/byte

How to Solve this? less memory footprint => need compress the model

Challenge: Hardware that can infer on compressed model

86 [Han et al. ISCA’16] EIE: the First DNN Accelerator for Sparse, Compressed Model

Compression Acceleration Regularization 87 [Han et al. ISCA’16] EIE: the First DNN Accelerator for Sparse, Compressed Model

0 * A = 0 W * 0 = 0 2.09, 1.92=> 2

Sparse Weight Sparse Activation Weight Sharing 90% static sparsity 70% dynamic sparsity 4-bit weights

10x less computation 3x less computation

5x less memory footprint 8x less memory footprint

Compression Acceleration Regularization 88 EIE: Reduce Memory Access by Compression

~a 0 a1 0 a3 ~b ⇥ PE0 w0,0w0,1 0 w0,3 b0 b0 PE1 0 0 0 w1,2 0 1 0 b11 0 b1 1 PE2 0 w 0 w b 0 B 2,1 2,3C B 2C B C B C B C B C logically PE3 B 0 0 0 0 C B b3C ReLU B b3 C B C = B C B C B 0 0 w4,2w4,3C B b4C ) B 0 C B C B C B C Bw 0 0 0 C B b C B b C B 5,0 C B 5C B 5 C B C B C B C B 0 0 0 w6,3C B b6C B b6 C B C B C B C B 0 w7,1 0 0 C B b7C B 0 C B C B C B C @ A @ A @ A

Virtual Weight W0,0 W0,1 W4,2 W0,3 W4,3 physically Relative Index 0 1 2 0 0

Column Pointer 0 1 2 3

Han et al. “EIE: Efficient Inference Engine on Compressed Deep Neural Network”, ISCA 2016, Hotchips 2016

1 [Han et al. ISCA’16] Dataflow

~a 0 a1 0 a3 ~b ⇥ PE0 w0,0w0,1 0 w0,3 b0 b0 PE1 0 0 0 w1,2 0 1 0 b11 0 b1 1 PE2 0 w 0 w b 0 B 2,1 2,3C B 2C B C B C B C B C PE3 B 0 0 0 0 C B b3C ReLU B b3 C B C = B C B C B 0 0 w4,2w4,3C B b4C ) B 0 C B C B C B C Bw 0 0 0 C B b C B b C B 5,0 C B 5C B 5 C B C B C B C B 0 0 0 w6,3C B b6C B b6 C B C B C B C B 0 w7,1 0 0 C B b7C B 0 C B C B C B C @ A @ A @ A