Accurately Modeling of Zero Biased Schottky-Diodes at Millimeter-Wave Frequencies

Article Accurately Modeling of Zero Biased Schottky-Diodes at Millimeter-Wave Frequencies

Jéssica Gutiérrez 1, Kaoutar Zeljami 2, Tomás Fernández 3,* , Juan Pablo Pascual 3 and Antonio Tazón 3

1 Erzia Technologies, C/Joseﬁna de la Maza 4 - 2◦, 39012 Santander, Spain; [email protected] 2 Information and Telecommunication Systems Laboratory, Université Abdelmalek Essaâdi, Tetouan 2117, Morocco; [email protected] 3 Department of Communications Engineering, Laboratorios de Ingenieria de Telecomunicación Profesor José Luis García García, University of Cantabria, Plaza de la Ciencia, 39005 S/N Santander, Spain; [email protected] (J.P.P.); [email protected] (A.T.) * Correspondence: [email protected]; Tel.: +34-942-200-887

Received: 14 May 2019; Accepted: 17 June 2019; Published: 20 June 2019

Abstract: This paper presents and discusses the careful modeling of a Zero Biased Diode, including low-frequency noise sources, providing a global model compatible with both wire bonding and ﬂip-chip attachment techniques. The model is intended to cover from DC up to W-band behavior, and is based on DC, capacitance versus voltage, as well as scattering and power sweep harmonics measurements. Intensive use of 3D EM (ElectroMagnetic) simulation tools, such as HFSSTM, was done to support Zero Biased Diode parasitics modeling and microstrip board modeling. Measurements are compared with simulations and discussed. The models will provide useful support for detector designs in the W-band.

Keywords: W band; Schottky Diode Detectors; ZBD modeling; wire bonding; ﬂip-chip

1. Introduction Schottky diodes play an important role in several functions, such as rectification [1,2], mixing [3,4], and detection in all the range of microwave frequencies, up to the W-band and beyond [4]. In general, modeling of the diodes is a critical task in the design process of circuits operating at high frequencies [3,4]. Antimony (Sb) heterostructure backward diodes offer better noise performance with easier matching to 50 Ohm [5] compared to GaAs Schottky diodes, but may not always be easily accessible or available as discrete components [6]. Series 9161 diodes (Keysight HSCH and MACOM-Metelics MZBD) models are frequently used for hybrid detectors below the W-band [7–9], though also in the W-band [10–13]. Zero-bias Schottky diodes from ACST (Advanced Compound Semiconductor Technologies GmbH) (https://acst.de/) operating as power sensors have been reported in [14]. Zero Bias Diodes Schottky diodes from Virginia Diode Inc. (VDI) were used for W-band detection in [6,15]. Available manufacturer information (https://www.vadiodes.com/images/pdfs/Spec_ Sheet_for_VDI_W_Band_ZBD.pdf) is limited and, in the absence of diode models developed by the designers themselves, commercially available models could be required. Usually, the device modeling is accomplished by discriminating between the modeling of the intrinsic component (characterized by quasi-static I-V and C-V measurements) and the extrinsic elements (characterized by 3D Electro-Magnetic (EM) tools, along with the measurement of the Scattering parameters at some specific bias points). In [16], modeling techniques are presented to extract a Schottky diode model analytically using additional fabricated structures (such as short and open circuits) for the de-embedding of parasitic capacitances and other effects. Unfortunately, it is not

Electronics 2019, 8, 696; doi:10.3390/electronics8060696 www.mdpi.com/journal/electronics Electronics 2019, 8, x FOR PEER REVIEW 2 of 14 Electronics 2019, 8, 696 2 of 13 notElectronics always 2019 possible, 8, x FOR to PEER have REVIEW such customized cal kit (calibration kit) structures available. Previous2 of 14 alwaysefforts in possible Schottky to havediode such modeling customized of Single cal kitAnode (calibration (SA) VDI kit) devices structures were available. presented Previous in [17]. In eff ortsthis inpaper, Schottkynot always ZBD diode(Zero possible modeling Bias to Diode)have of such Single devices customized Anode from (SA) VDIcal VDIkit have (calibration devices been carefullywere kit) presentedstructures modeled, inavailable. [ 17 considering]. In Previous this paper, two ZBDdifferentefforts (Zero indiode BiasSchottky-mounting Diode) diode devices techniquesmodeling from of to VDISingle attach have Anode them been ( toSA) carefully the VDI final devices modeled,circuit were assembly: consideringpresented wire in two[17].bonding diInff thiserent and diode-mountingflippaper,-chip (also ZBD kn(Zeroown techniques Bias as controlled Diode) to attach devices collapse them from tochip the VDI connection). final have circuit been assembly:From carefully DC modeled,measurements, wire bonding considering and the flip-chipintrinsic two (alsononlineardifferent known current diode as controlled- mountingsource, along collapse techniques with chip the to connection). parasiticattach them resistor Fromto the can DCfinal be measurements, circuit obtained. assembly: Scattering the wire intrinsic bondingmeasurements nonlinear and currentof flipthe -ZBDchip source, (alsoprovide along known data with as which controlled the parasitic can be collapse used resistor to chip identify can connection). be obtained. the parasitic From Scattering DCand measurements, ex measurementstrinsic elements the ofintrinsic up the to ZBD the provideW-nonlinearband; datain thiscurrent which sense, source, can in beSection along used with2, to the identify the modeling parasitic the parasiticof resistor ZBDs canfor and wirebe extrinsic obtained. bonding elements Scattering assembling up measurements to is the presented. W-band; inIn thisofSection the sense, ZBD 3, intheprovide Section modified data2, the whichmodel modeling can oriented be of used ZBDs to to the foridentify flip wire-chip bondingthe parasiticattachment assembling and technique, extrinsic is presented. elements obtained In up Sectionfrom to the the3 , W-band; in this sense, in Section 2, the modeling of ZBDs for wire bonding assembling is presented. thepreviously modified extracted model oriented diode mod to theel, flip-chip is shown; attachment low-frequency technique, noise obtained sources arefrom include the previouslyd in the In Section 3, the modified model oriented to the flip-chip attachment technique, obtained from the extractedcomplete diode diode model model, in is Section shown; 4. low-frequency Finally, some conclusions noise sources are are drawn included in Section in the 5. complete diode previously extracted diode model, is shown; low-frequency noise sources are included in the model in Section4. Finally, some conclusions are drawn in Section5. 2. Nonlinearcomplete diode Zero model Bias Diode in Section Modelling 4. Finally, some conclusions are drawn in Section 5. 2. Nonlinear Zero Bias Diode Modelling 2. NonlinearModeling ofZero the Bias ZBD Diode was basedModelling on the procedures presented in [16,17]. Firstly, a 3D model of the passiveModeling parts of for the EM ZBD simul wasation based (HFSS on theTM procedures) was built based presented on microphotographs in [16,17]. Firstly, (Figure a 3D model 1) and of Modeling of the ZBD was based on the procedures presented in [16,17]. Firstly, a 3D model of the passive parts for EM simulation (HFSSTM) was built based on microphotographs (Figure1) and physicalthe passive measurements parts for EM of simulthe criticalation (HFSSdimensions,TM) was performedbuilt based withon microphotographs a Scanning Electron (Figure Microscope 1) and physical(SEM)physical available measurements measurements in the Laboratoryof of the the critical critical of dimensions, dimensions, Science and performed Engineering with with of a a S Materials Scanningcanning E ofElectronlectron the UniversityM Microscopeicroscope of (SEM)Cantabria(SEM) available available (LADICIM). in the in Laboratory the Laboratory of Science of Scie andnce Engineering and Engineering of Materials of Materials of the University of the University of Cantabria of (LADICIM).Cantabria (LADICIM).

(a) (b) (a) (b) Figure 1. (a) General View of the ZBD using SEM (Dice about 600 × 250 µm; anode finger length about FigureFigure 1. 1.(a ()a General) General View View of of the the ZBD ZBD using using SEMSEM (Dice(Dice about 600 600 × 250250 µm;µm; anode anode finger finger length length about about 100 µm). (b) Detail of the anode finger of the ZBD (diameter about× 9 µm). Reference scale is at the 100100µm). µm). (b ()b Detail) Detail of of the the anode anode finger finger ofof thethe ZBDZBD (diameter(diameter about about 9 9 µm).µm). Reference Reference scale scale is isat atthe the bottom of the figures. bottombottom of of the the figures. figures.

2.1.2.1. DC DC Measurements Measurements and and Nonlinear Nonlinear Model Model ForFor modeling modeling purposes, purposes, as as a a starting starting point,point, the diode equequ equivalentivalentivalent circuit circuit presented presented in in Figure Figure 2 is2 2 is is herehere considered.considered. considered. InIn In thisthis this circuit, circuit, circuit, the the the main main main non-linearities nonnon--linearitieslinearities (Id (I(I Currentdd CurrentCurrent Source Source Source and and and Cj Cj Capacitance), Cj Capacitance), Capacitance), as as well as aswellwell parasitic as asparasitic parasitic elements elements elements due todue due metallization to to metallization metallization (Rs) (Rs)(Rs) and and packaging packaging (Cpp, (Cpp, (Cpp, Cp, Cp, Cp, and and and Lf), Lf), Lf), can can can be be observed.be observed. observed.

FigureFigure 2. 2.Diode Diode equivalent circuit circuit model model.. Figure 2. Diode equivalent circuit model.

ElectronicsElectronics2019 2019, ,8 8,, 696 x FOR PEER REVIEW 3 ofof 1314 Electronics 2019, 8, x FOR PEER REVIEW 3 of 14 Using a specific high-accuracy voltage-controlled current source to ensure both protection of the deviceUsingUsing during aa speciﬁcspecific the test high-accuracyhigh process-accuracy and voltage-controlledvoltageaccurate-controlled current/voltage currentcurrent measurements sourcesource toto ensureensure in both boththe low protectionprotection current ofof level thethe devicedeviceregion duringduring(below thethe1 mA), testtest the processprocess static andand I/V accurateaccuratecharacteristic currentcurrent/voltage of/ voltagethe ZBD measurementsmeasurements was measured in(Figure thethe lowlow 3). currentcurrent By means levellevel of regionregionproprietary (below(below extraction 11 mA),mA), thethe softwa staticstaticre, II/V /theV characteristiccharacteristic value of the thermionic ofof thethe ZBDZBD-field waswas emission measuredmeasured model (Figure(Figure parameters3 3).). ByBy means means [18] offorof proprietaryproprietarythe nonlinear extractionextraction current sourcesoftware,softwa (1)re, thethewere valuevalue obtained ofof thethe (Table thermionic-ﬁeldthermionic 1). -field emissionemission modelmodel parametersparameters [[18]18] forfor thethe nonlinearnonlinear currentcurrent sourcesource (1)(1) werewere obtainedobtained (Table(Table푞1 ().1).푉 − 퐼 푅 ) ( 푑 푑 푠 ) ( ) 휂퐾푇 (1) 퐼 푉푑, 푇 = 퐼푠푒 푞(푉푑 − 퐼푑 푅푠) (q(V I Rs) ) ( d 휂퐾푇− d ) (1) 퐼(푉 , 푇) = 퐼 푒 ηKT I(Vd푑, T) = I푠se (1)

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0.05 0.1 0.15 0.2 0.25 0.3 Voltage V (V) 0.05 0.1 0.15 d 0.2 0.25 0.3 Voltage V (V) d FigureFigure 3.3. I-VI-V measuredmeasured currentcurrent forfor thethe ZBDZBD SchottkySchottky diodediode underunder testing.testing. Figure 3. I-V measured current for the ZBD Schottky diode under testing. TableTable 1. 1.Extracted Extracted valuevalue ofof parametersparameters inin EquationEquation (1).(1). Table 1. Extracted value of parameters in Equation (1). ParameterParameter ValueValue Parameter Value5 −5 IsI(A)s (A) 2.782.7810 × 10 × − Isη (ηA) 2.781.371.37 × 10 −5 푞= q 훼 =α ⁄ ηkT (1/V) 1.3728.6 푞 휂푘푇 28.6 훼 = (1⁄/V) (1/V) R휂푘푇s (Ω) 28.66.48 Rs (Ω) 6.48 Rs (Ω) 6.48 2.2. Low-Frequency Model 2.2. Low-Frequency Model 2.2. Low-Frequency Model At lower microwave frequencies, the equivalent circuit of the unbiased, or negatively biased, At lower microwave frequencies, the equivalent circuit of the unbiased, or negatively biased, diodeAt can lower be reduced microwave to a “π”frequencies, electrical the network equivalent of capacitances, circuit of the as depiunbiased,cted in or Figure negatively 4. biased, diode can be reduced to a “π” electrical network of capacitances, as depicted in Figure4. diode can be reduced to a “π” electrical network of capacitances, as depicted in Figure 4.

Figure 4. Low-frequency equivalent circuit model of the passive diode. Figure 4. Low-frequency equivalent circuit model of the passive diode. Figure 4. Low-frequency equivalent circuit model of the passive diode. The above “π” network accounts for the total capacitance CT, as well as the small-value parasitic capacitancesThe above to “π” the ne groundtwork accounts (if considered), for the total Cm1 capacitanceand Cm2, where CT, as wellCT i sas thethe sumsmall of-value the parasitic junction capacitancescapacitance C toj and the the ground parasi tic (if capacit considered),ances C Cpp,m 1as and show Cnm2 in, whereEquation CT (2).is the sum of the junction capacitance Cj and the parasitic capacitances Cpp, as shown in Equation (2).

Electronics 2019, 8, 696 4 of 13

The above “π” network accounts for the total capacitance CT, as well as the small-value parasitic capacitancesElectronics 2019, to8, x the FOR ground PEER REVIEW (if considered), Cm1 and Cm2, where CT is the sum of the junction capacitance4 of 14 Electronics 2019, 8, x FOR PEER REVIEW 4 of 14 Cj and the parasitic capacitances Cpp, as shown in Equation (2).

퐶푗0 퐶푇 = 퐶푗(푉) + 퐶푝푝 = 퐶C푗0j0 + 퐶푝푝 C퐶T푇==C퐶푗j(V푉) + 퐶C푝푝pp = q 푉푑 ++퐶C푝푝pp (2(2)) √1 − 푉Vd (2) 1 휙푑푏푖 √1 − φbi −휙푏푖 An accurate estimation of the total capacitance can be extracted from the measured value of the AnAn accurate accurate estimation estimation of of the the total total capac capacitanceitance can can be be extracted extracted from from the the measured measured value value of of the the S21 scattering parameter (Figure 5) when a negative bias, Vd, is applied to the diode. Parameter S21 S2121 scatteringscattering parameter parameter ( (FigureFigure 5)) whenwhen aa negativenegative bias,bias, Vd,, is is applied to thethe diode.diode. ParameterParameter SS2121 essentially depends on the total capacitance, CT (the junction capacitance Cj at Vd = 0 V, Cj0, junction essentiallyessentially depends on the totaltotal capacitance,capacitance, CCTT (the(the junctionjunction capacitancecapacitance CCj j atat VVdd = 00 V, V, Cjj0,, junc junctiontion potential, 휙푏푖, and the parasitic capacitance Cpp). Scattering parameters of the diode were measured potential, φ휙 ,, andand thethe parasiticparasitic capacitancecapacitance CCpppp). Sca Scatteringttering parameters parameters of of the the diode diode were were measured measured from 2 GHzbi푏푖 up to 50 GHz; however, for capacitance extraction purposes, only the frequency range of fromfrom 2 2 GHz GHz up up to to 50 50 GHz; GHz; however, however, for for capacitance capacitance extraction extraction purposes, purposes, only only the the frequency frequency range range of of 3–10 GHz was used, considering the equivalent circuit in Figure 4. By varying the negative Vd voltage 33–10–10 GHz was used, considering the equivalent circuit in FigureFigure4 4.. ByBy varyingvarying thethe negativenegative Vd voltagevoltage applied to the diode, and performing the measurement of the scattering parameters of the ddiode at applied to to the diode, and performing the the measurement of of the scattering parameters parameters of of the the diode diode at at each voltage, it was possible to extract the values of the CT capacitance as a function of this voltage. eacheach voltage, it it was possible possible to to extract extract the the values values of of the the CT capacitancecapacitance as as a a function function of of this this voltage. voltage. In Figure 6, the extracted Capacitance versus Voltage (C-V)T plot is presented. In Table 2, the values of InIn Figure Figure 66,, thethe extractedextracted CapacitanceCapacitance versusversus VoltageVoltage ((C-VC-V) plot plot is is presented presented.. In In Table Table 22,, thethe valuesvalues ofof the elements of the circuit in Figure 2, as well as the parameters of Equation (2), are presented. thethe elements elements of of the the circuit circuit in Figure 22,, asas wellwell asas thethe parametersparameters ofof EquationEquation (2),(2), areare presented.presented.

Figure 5. Measurements and modelling of transmission coefficient for the unbiased (Vd = 0 V) ZBD. Figure 5. Measurements and modelling of transmission coecoefficienﬃcientt for the unbiasedunbiased ((VVd = 00 V V)) ZBD ZBD..

Figure 6. Results for the extraction of total capacitance of the ZBD from scattering parameters. Figure 6. Results for the extraction of total capacitance of the ZBD from scattering parameters. Figure 6. Results for the extraction of total capacitance of the ZBD from scattering parameters. In principle, the results obtained in the extraction from the S-parameters offer more accurate In principle, the results obtained in the extraction from the S-parameters offer more accurate estimations of nonlinear and parasitic capacitances of this diode, compared to other extraction estimations of nonlinear and parasitic capacitances of this diode, compared to other extraction methods based on low-frequency impedance measurements. This also avoids other potential methods based on low-frequency impedance measurements. This also avoids other potential

Electronics 2019, 8, 696 5 of 13

In principle, the results obtained in the extraction from the S-parameters oﬀer more accurate estimations of nonlinear and parasitic capacitances of this diode, compared to other extraction methods based on low-frequency impedance measurements. This also avoids other potential problems of low-frequency measurements, such as uncertainty in the de-embedding of the parasitic eﬀects of probes. Electronics 2019, 8, x FOR PEER REVIEW 5 of 14 Table 2. Value of parameters of Equation (2). problems of low-frequency measurements, such as uncertainty in the de-embedding of the parasitic effects of probes. Parameter Value

Table 2. ValueCT of(fF) parameters of 26 Equation (2). Cj0 (fF) 10 Parameter Value Cpp (fF) 16 T φbiC(V(fF)) 260.16 CmC1j0 (fF)(fF) 10 50 CmC2pp(fF) (fF) 16 50 휙푏푖 (V) 0.16 Cm1 (fF) 50 2.3. Modified ZBD Model Up to W-Band Cm2 (fF) 50 At high frequencies, from 75 GHz up to 110 GHz, additional parasitic effects arise which affect2.3. the Modified behavior ZBD of Model the diode;Up to W thus,-Band it is critical to evaluate and model them. This is really a complex taskAt high due frequencies, to the diffi fromculties 75 GHz involved up to 110 in theGHz, de-embedding additional parasitic process effects of arise the which access affect elements, such asthe coplanar-to-microstrip behavior of the diode; thus, (CPW-M) it is critical transitions to evaluate and and bonding model them. wires This used is inreally the a circuit complex assembly task to implementdue to thethe difficulties input and involved output in connections. the de-embedding This isprocess the reason of the access why, elements, although such the as diode coplanar is usually- consideredto-mic asrostrip a one-port (CPW-M) element, transitions with and the bonding cathode wires or used the anode in the circuit grounded, assembly we to are implement going to the perform input and output connections. This is the reason why, although the diode is usually considered as a measurements being anode and cathode the electric ports, considering the diode as a two-port electrical one-port element, with the cathode or the anode grounded, we are going to perform measurements network,being allowing anode and to identifycathode the the electric effect ofports, grounding. considering the diode as a two-port electrical network, Firstly,allowing modeling to identify of the the effect coplanar of grounding. to microstrip (CPW-M) transitions was performed, as reported in [17]. OnceFirstly, the modelmodeling of o thef the CPW-M coplanar transition to microstrip was (CPW obtained,-M) transitions the modeling was per offormed, the ZBD, as reported when using the wirein bonding[17]. Once attachmentthe model of technique, the CPW-M was transition possible was from obtained, the measurements the modeling of performed the ZBD, when at the using coplanar probethe station wire using bonding a LRRM attachment (Line-Reflect-Reflect-Match) technique, was possible from calibration. the measurements A de-embedding performed at procedure the in Keysightcoplanar ADS probe™ [19 station] was using performed a LRRM considering (Line-Reflect the-Reflect previously-Match) calibration. obtained model A de-embedding of the CPW-M procedure in Keysight ADS™ [19] was performed considering the previously obtained model of the transition along with the gold bonding wire model. CPW-M transition along with the gold bonding wire model. In FigureIn Figure7, the 7 reflection, the reflection and and transmission transmission coe coefficientfficientss from from thethe equivalentequivalent circuit circuit simulation simulation are comparedare compared with the with experimental the experimental measurements measurements in two in two frequency frequency ranges ranges (2–50 (2–50 GHz GHz and and 75–11075–110 GHz) for theGHz) unbiased for the diode unbiased (Vd =diode0 V). (V Fromd = 0 V). these From results, these itresults, can be it concludedcan be concluded that the that degree the degree of agreement of betweenagreement both results between is excellent.both results Therefore, is excellent. the Therefore, modeling the procedure modeling procedure proposed proposed provides provides a model that can simulatea model thethat behavior can simulate of ZBDthe behavior from the of DCZBD upfrom to the 110 DC GHz. up to 110 GHz. ) ) ) 1 , 1 2 , , 1 1 ( 1 ( (

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SP3.SP.S(2,1) SP1.SP.S(8,7) SP1.SP.S(2,1) SP2.SP.S(2,1) SP2.SP.S(5,5)

SP2.SP.S(5,5) SP2.SP.S(10,9) SP2.SP.S(5,5)

SP1.SP.S(1,1) SP1.SP.S(7,7) SP3.SP.S(1,1) SP2.SP.S(5,5) SP2.SP.S(5,5) SP2.SP.S(10,9)SP2.SP.S(5,5) SP2.SP.S(10,9) SP2.SP.S(10,9) S11_new_total S11_new_total S11_new_totalS11_new_total S11_new_total S11_new_total SP1.SP.S(2,1) SP1.SP.S(2,1) SP1.SP.S(2,1) S11, Modelo freq (2.000GHz-110.0 GHz) S21, Mfreqodelo (75.00GHzfreq (2.0SP1.SP.S(1,1)00GH zto-11 110.0GHz)0.0 GHz) S22, Mfreqodelo (75.00GHzfreq (2.0SP1.SP.S(1,1)00GHz -to11 0110.0GHz).0 GHz) freq (2.000GHzSP1.SP.S(1,1) to 50.00GHz) S (dB) Modeling Freq (2GHz-110GHz) SP1.SP.S(1,1) S (dB) Modeling Freq (2GHz-110GHz) SP1.SP.S(1,1) SP1.SP.S(1,1) 21freq (2.000GHz to 50.00GHz) S22,22 Mfreqedida s(2.000GHz freq (2SP1.SP.S(8,7).000GH zto-5 050.00GHz).00 GHz) S11, Mefreqdida s(75.00GHz freq (2SP1.SP.S(8,7).000GH toz-5 0110.0GHz)SP2.SP.S(2,1).00 GHz) S21, Medidas freq (2SP1.SP.S(8,7).000GSP2.SP.S(2,1)Hz-50.00 GHz) SP2.SP.S(2,1) S (dB) Measurement Freq (2GHz-50GHz) S22freq(dB) Measurement(2.000GHz to Freq 110.0GHz) (2GHz-50GHz) freq (2.000GHz to 110.0GHz)SP2.SP.S(5,5) S21, 21Mfreqedida s(2.000GHz freq (75.00GSP2.SP.S(5,5)H toz-1 1110.0GHz)0.0 GHz) S22, Medidas freSP2.SP.S(5,5)q (75.00GHz-110.0 GHz) SP2.SP.S(5,5)S11, Medidas freq (75.00GHz-110.0 GHSP2.SP.S(5,5)z) SP2.SP.S(5,5) SP2.SP.S(10,9)SP3.SP.S(2,1) SP3.SP.S(2,1)SP2.SP.S(10,9) S (dB) MeasurementSP3.SP.S(2,1)SP2.SP.S(10,9) Freq (75GHz-110GHz) S22(dB) Measurement Freq (75GHz-110GHz) 21 S11_new_total S11_new_total S11_new_totalS11_new_total S11_new_total S11_new_total SP1.SP.S(2,1) SP1.SP.S(2,1) SP1.SP.S(2,1) S11, Modelo freq (2.000GHz-110.0 GHz) S21, Mfreqodelo (75.00GHzfreq (2.0SP1.SP.S(1,1)00GH zto-11 110.0GHz)0.0 GHz) S22, Mfreqodelo (75.00GHzfreq (2.0SP1.SP.S(1,1)00GHz -to11 0110.0GHz).0 GHz) freq (2.000GHzSP1.SP.S(1,1) to 50.00GHz) S (dB) Modeling Freq (2GHz-110GHz) SP1.SP.S(1,1) S (dB) Modeling Freq (2GHz-110GHz) SP1.SP.S(1,1) SP1.SP.S(1,1) 21 S22,22 Mfreqedida s(2.000GHz freq (2.000GH zto-5 050.00GHz).00 GHz)

S11, Mefreqdida s(75.00GHz freq (2SP1.SP.S(8,7).000GH toz-5 0110.0GHz).00 GHz) S21, Mfreqedida s(2.000GHz freq (2SP1.SP.S(8,7).000GH toz-5 50.00GHz)0.00 GHz) SP1.SP.S(8,7)

-0.6 -0.4 -0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6

S (dB) Measurement Freq (2GHz-50GHz) S freq(dB) Measurement(2.000GHz to Freq 110.0GHz) (2GHz-50GHz) -0.5

-0.6 -0.4 -0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6

-0.5 22

-0.6 -0.4 -0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6 freq (2.000GHz to 110.0GHz) -0.5 S11, Mefreqdida s(2.000GHz freq (75.00GH zto-1 1110.0GHz)0.0 GHz) S21, 21Medidas freq (75.00GHz-110.0 GHz) S22, Medidas freq (75.00GHz-110.0 GHz) Figure 7. Modelled and measured [S]-parameters of the unbiasedS (dB) diode MeasurementSP3.SP.S(2,1) (0 V) Freq after (75GHz the-110GHz) de-embedding SP3.SP.S(2,1) S21(dB) MeasurementSP3.SP.S(2,1) Freq (75GHz-110GHz) 22

in the wire bonding configuration.

SP3.SP.S(2,1) SP1.SP.S(8,7) SP1.SP.S(2,1)

SP2.SP.S(2,1)

SP2.SP.S(10,9)

SP3.SP.S(2,1) SP1.SP.S(8,7) SP1.SP.S(2,1) SP2.SP.S(2,1)

SP3.SP.S(2,1) SP1.SP.S(8,7) SP1.SP.S(2,1) SP2.SP.S(2,1) SP2.SP.S(10,9)

Figure 7. Modelled and measured [S]-parametersSP2.SP.S(10,9) of the unbiased diode (0 V) after the de-embedding

-0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6

-0.6 -0.4 -0.3 -0.2 -0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6 Figure 7. Modelled and measured [S]-parameters of-0.5 the unbiased diode (0 V) after the de-embedding inAn the increase wire bonding in the conﬁguration. series resistance value was observed in the W-band measurements; this

in the wire bonding configuration.

SP3.SP.S(2,1) SP1.SP.S(8,7) SP1.SP.S(2,1) SP2.SP.S(2,1)

SP2.SP.S(10,9)

SP3.SP.S(2,1) SP1.SP.S(8,7) SP1.SP.S(2,1) SP2.SP.S(2,1)

SP3.SP.S(2,1) SP1.SP.S(8,7) SP1.SP.S(2,1) SP2.SP.S(2,1) SP2.SP.S(10,9) singular behavior can be associated with theSP2.SP.S(10,9) skin effect above 50 GHz, the bonding wires, and An increase in the series resistance value was observed in the W-band measurements; this singular probably someAn increase other in measurement the series resistance uncer tainties. value was The observed study in of the the W extent-band measurements; of this effect this becomes behavior can be associated with the skin effect above 50 GHz, the bonding wires, and probably difficultsingular in this behavior frequency can freq band be (75.00GHz ass asociated measurementsto 110.0GHz) with the skin are effectlimitedfreq (75.00GHz above by tocalibration 50 110.0GHz) GHz, the accuracy, bonding wires,as well and as some freq (75.00GHz to 110.0GHz) some other measurementfreq uncertainties. (2.000GHz to 50.00GHz) The study offreq the (2.000GHz extent to 50.00GHz) of this effect becomes difficult in freq (2.000GHz to 50.00GHz) possibleprobably inaccuracies some other in thefreq measurement (2.000GHz determination to 110.0GHz) uncer tainties. of other The equivalent study of the circuit extent parameters, of this effect such becomes as finger freq (2.000GHz to 110.0GHz) this frequency band as measurements are limited by calibrationfreq (2.000GHz to 110.0GHz) accuracy, as well as some possible

difficult in this frequency freqband (75.00GHz as measurementsto 110.0GHz) are limitedfreq (75.00GHz by tocalibration 110.0GHz) accuracy, as well as some freq (75.00GHz to 110.0GHz)

SP1.SP.S(1,1) S11_new_total SP2.SP.S(5,5)

SP1.SP.S(1,1) S11_new_total

SP2.SP.S(5,5) inductance and parasitic capacitances.freq (2.000GHz to 50.00GHz) Nevertheless, the increase in resistance in the W-bandfreq was (2.000GHz to 50.00GHz)

SP1.SP.S(1,1) S11_new_total SP2.SP.S(5,5) freq (2.000GHz to 50.00GHz) inaccuraciespossible in inaccuracies the determination in thefreq (2.000GHz determination of other to 110.0GHz) equivalent of other circuit equivalent parameters, circuit parameters, such as ﬁnger such inductance as finger freqand (2.000GHz to 110.0GHz)

consistently found when fitting measurements of severafreq (2.000GHzl devices, to 110.0GHz) as previously reported in the

SP1.SP.S(1,1) S11_new_total SP2.SP.S(5,5)

SP1.SP.S(1,1) S11_new_total

parasiticSP2.SP.S(5,5) inductance capacitances. and parasitic Nevertheless, capacitances. the increaseNevertheless, in resistance the increase in thein resistance W-band in was the consistently W-band was found

SP1.SP.S(1,1) S11_new_total literature [20]. SP2.SP.S(5,5) when ﬁttingconsistently measurements found when of fitting several measurements devices, as previously of several devices, reported as in previously the literature reported [20 ]. in the literature [20]. 2.4. Large Signal Model Extraction and Validation 2.4. Largefreq (2.000GHz Signal Modelto 50.00GHz) Extraction and Validation freq (2.000GHz to 50.00GHz) freq (75.00GHz to 110.0GHz) freq (2.000GHz to 50.00GHz) freq (75.00GHz to 110.0GHz) freq (75.00GHz to 110.0GHz) 2.4.freq Large(2.000GHzfreq (2.000GHzSignal to 110.0GHz) Modelto 50.00GHz) Extraction and Validation freq (2.000GHzfreq (2.000GHz to 50.00GHz) to 110.0GHz) The finalfreq topology(75.00GHz to 110.0GHz) of the proposedfreqfreq (2.000GHz (2.000GHzdiode’s to to 110.0GHz) 50.00GHz) large signal model is shown infreq Figure (75.00GHz 8to 110.0GHz)[6]. The ﬁnalfreq topology(2.000GHz to 110.0GHz) of the proposedfreq diode’s(75.00GHz to 110.0GHz) large signal model is shown infreq Figure (2.000GHz8 [to6 110.0GHz)]. The final topology of the proposedfreq (2.000GHz diode’s to 110.0GHz) large signal model is shown in Figure 8 [6].

FigureFigure 8. Equivalent 8. Equivalent circuit circuit model modelof of thethe diode, including including the the extrinsic extrinsic elements. elements. Figure 8. Equivalent circuit model of the diode, including the extrinsic elements. In TableIn 3 Table, the values 3, the of values the model of the parameters model parameters obtained obtained from the from di ff theerent different measurements measurements performed In Table 3, the values of the model parameters obtained from the different measurements using theperformed extraction using procedures the extraction [16 procedures,17] are presented. [16,17] are In presented. this model, In thisCp model,represents Cp represents the finger-to-pad the performed using the extraction procedures [16,17] are presented. In this model, Cp represents the capacitancefinger- betweento-pad capacitance the anode between contact the finger anode and contact the underlying finger and active the underlying GaAs. The active bonding GaAs. resistance, The fingerbonding-to-pad resistance, capacitance R is between fixed to 0 theOhm anode at “low contact frequencies finger”, while and its the value underlying equals to 3 active Ohm in GaAs. the The R is fixed to 0 Ohm at “low frequencies”, while its value equals to 3 Ohm in the W-band. bondingW- band.resistance, R is fixed to 0 Ohm at “low frequencies”, while its value equals to 3 Ohm in the In order to validate the large-signal model of the diode, output power versus input power W-band. In order to validate the large-signal model of the diode, output power versus input power measurementsmeasurements were were compared compared with with harmonic harmonic balance balance simulations simulations performed performed in Keysight ADS™ ADS™ [19]. In order to validate the large-signal model of the diode, output power versus input power In Figure[19].9 ,In comparisons Figure 9, com betweenparisons measurementsbetween measurements and simulations, and simulations, when when a signal a signal of 1 of GHz 1 GHz is appliedis measurements were compared with harmonic balance simulations performed in Keysight ADS™ to theapplied device, are to the depicted. device, In are this depicted. graph, a In reasonable this graph, global a reasonable agreement global between agreement measurements between and [19]. In Figure 9, comparisons between measurements and simulations, when a signal of 1 GHz is simulation results can be seen at the fundamental frequency and the second and third order harmonics. applied to the device, are depicted. In this graph, a reasonable global agreement between If we focus on the highest input power level, simulations tend to overestimate the first harmonic, while the second is more accurate as the power is higher. The third harmonic is well-estimated in values, but with slight differences in the slope. This could be due to several reasons: the source current mode was originally intended to simulate the nonlinear current source in DC conditions; Electronics 2019, 8, x FOR PEER REVIEW 7 of 14

measurements and simulation results can be seen at the fundamental frequency and the second and third order harmonics. If we focus on the highest input power level, simulations tend to overestimate the first harmonic, while the second is more accurate as the power is higher. The third harmonic is Electronicswell-estimated2019, 8, 696 in values, but with slight differences in the slope. This could be due to several reasons:7 of 13 the source current mode was originally intended to simulate the nonlinear current source in DC conditions; however, the large-signal behavior depends on the model’s ability to predict harmonics, however, the large-signal behavior depends on the model’s ability to predict harmonics, something something that, in general, is difficult to guarantee as it requires a more elaborate development of the that, in general, is diﬃcult to guarantee as it requires a more elaborate development of the nonlinear nonlinear current source model. Furthermore, the influence of nonlinear capacitance should be current source model. Furthermore, the inﬂuence of nonlinear capacitance should be considered, considered, which could require a more accurate characterization at the highest power levels. which could require a more accurate characterization at the highest power levels.

Table 3. Extracted values of the parameters for the ZBD model. Table 3. Extracted values of the parameters for the ZBD model. Parameter Symbol Value Parameter Symbol Value Parameter Symbol Value Parameter Symbol Value Saturation Current Parasitic Finger −6 Saturation Current Isat 28×610 Parasitic Finger Cp 1 (A) Isat 28 10 Capacitance (fF) Cp 1 (A) × − Capacitance (fF) Pad-to-Pad Ideality Factor η 1.4 Pad-to-Pad Capacitance Cpp 16 Ideality Factor η 1.4 C 16 Capacitance(fF) (fF) pp 푞 Bonding Inductance 훼 = ⁄q (1/V) α 28.6 Bonding Inductance L1 73 α = 휂푘푇(1/V) α 28.6 L 73 ηkT (pH)(pH) 1 Junction Capacitance Bonding Inductance Junction Capacitance Cj0 10 Bonding Inductance L2 42 (Vd = 0 V) (fF) Cj0 10 (pH) L2 42 (Vd = 0 V) (fF) (pH) Series Resistance (Ω) Rs 6.5 Pad Capacitance (fF) C1 88 Series Resistance (Ω) Rs 6.5 Pad Capacitance (fF) C1 88 Junction Potential (V) 휙푏푖 0.16 Pad Capacitance (fF) C2 51 Junction Potential (V) φbi 0.16 Pad Capacitance (fF) C2 51 0 (Low FingerFinger InductanceInductance Bonding Resistance 0 (Low Frequency) L Lf 5050 Bonding Resistance (Ω) R R Frequency) (pH)(pH) f (Ω) 3 (W Band) 3 (W Band)

Simulated Results Experimental Results: f0 Experimental Results: 2f0 Experimental Results: 3f0

Figure 9. Simulated (continuous line) and measured output power versus input power. (Circles: f0, Figure 9. Simulated (continuous line) and measured output power versus input power. (Circles: f0, Inverted Triangle: 2f0, Cross: 3f0). Inverted Triangle: 2f0, Cross: 3f0). 3. Diode Modelling Oriented to Flip-Chip Attachment Technique 3. Diode Modelling Oriented to Flip-Chip Attachment Technique The previous model is a basic general-purpose model, but particularly considering W-band applications,The previous it was model necessary is a basic to achieve general a-purpose better approximation model, but particularly for the most considering commonly W- usedband attachmentapplications, technique it was necessary of the ZBD to to achieve the circuit a better assembly, approximation while being for well-based the most on commonly the previously used presentedattachment model technique extraction. of the ZBD Therefore, to the acircuit new circuitassembly, was while assembled being bywell attaching-based on a ZBDthe previously using the flip-chippresented technique, model extraction. as shown Therefore, in Figure 10a .new This circuit attachment was assembled technique by is theattaching most critical a ZBD in using terms the of theflip location-chip technique, of the diode, as shown in order in toFigure achieve 10. aThis symmetrical attachment structure technique and is to the avoid most destroying critical in the terms finger of ofthe the location diode byof placingthe diode, it in in contact order withto achieve the CPW-M a symmetrical transition. structure Please note and that, to avoid to attach destroying the flip-chip the intofinger a circuit,of the diode the chip by placing must be it inverted in contact to with bring the the CP solderW-M dotstransition. (made Please of H20E note silver that, epoxy) to attach down the ontoflip-chip the connectors into a circuit, on the circuitchip must board; be inverted then, the to solder bring is the re-melted solder dots (120 (made◦C for 15of min)H20E to silver produce epoxy) an electrical connection, leaving a small space between the diode and the underlying mounting. Electronics 2019, 8, x FOR PEER REVIEW 8 of 14 Electronics 2019, 8, x FOR PEER REVIEW 8 of 14 down onto the connectors on the circuit board; then, the solder is re-melted (120 °C for 15 min) to down onto the connectors on the circuit board; then, the solder is re-melted (120 °C for 15 min) to produce an electrical connection, leaving a small space between the diode and the underlying Electronicsproduce2019 an, 8 , electrical696 connection, leaving a small space between the diode and the underlying8 of 13 mounting. mounting.

FigureFigure 10. 10. Photo PhotoPhoto of of thethe ZBD ZBD in in thethe flipflip ﬂip-chip--chipchip assembly assembly assembly.. .

AsAs performed performed for for the the previously previously presented presented modeling modeling procedure,procedure, procedure, CPW CPW CPW-M-M-M transitions transitions were were were used, used, used, TMTM andand theirthei their modelr model was was used used inin in thethe the optimizationoptimization optimization inin KeysightKeysight ADS ADSTM, ,,in in in order order to to obtain obtain an an equivalent equivalentequivalent circuitcircuit model model model consisting consisting consisting only only only of the of of the intrinsic the intrins intrins andicic parasitic and parasitic parasitic elements elements elements of the of diode. of the the diode. A diode. comparison A A comparison comparison between between experimental measurements and the model (described below) simulation results is shown experimentalbetween experimental measurements measurements and the model and the (described model (described below) simulation below) resultssimulation is shown results in Figureis shown 11, in Figure 11, showing a better match at the lower frequencies of the W-band. showingin Figure a11, better showing match a better at the lowermatch frequenciesat the lower of frequencies the W-band. of the W-band.

Figure 11. Comparison between S-parameter measurements and modeling simulation of the unbiased Figure 11. Comparison between S-parameter measurements and modeling simulation of the unbiased ZBDZBD (0 ( V)0 V for) for the the flip-chip flip-chip assembly assemblyin in thethe W-band.W-band. Flip-ChipFigure Zero 11. BiasComparison Diode Complete between ModelS-parameter measurements and modeling simulation of the unbiased ZBD (0 V) for the flip-chip assembly in the W-band. The resulting equivalent circuit model is presented in Figure 12. Comparing this equivalent circuit with the previous model (Figure8), the main di fference is that some capacitances have been added to account for some newly existing parasitic effects. In the flip-chip assembly, the diode was attached Electronics 2019, 8, x FOR PEER REVIEW 9 of 14

Flip-Chip Zero Bias Diode Complete Model ElectronicsThe2019 resulting, 8, 696 equivalent circuit model is presented in Figure 12. Comparing this equivale9nt of 13 circuit with the previous model (Figure 8), the main difference is that some capacitances have been toadded the carrier to account upside for down, some newly compared existing to theparasitic conventional effects. In modethe flip with-chip bonding assembly, wires. the diode Therefore, was attached to the carrier upside down, compared to the conventional mode with bonding wires. capacitances C2 in Figure8 are identified in Figure 12 as CPAD1 and CPAD2, being connected to a new Therefore, capacitances C2 in Figure 8 are identified in Figure 12 as CPAD1 and CPAD2, being connected capacitance, CGNDs, which represents a new, slightly capacitive coupling effect between the microstrip to a new capacitance, CGNDs, which represents a new, slightly capacitive coupling effect between the reference plane of the diode bulk and the ground plane of the total circuit assembly. An additional microstrip reference plane of the diode bulk and the ground plane of the total circuit assembly. An capacitive coupling effect is thus originated, CCOUPLING, which is related to the capacitive coupling additional capacitive coupling effect is thus originated, CCOUPLING, which is related to the capacitive betweencoupling the between CPW-M the transitions CPW-M transitions since, in this since, assembly, in this assembly, both transitions both transitions are placed are closer placed than closer in the previous one. The L -C -R and R -C -L electrical networks simulate the microstrip line than in the previousIN IN one.IN The LINOUT-CIN-RINOUT andOUT ROUT-COUT-LOUT electrical networks simulate the effmicrostripect at the connectionline effect at betweenthe connection the diode between and the the diode CPW-M and the transition; CPW-M besides,transition;R INbesidesand ,R ROINUT analsod includeROUT also the include losses related the losses to therelated H20E to conductivethe H20E conductive silver epoxy silver used epoxy to attach used to the attach diode. the It diode. should It be emphasizedshould be emphasized that fitting in that Figure fitting7 covers in Figure the 7 range covers from the range 2 to 110 from GHz, 2 to de-embedding 110 GHz, de-embedding the e ffect the of the wireeffect bonding, of the wire while bonding, Figure 11 while covers Figure a frequency 11 covers range a frequency from 75 range to 110 from GHz, 75 comparingto 110 GHz, measurements comparing andmeasurements simulations and without simulations de-embedding. without de The-embedding. upside-down The upside positioning-down ofpositioning the diode of causes the diode some uncertaintycauses some in theuncertainty parasitic in capacitances the parasitic with cap theacitances ground, with but the at theground, same but time, at otherthe same parasitic time, elements other mustparasitic be maintained elements formust coherence be maintained with grounded-microstrip for coherence with grounded ZBD model-microstrip (Figure ZBD8). Those model restrictions (Figure limit8). Those the capability restrictions for limit a perfect the capability impedance for matching. a perfect impedance matching.

FigureFigure 12. 12.Equivalent Equivalent circuit model for for the the ZBD ZBD in in flip ﬂip-chip-chip assembly. assembly.

TheThe resulting resulting model model parameters parameters extractedextracted for this second second diode diode assembly assembly technique technique are are listed listed in in TableTable4. 4.

TableTable 4. 4.Results Results of of thethe parameterparameter extraction of of the the total total capacitance capacitance of of ZBD. ZBD.

ParameterParameter Symbol Value Value Saturation Current (A) Isat −6 6 Saturation Current (A) Isat 2828 × 1010 × − IdealityIdeality Factor Factor η 1.41.4 q/q/ηkTηkT (1 /(1/VV) ) α 28.628.6 JunctionJunction Capacitance Capacitance (V d(V=d 0= V)0 V) (fF) (fF) CCj0j0 1010 Series Resistance (Ω) R 6.5 Series Resistance (Ω) RSS 6.5 Junction Potential (V) φbi 0.16 Junction Potential (V) 휙푏푖 0.16 Finger Inductance (pH) Lf 50 Finger Inductance (pH) Lf 50 Parasitic Capacitance (fF) CP 1 Parasitic Capacitance (fF) CP 1 Pad-to-Pad Capacitance (fF) CPP 16 PadInput-to-Pad Inductance Capacitance (pH) (fF) LCINPP 1659 OutputInput InductanceInductance (pH) (pH) LOUTLIN 5948 InputOutput Capacitance Inductance (fF) (pH) LCOUTIN 483.4 Output Capacitance (fF) C 0.3 Input Capacitance (fF) COUTIN 3.4 Input Resistance (Ω) RIN 2.3 Output Capacitance (fF) COUT 0.3 Output Resistance (Ω) ROUT 2.3 Coupling Capacitance (fF) CCOUPLING 18

PAD IN Capacitance (fF) CPAD1 39 PAD OUT Capacitance (fF) CPAD2 203 Ground Capacitance (fF) CGNDs 11 Electronics 2019, 8, x FOR PEER REVIEW 10 of 14 Electronics 2019, 8, x FOR PEER REVIEW 10 of 14

Input Resistance (Ω) RIN 2.3 Input Resistance (Ω) RIN 2.3 Output Resistance (Ω) ROUT 2.3 Output Resistance (Ω) ROUT 2.3 Coupling Capacitance (fF) CCOUPLING 18 Coupling Capacitance (fF) CCOUPLING 18 PAD IN Capacitance (fF) CPAD1 39 PAD IN Capacitance (fF) CPAD1 39 PAD OUT Capacitance (fF) CPAD2 203 PAD2 Electronics 2019, 8, 696 PAD OUT Capacitance (fF) C 203 10 of 13 Ground Capacitance (fF) CGNDs 11 Ground Capacitance (fF) CGNDs 11

4. Including Low-FrequencyLow -Frequency Noise in the Zero-Bias Zero-Bias Model For a complete evaluation evaluation of of diode diode performance, performance, which which is isof of significant significant use use in in detectors, detectors, a aknowledge knowledge of of low-frequencylow low-frequency-frequency noise noise behavior behavior becomes becomes quite quite relevant—notrelevant relevant—not—not only only as as proof proof of of technology technology quality, butbut alsoalso toto establishestablish thethe noisenoise floor,floor, whichwhichwhich limitslimits thethe dynamicdydynamicnamic range.range. Thus, this ensures a stable response in a dynamicdynamic modemode ofof operation.operation. In this sense, a set-upset-up was developed to measure and model low-frequencylow-frequency noise sources present in thethe ZBD,ZBD, followingfollowing [[9].9]. The set-upset-up diagram is shown in Figure 1313,, and the correspondingcorresponding photo is shownshown in FigureFigure 1414.. In this case, the diode was mounted in the conventional way (grounded, (grounded, not Flip-Chip)FFliplip-Chip)-Chip) inside a shielded box to avoid unwanted interference inin thethe measurements. measurements. In In this this low-frequency lowlow-fr-frequencyequency range, range, a distinction a distinction between between the flip-chipthe flip-chipflip-chip and wireand wire bonding bonding is not is relevant. not relevant.

Id A

Filter

1 Hz

HP89410 A Vd H(f) Ch: 1 MOhm

Diode Stanford Research SystemsSR 560 G=500 Vectorial Spectrum Analizer

Figure 13. Setup to evaluate low-frequency noise under different DC biases. Figure 13. Setup to evaluate low low-frequency-frequency noise under didiffereﬀerentnt DC biases.

Figure 14. Photo of the measurement setup for low-frequency noise, corresponding to the diagram in Figure 13.

The main low-frequency noise contributions expected in the current spectral density (CSD) were: thermal noise associated with the series resistance Rs, shot noise, and ﬂicker noise. The equations governing the diﬀerent noise sources are given in Equations (3)–(5) (where K is the Boltzmann constant, f is the low frequency, q is electron charge, Is is the saturation current, and Idiode is the actual current, Electronics 2019, 8, x FOR PEER REVIEW 11 of 14

Figure 14. Photo of the measurement setup for low-frequency noise, corresponding to the diagram in Electronics 2019, 8, x FOR PEER REVIEW 11 of 14 Figure 13. Figure 14. Photo of the measurement setup for low-frequency noise, corresponding to the diagram in The Figure main 13. low -frequency noise contributions expected in the current spectral density (CSD) were: thermal noise associated with the series resistance Rs, shot noise, and flicker noise. The Electronicsequations2019The governing, 8 main, 696 low the-frequency different noise noise contributions sources are expected given in in the e quations current spectral (3)–(5) density (where (CSD) K 11is of the 13 were: thermal noise associated with the series resistance Rs, shot noise, and flicker noise. The Boltzmann constant, f is the low frequency, q is electron charge, Is is the saturation current, and Idiode equations governing the different noise sources are given in equations (3)–(5) (where K is the is the actual current, whereas Kf, af, and bf are parameters to be determined). Noise sources were whereasBoltzmannKf, af, andconstant,bf are f is parameters the low frequency, to be determined). q is electron charge, Noise Is sourcesis the saturation were placed current, in and the I circuitaldiode placed in the circuital model of the diode, as shown in Figure 15. modelis ofthe the actual diode, current, as shown whereas in FigureKf, af, and 15. bf are parameters to be determined). Noise sources were placed in the circuital model of the diode, as shown in Figure4 퐾푇15. ⟨퐶푆퐷 ⟩ =푖2 = 푡ℎ푒푟푚푎푙 2푛푅푠 4KT (3) CSDthermal = i =4퐾푇푅푠 (3) ⟨퐶푆퐷 ⟩ =푖nR2 s = h 푡ℎ푒푟푚푎푙i 푛푅푠 Rs (3) 2 푅푠 ⟨퐶푆퐷푠ℎ표푡⟩ =푖푛푠ℎ표푡 = 2푞(퐼푑푖표푑푒 + 2퐼푠) (4) 22 CSD⟨퐶푆퐷푠ℎ표푡⟩==푖i ==22푞q((퐼푑푖표푑푒I ++22퐼푠I) ) (4) (4) shot 푛푠nshotℎ표푡 diode퐼푎푓 s h i 2 푎 ⟨퐶푆퐷푓푙푖푐푘푒푟⟩ =푖푛 = 푘푓퐼 푓a (5) 2 1/푓 푓I 푏f푓 ⟨퐶푆퐷푓푙푖푐푘푒푟⟩ =푖푛21/푓 = 푘푓 푏 (5) CSD f licker = in = k푓f 푓 (5) h i 1/ f f b f Capacitor CapacitorCp Cp

10000 pF pF InI1n/1f/f

Capacitor 10000 pF 10000 Capacitor 10000 pF 10000

InIsnhsohtot InInRRss

ResistorResistor InductorInductor 100 kΩR j 100 kΩR j 100L pnH Rs 100L pnH Rs Cj Cj FigureFigure 15. 15.Insertion Insertion ofof noise sources sources in in the the diode diode model. model. Figure 15. Insertion of noise sources in the diode model. TheThe low-frequency low-frequency noise noise spectrum spectrum measuredmeasured with with the the set set-up-up in inFigures Figures 13 and13 and 14 is 14 shown is shown in in FigureTheFigure 16 ,low including 16,- frequencyincluding the the systemnoise system spectrum noise noise floor floor measured (NF(NF trace) with and and measurementsthe measurements set-up in forFigures forthe thefour 13 four different and di 14fferent currentis shown current in Figurebias points:bias 16, points: including 0.05 0.05 mA, mA, the 0.1 system0.1 mA, mA, 0.15 0.15noise mA, mA, floor and and (NF 0.20.2 mA. trace) The The and set set-up measurements-up was was also also simulated simulatedfor the considering four considering different all the current all the biasnoise points:noise contributions contributions 0.05 mA, and 0.1 and FlickermA, Flicker 0.15 noise noisemA, parameters andparameters 0.2 mA. in in EquationThe equation set-up (5),(5), was whichwhich also weresimulated optimized optimized considering to to fit fit with with all the the measurements at these four bias currents. In Table 5, the optimized parameters are listed. noisemeasurements contributions at these and four Flicker bias noise currents. parameters In Table 5in, theequation optimized (5), which parameters were areoptimized listed. to fit with the measurements at these four bias currents. In Table 5, the optimized parameters are listed.

Figure 16. Low-frequency noise spectrum measurements of the set-up, shown in Figure 13, and simulations using the model in Figure 15.

Table 5. Low-frequency noise parameters.

Parameter Value 7 kf 1.08 10 × − af 2.48 bf 1.04 Electronics 2019, 8, 696 12 of 13

5. Conclusions In this paper, two models for Zero-Biased Diodes (VDI) considering wire-bonded or flip-chip techniques have been presented, with particular emphasis on the flip-chip model in the W-band. Equivalent circuit models were complemented with the extraction of low-frequency noise sources (Flicker) and its incorporation in the proposed models, allowing for a more complete prediction of the response of the diodes, for example, in detectors. The obtained models were validated under different operating conditions, and power prediction abilities of the model were probed performing nonlinear harmonic measurements ranging the appropriate power levels, in comparison with harmonic balance simulations in commercial software (Keysight ADS™). Comparisons up to the W-band between measured and simulated scattering parameters using the complete model and showing a good agreement were performed, probing the validity of the extraction methods applied using both wire bonding and flip-chip attachment techniques. Finally, low-frequency noise measurements and simulations were performed to validate the noise model added to the previously extracted diode model, which showed an adequate level of agreement. As a general remark in “normal” operations, Zero Bias diodes are expected to be self-biased by the input RF power, as it happens in the measurements shown in Figure9, where input power was swept. In Figure3, ZBD diodes were biased for DC fitting, and scattering parameters were also measured in low microwave frequencies under a DC bias to fit the capacitance model (Figures5 and6). For low-frequency noise measurements also, the DC bias was applied to put into the evidence bias dependence of the Flicker noise parameters. We considered that those measurements would cover the usual scenarios for ZBD operations. A combined application of W-band power and DC bias to the Zero Bias diodes was avoided, keeping in mind the fragility of the diode because of its low-threshold voltage, where voltages applied any higher than the safe one would totally or partially damage it, leading to unreal measurements of the device’s high-frequency behavior.

Author Contributions: Conceptualization, J.P.P. and T.F.; methodology, J.G. and K.Z.; software, J.G.; validation, J.G. and K.Z.; formal analysis, J.G. and T.F.; investigation, J.G. and K.Z.; writing—original draft preparation, J.P.P. and T.F.; writing—review and editing, J.P.P. and T.F.; supervision, A.T.; project administration, J.P.P.; funding acquisition, A.T. Funding: This research was funded by the Spanish Ministry of Economy, Science and Innovation for the financial support provided through projects CONSOLIDER-INGENIO CSD2008-00068 (TERASENSE), the continuing excellence network SPATEK and the projects TEC2014-58341-C4-1-R and TEC2017-83343-C4-1-R. Acknowledgments: The authors would like to thank the University of Cantabria Industrial Doctorate program 2014, project: “Estudio y Desarrollo de Tecnologías para Sistemas de Telecomunicación a Frecuencias Milimétricas y de Terahercios con Aplicación a Sistemas de Imaging en la Banda 90–100 GHz”. The authors would like also to express their gratitude to all the staff of DICOM’s Microwaves & RF group for their help and to the assembling laboratory staff: Ana Pérez, Eva Cuerno and Sandra Pana for their help with the fabrication of the prototypes and to Dermot Erskine for the revision of the text. Conflicts of Interest: The authors declare no conflict of interest. The funders had no role in the design of the study; in the collection, analyses, or interpretation of data; in the writing of the manuscript, or in the decision to publish the results.

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