Quad-Core Intel® Xeon® Processor 5400 Series
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Quad-Core Intel® Xeon® Processor 5400 Series Datasheet April 2008 Reference Number: 318589-003 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The Quad-Core Intel® Xeon® Processor 5400 Series may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. 64-bit computing on Intel architecture requires a computer system with a processor, chipset, BIOS, operating system, device drivers and applications enabled for Intel® 64 architecture. Processors will not operate (including 32-bit operation) without an Intel® 64 architecture-enabled BIOS. Performance will vary depending on your hardware and software configurations. Consult with your system vendor for more information. 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Copyright © 2007-2008, Intel Corporation. 2 Quad-Core Intel® Xeon® Processor 5400 Series Datasheet Contents 1Introduction..............................................................................................................9 1.1 Terminology ..................................................................................................... 10 1.2 State of Data .................................................................................................... 13 1.3 References ....................................................................................................... 13 2 Quad-Core Intel® Xeon® Processor 5400 Series Electrical Specifications................ 15 2.1 Front Side Bus and GTLREF ................................................................................ 15 2.2 Power and Ground Lands.................................................................................... 16 2.3 Decoupling Guidelines........................................................................................ 16 2.3.1 VCC Decoupling...................................................................................... 16 2.3.2 VTT Decoupling ...................................................................................... 16 2.3.3 Front Side Bus AGTL+ Decoupling ............................................................ 16 2.4 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking ....................................... 17 2.4.1 Front Side Bus Frequency Select Signals (BSEL[2:0]).................................. 17 2.4.2 PLL Power Supply................................................................................... 18 2.5 Voltage Identification (VID) ................................................................................ 19 2.6 Reserved, Unused, and Test Signals..................................................................... 21 2.7 Front Side Bus Signal Groups.............................................................................. 22 2.8 CMOS Asynchronous and Open Drain Asynchronous Signals .................................... 24 2.9 Test Access Port (TAP) Connection....................................................................... 24 2.10 Platform Environmental Control Interface (PECI) DC Specifications........................... 24 2.10.1 DC Characteristics .................................................................................. 24 2.10.2 Input Device Hysteresis .......................................................................... 25 2.11 Mixing Processors.............................................................................................. 26 2.12 Absolute Maximum and Minimum Ratings ............................................................. 26 2.13 Processor DC Specifications ................................................................................ 27 2.13.1 Flexible Motherboard Guidelines (FMB) ...................................................... 27 2.13.2 VCC Overshoot Specification .................................................................... 37 2.13.3 Die Voltage Validation............................................................................. 38 2.14 AGTL+ FSB Specifications................................................................................... 38 3 Mechanical Specifications ........................................................................................ 43 3.1 Package Mechanical Drawings ............................................................................. 43 3.2 Processor Component Keepout Zones................................................................... 47 3.3 Package Loading Specifications ........................................................................... 47 3.4 Package Handling Guidelines............................................................................... 48 3.5 Package Insertion Specifications.......................................................................... 48 3.6 Processor Mass Specifications ............................................................................. 48 3.7 Processor Materials............................................................................................ 48 3.8 Processor Markings............................................................................................ 48 3.9 Processor Land Coordinates ................................................................................ 49 4Land Listing............................................................................................................. 51 4.1 Quad-Core Intel® Xeon® Processor 5400 Series Pin Assignments ........................... 51 4.1.1 Land Listing by Land Name...................................................................... 51 4.1.2 Land Listing by Land Number................................................................... 61 5 Signal Definitions .................................................................................................... 71 5.1 Signal Definitions .............................................................................................. 71 6 Thermal Specifications ............................................................................................ 83 6.1 Package Thermal Specifications........................................................................... 83 6.1.1 Thermal Specifications ............................................................................ 83 6.1.2 Thermal Metrology ................................................................................. 93 6.2 Processor Thermal Features................................................................................ 94 Quad-Core Intel® Xeon® Processor 5400 Series Datasheet 3 6.2.1 Intel® Thermal Monitor Features...............................................................94 6.2.2 On-Demand Mode...................................................................................96 6.2.3 PROCHOT# Signal ..................................................................................96 6.2.4 FORCEPR# Signal ...................................................................................97 6.2.5 THERMTRIP# Signal ................................................................................97 6.3 Platform Environment Control Interface (PECI) ......................................................97 6.3.1 Introduction...........................................................................................97 6.3.2 PECI Specifications .................................................................................99 7Features................................................................................................................ 101 7.1 Power-On Configuration Options ........................................................................ 101 7.2 Clock Control and Low Power States................................................................... 101 7.2.1 Normal State ....................................................................................... 102 7.2.2 HALT or Extended HALT State................................................................. 102 7.2.3 Stop-Grant State .................................................................................. 104 7.2.4