Gaas Fets As Control Devices APN2015

GaAs FETs as Control Devices APN2015

Gallium arsenide MESFETs are being used in RF control -5 V Ω device applications as switches and attenuators.They are 5 k Gate very easily adapted to monolithic circuit form, dissipate Source Drain essentially no power and can easily be designed into broadband circuits. N The RF signal flows from source to drain, while the RF SI isolated gate is the voltage control. The high impedance “off state” is attained by applying a DC voltage on the gate more negative than the “pinch-off” voltage (VP). In this condition the source-drain channel is “pinched off.” The capacitance is typically 0.25 pF per mm of gate Figure 1A. MESFET Control Device in periphery (see Figure 1A). The “on” state occurs when High Impedance State (“Off” State) zero DC bias is applied to the gate (see Figure 1B). The channel from source to drain is “open” and represents a 2.5–3.5 Ω resistance per mm of gate periphery. 0 V 5 kΩ A configuration of FETs used in series and shunt normally Gate produce the optimum switch or attenuator performance in Source Drain monolithic circuits (see Figure 2).The only DC current that N flows is the leakage of the gate-source and gate-drain reverse biased junctions (when negative voltage is applied SI to gate). Typical current drain is < 25 µA @ -5 V. This leakage is a function of the wafer fabrication process, the device periphery, and magnitude of applied voltage. For isolation of gate voltage control, 2.5–5 kΩ resistor is incorporated monolithically in the gate. Since no further Figure 1B. MESFET Control Device in external bias circuitry is required, the switch is inherently Low Impedance State (“On” State) broadband. The power handling of the switches is primarily limited by Voltage variable attenuators (VVAs) use the channel the current handling capability, which is related to the IDSS resistance of the FET as the actual resistance of the circuit of the FET.The IDSS is a function of the gate periphery components. The resistance is a nonlinear relationship which then determines the source-drain capacitance. with control voltage as shown in Figure 4 (FET with a The input series FET in switches have a nominal 1 dB “pinch-off” voltage of 1.5 V). Figure 5 shows a TEE VVA compression of 1 W/mm. that uses two series FETs and one shunt FET. Digital attenuators use FETs configured as “T” or “PI” pads to achieve a given attenuation value (Figure 3). For the low loss state V2 is set to 0 V and V1 is set to -5 V. For the attenuation state V2 is set to -5 V and V1 is set to 0 V. Typically digital attenuators are composed of multiple bit values (e.g. 2, 4, 8, 16 dB AD220-25).

Skyworks Solutions, Inc. [781] 376-3000 • Fax [781] 376-3100 • Email [email protected] • www.skyworksinc.com 1 Specifications subject to change without notice. 9/03A GaAs FETs as Control Devices APN2015

RF Path RF Path

5K Isolation Insertion Loss DC “On” 0 V “On” 0 V 5K

Insertion Loss Isolation “Off” -5 V DC “Off” -5 V

Shunt FET Series FET

Figure 2. Shunt/Series FET

RF1 RF2

Fixed Pad

V1 Figure 3. Single Bit Configuration for Digital Attenuator

Resistive Path

1 mm FET

“0” V ~ 3.0 Ω -1 V ~ 10 Ω -2 V ~ 30 Ω Ω DC -3 V ~ 300 -3.5 V ~ 1000 Ω -5 V ~ 10 kΩ

Figure 4. FET as a Variable Resistor Figure 5. Voltage Variable Attenuator (VVA) in Tee Configuration

2 Skyworks Solutions, Inc. [781] 376-3000 • Fax [781] 376-3100 • Email [email protected] • www.skyworksinc.com Specifications subject to change without notice. 9/03A