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Indium Gallium Arsenide Three-State and Non-Volatile Memory Quantum Dot Devices" (2014)

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Indium Gallium Arsenide Three-State and Non-Volatile Memory Quantum Dot Devices University of Connecticut OpenCommons@UConn Doctoral Dissertations University of Connecticut Graduate School 9-8-2014 Indium Gallium Arsenide Three-State and Non- Volatile Memory Quantum Dot Devices Pik Yiu Chan University of Connecticut - Storrs, [email protected] Follow this and additional works at: https://opencommons.uconn.edu/dissertations Recommended Citation Chan, Pik Yiu, "Indium Gallium Arsenide Three-State and Non-Volatile Memory Quantum Dot Devices" (2014). Doctoral Dissertations. 567. https://opencommons.uconn.edu/dissertations/567 Abstract Indium Gallium Arsenide Three-State and Non-Volatile Memory Quantum Dot Devices Pik Yiu Chan, Ph.D. University of Connecticut, 2014 With the silicon technology reaching the end of the Roadmap soon, III-V devices have been researched as possible replacements for silicon. Indium gallium arsenide (InGaAs) is particularly appealing due to its well-established processing protocols in high-speed and high-frequency applications. This dissertation investigates various metal-oxide-semiconductor (MOS) devices using InGaAs as the substrate material. II-VI gate dielectric stacks consisting of ZnSe, ZnS and ZnMgS were used in this research as an alternative to conventional oxide-based gate insulators for InGaAs devices. II-VI gate dielectric materials have been chosen due to their high values, wider band gaps and similar lattice constants to InGaAs for a lattice-matched semiconductor-insulator interface. Multi-state field-effect transistors were also fabricated incorporating germanium- oxide-cladded germanium quantum dots (QDs) at the gate regions. These QDs have the i ability to store charges and providing an additional output state (in additional to the ON and the OFF states). Such QDs can also be used as charge storage centers in non-volatile memory devices, which were also investigated. Integration of quantum well channels in the substrate is another method to provide multi-bit operations, which is discussed in the dissertation. Fabrication process flows, experimental results and modeling simulations of the different fabricated devices are also presented. A look at multi-value logic applications and the future of InGaAs devices are included. ii Indium Gallium Arsenide Three-State and Non-Volatile Memory Quantum Dot Devices Pik Yiu Chan B.S., University of Connecticut B.S.E.E., University of Connecticut M.S., University of Connecticut A Dissertation Submitted in Partial Fulfillment of the Requirement for the Degree of Doctor of Philosophy at the University of Connecticut 2014 iii Copyright by Pik Yiu Chan 2014 iv APPROVAL PAGE Doctor of Philosophy Dissertation Indium Gallium Arsenide Three-State and Non-Volatile Memory Quantum Dot Devices Presented by Pik Yiu Chan, B.S., B.S.E.E., M.S. Major Advisor ___________________________________________________________ Faquir C. Jain Associate Advisor_________________________________________________________ John. E. Ayers Associate Advisor ________________________________________________________ John Chandy University of Connecticut 2014 v Acknowledgement I thank God for making this possible. Without Him, everything in my life would have been different. I also want to thank: … my major advisor, Dr. Faquir Jain, for being my advisor. I am really grateful to have you as my advisor. … my associate advisors, Dr. John Chandy, and Dr. John Ayers, who taught me to give other people the benefit of a doubt. … my advisory committee members: Dr. Rajeev Bansal and Dr. Lei Wang. … three professors: Dr. A.F.M. Anwar, Dr. Ali Gokirmak, and Dr. Helena Silva. They have offered me great encouragements, nudges, life lessons and humor over the years. … Dr. Evan Heller for being so patient and helpful when explaining the computer program to me. Without his help, I would not be able to do the simulations and get the results I wanted. … Dr. Barry Miller and Dr. Nicholas Sauer for assistance with InGaAs etching and regrowth. … Christopher Tillinghast for silicon nitride deposition. … Dr. T. P. Ma and his students for use of their testing equipment at Yale University. … John Fikiet and Tom Zeller for the mechanical help. I can move AND change gas tanks, scrub the inside of an RIE chamber, change water filters, and change oil in a mechanical pump, thanks to you! vi … my group members, past and present. Too many to name, but all of you. Thanks for all your help! … Dr. TEM for the TEM work done. Thanks for all your help! … the wonderful people at the ECE office and tech support: Mary, Celine, Dee, Jeanette, Barb and Paul! … the wonderful people that I worked with ―at my other job‖: JOY, MaryAnn, Cathy, Emilie, Dr. Dimock and the wonderful GAs Ron and Gus. And my American Elder Sister Cleen! … my friends at the UConn Chinese Bible Study/Storrs Chinese Christian Church. Thanks for all the great food and all the support. I thank every single one of you because you have helped me in so many ways, and thank you for your prayers and company! … my friends at home and here: MM, BB, SPY, HPY, PLL, B‖DB‖C, GS [not that GS] and all the others I grew up with; okay, that GS too. Our conversations and memories of you have kept me going. … my family: It’s taken too long, and thanks for giving me the time. I thank my parents, Mr. and Mrs. Chan, my brother Mr. Chan, sister-in-law Mrs. Chan, nephew #1 Mr. Chan, nephew #2 Mr. Chan, big sis Miss Chan, and little sister Miss Chan. vii TABLE OF CONTENTS Abstract ................................................................................................................................ i Acknowledgement ............................................................................................................. vi 1. Introduction ..............................................................................................................1 1.1. Transistor Scaling and Implications..................................................................1 1.2. Dissertation Outline ..........................................................................................3 2. Indium Gallium Arsenide and II-VI Materials ........................................................6 2.1. What are our Options? ......................................................................................6 2.2. Why InGaAs? .....................................................................................................7 2.3. High- Gate Dielectric Options ........................................................................8 2.4. Incorporation of Quantum Dots in the Business .............................................12 2.5. Quantum Well Channels in Multiple-State Operation ....................................13 3. Theory of Three-State Behavior in InGaAs Quantum-Dot-Gate (QDG) FETs .....14 4. Non-volatile Memory Devices ...............................................................................19 5. Spatial Wavefunction Switching (SWS) Effects ...................................................23 6. Device Fabrication .................................................................................................32 6.1. Standard wafer cleaning procedures ...............................................................32 6.2. Standard photolithography procedures ...........................................................33 6.3. Metal Lift-off procedures .................................................................................33 viii 6.4. Gate Dielectric Stack Deposition ....................................................................34 6.5. Self-Assembly of GeOx-cladded Ge Quantum Dots .........................................35 6.6. Metallization ....................................................................................................36 6.7. InGaAs Non-volatile Memory MOS capacitors ...............................................37 6.8. Four-Well SWS MOS capacitors ....................................................................40 6.9. InGaAs QDG-FET ...........................................................................................42 6.10.QDG-FET using a 3-well SWS wafer ............................................................50 7. Discussion on the Gate Materials ..........................................................................57 7.1. II-VI Gate Dielectric Stack Selection ..............................................................57 7.2. GeOx-cladded Ge QDs ....................................................................................59 8. Experimental Results and Discussion ....................................................................63 8.1. InGaAs NVM MOS Capacitors........................................................................63 8.2. Four-Well SWS MOS Capacitor ......................................................................65 8.3. QDG-FET ........................................................................................................66 8.3.1.Output and Transfer Characteristics ......................................................66 8.3.2.High- Materials and Gate Leakage ......................................................70 8.3.3.Source and Drain Regrowth ...................................................................70 9. Modeling Simulation and Applications .................................................................72 9.1. Modeling Simulation Theory ...........................................................................72 9.2. Bulk-InGaAs QDG-FET ..................................................................................73 ix 9.3.
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