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MOSFET Amplifier Biasing MOSFET Amplifier Biasing Chris Winstead April 6, 2015 Standard Passive Biasing: Two Supplies VDD RD VD vout vin VS ID RG RS VSS To analyze the DC behavior of this biasing circuit, it is most convenient to use the following steps: 1. Specify the desired bias current ID. 2. Using the square law, solve for the required VGS. 3. Because the gate is biased at zero volts, we see that VS = −VGS. Then the resistance is simply (VS − VSS) RS = ID 4. We may then find the maximum RD allowed while still keeping this device in saturation: VDS > VGS − VTh ) VDD − IDRD − VS > −VS − VTh ) VDD − IDRD > −VTh VTh + VDD ) RD < ID Numerical Example Suppose our MOSFET device has the following characteristics: 1 2 • kn = 1mA/ V • VTh = 0:5V • VDD = 5V • VSS = −5V and suppose we desire ID = 1mA. Then we arrive at: q 1. V = 2ID = 1:91V. GS kn 2. VS = −VGS = −1:91V. 3. RS = 3:090kΩ: 4. RD < 5:500kΩ: Using a Bypass Capacitor Ideally, a Common-Source amplifier like the one shown should have a gain equal to −gmRD, where p gm = 2knID Unfortunately the presence of RS causes the gain to decrease. It can be shown that RD Av = −gmro ; RD + RS + r0 + gmroRS where ro is the MOSFET's built-in output resistance (typically on the order of 100kΩ). The term in parentheses can be much less than 1, resulting in very low gain. When using resistor biasing, we commonly assume that ro ! 1, so that the gain becomes gmRD Av ! − 1 + gmRS The gain is maximized when RS = 0, but without RS the circuit's DC bias becomes very sensitive to calculation errors, component mismatch, temperature changes, and minor environmental factors. This creates a difficult tradeoff. To improve the gain of this circuit configuration, we may insert a bypass capacitor that masks the presence of RS: VDD RD VD vout vin AC signals RG RS CB VSS 2 When CB is inserted, is has the effect of short-circuiting RS at higher frequencies. To obtain a value for CB, we may follow this procedure: 1. Specify the lowest frequency f at which the amplifier is to be used. 2. At the specific frequency f, CB can be treated as a resistor with effective resistance RB = 1=2πfCB. This should have a low value, say 1 to 10Ω. Then 1Ω C = : B 2πf The effective resistance of CB appears in parallel with RS, and becomes very small as f increases. Hence RS can be utilized to obtain a good DC bias solution, and its effects can be made to disappear at higher frequencies. Numerical Example Suppose our amplifier should operate at frequencies above 100kHz. Then the necessary capacitance is CB = 1:59µF: This capacitance is suitable for implementation on a breadboard or printed circuit board, but is too large for most integrated circuit designs. Active Feedback Bias Another method of biasing is possible in high-performance amplifiers. In this method, we use an amplifier (like an op amp) in a feedback bias arrangement: VDD RD VD vout vin Rbig RG ∗ VD + − ∗ This bias approach uses the op amp to zero the difference between the desired DC output (VD) and the actual DC output (VD). In an integrated circuit, this approach can be realized by implementing a low-quality amplifier for the feedback op amp. Notice that we can eliminate RS altogether because the 3 feedback circuit is able to adapt to minor errors like mismatch, temperature variation and parametric drift. ∗ To understand how this feedback adaptation operates, consider what happens if VD 6= VD. First, ∗ suppose VD > VD. In this case, VG decreases toward zero, which tends to turn off the MOSFET. Then ID also decreases, so the voltage drop across RD is reduced, causing VD to increase. On the other hand, ∗ if VD < VD, then the op amp will tend toward its positive rail. This will increase VG, and increase the degree to which the MOSFET is \on", which tends to pull VD to a lower value. Putting these two analyses ∗ together, it is clear that VD will always be changed in a direction that makes it closer to VD. Therefore ∗ the stable end-result is that VD = VD. The MOSFET Gain Configurations This section summarizes the characteristics of MOS amplifier configurations with passive bias (i.e. biased with ordinary resistors). Common-Source VDD VDD vin RD vout vout RD vin Characteristics: • Input: GATE • Output: DRAIN • Gain: −gmRD (INVERTING!) • Output resistance: Rout = RD 4 Common-Gate VDD VDD RD + vout vin − vin vin v + out vin − RD Characteristics: • Input: SOURCE • Output: DRAIN • Gain: gmRD (NON-INVERTING!) • Output resistance: Rout = RD Common-Drain (Source Follower) VDD VDD RS vin vout vout vin RS Characteristics: • Input: GATE • Output: SOURCE 5 • Gain: ≈ 1 (FOLLOWER!) • Output resistance: Rout = 1=gm k RS • Level-shifts: vout = vin ± VGS 6.
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