A2 Micro Controller System an Introduction to Computer Architecture
Total Page:16
File Type:pdf, Size:1020Kb
Load more
Recommended publications
-
Lecture 7: Synchronous Sequential Logic
Systems I: Computer Organization and Architecture Lecture 7: Synchronous Sequential Logic Synchronous Sequential Logic • The digital circuits that we have looked at so far are combinational, depending only on the inputs. In practice, most systems have many components that contain memory elements, which require sequential logic. • A sequential circuit contains both a combinational circuit and memory elements, whose output also serves as an input for the combinational circuit. • The binary data stored in the memory elements define the state of the sequential circuit and help determine the conditions for changing the state in the memory elements. Inputs Combinational Outputs circuit Memory elements Sequential Circuits: Synchronous and Asynchronous • There are two types of sequential circuits, classified by their signal’s timing: – Synchronous sequential circuits have behavior that is defined from knowledge of its signal at discrete instants of time. – The behavior of asynchronous sequential circuits depends on the order in which input signals change and are affected at any instant of time. Synchronous Sequential Circuits • Synchronous sequential circuits need to use signal that affect memory elements at discrete time instants. • Synchronization is achieved by a timing device called a master-clock generator which generates a periodic train of clock pulses. Basic Flip-Flop Circuit Using NOR Gates 1 R(reset) Q 0 Set state Clear state 1 Q’ 0 S(set) S R Q Q’ 1 0 1 0 0 0 1 0 (after S = 1, R = 0) 0 1 0 1 0 0 0 1 (after S = 0, R = 1) 1 1 0 0 Basic -
Experiences in Using Open Source Software for Teaching Electronic Engineering CAD
Experiences in Using Open Source Software for Teaching Electronic Engineering CAD Dr Simon Busbridge1 & Dr Deshinder Singh Gill School of Computing, Engineering and Mathematics, University of Brighton, Brighton BN2 4GJ [email protected] Abstract Embedded systems and simulation distinguish modern professional electronic engineering from that learnt at school. First year undergraduates typically have little appreciation of engineering software capabilities and file handling beyond elementary word processing. This year we expedited blended teaching through the experiential based learning process via open source engineering software. Students engaged with the entire electronic engineering product creation process from inception, performance simulation, printed circuit board design, manufacture and assembly, to cabinet design and complete finished product. Currently students learn software skills using a mixture of electronic and mechanical engineering software packages. Although these have professional capability they are not available off-campus and are sometimes surprisingly poor in simulating real world devices. In this paper we report use of LTspice, FreePCB and OpenSCAD for the learning and teaching of analogue electronics simulation and manufacture. Comparison of the software options, the type of tasks undertaken, examples of student assignments and outputs, and learning achieved are presented. Examples of assignment based learning, integration between the open source packages and difficulties encountered are discussed. Evaluation of student attitudes and responses to this method of learning and teaching are also discussed, and the educational advantages of using this approach compared to the use of commercial packages is highlighted. Introduction Most educational establishments use software for simulating or designing engineering. Most commercial packages come with an academic licence which restricts access to on-site computers. -
EEE1002 – EEE1010 Lecture Notes
EEE1002/EEE1010 - Electronics I Analogue Electronics Lecture Notes S. Le Goff School of Electrical and Electronic Engineering Newcastle University School of EEE @ Newcastle University --------------------------------------------------------------------------------------------------------------------------------------------------------------- Module Organization Lecturer for Analogue Electronics: S Le Goff (module leader) Lecturer for Digital Electronics: N Coleman Analogue Electronics: 24 hours of lectures and tutorials (12 weeks 2 hours/week) Assessment for analogue electronics: Mid-semester test in November, analogue electronics only, 1 hour, 8% of the final mark. Final examination in January, analogue & digital electronics, 2 hours, 50% of the final mark. Recommended Books: Electronics – A Systems Approach, 4th Edition, by Neil Storey, Pearson Education, 2009. Analysis and Design of Analog Integrated Circuits, 5th Edition, by Paul Gray, Paul Hurst, Stephen Lewis, and Robert Meyer, John Wiley & Sons, 2012. Digital Integrated Circuits – A Design Perspective, 2th Edition, by Jan Rabaey, Ananta Chandrakasan, and Borivoje Nikolic, Pearson Education, 2003. Microelectronic Circuits and Devices, 2th Edition, by Mark Horenstein, Prentice Hall, 1996. Electronics Fundamentals – A Systems Approach, by Thomas Floyd and David Buchla, Pearson Education, 2014. Principles of Analog Electronics, by Giovanni Saggio, CRC Press (Taylor & Francis Group), 2014. --------------------------------------------------------------------------------------------------------------------------------------------------------------- -
Performance Evaluation of a Signal Processing Algorithm with General-Purpose Computing on a Graphics Processing Unit
DEGREE PROJECT IN TECHNOLOGY, FIRST CYCLE, 15 CREDITS STOCKHOLM, SWEDEN 2019 Performance Evaluation of a Signal Processing Algorithm with General-Purpose Computing on a Graphics Processing Unit FILIP APPELGREN MÅNS EKELUND KTH ROYAL INSTITUTE OF TECHNOLOGY SCHOOL OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE Performance Evaluation of a Signal Processing Algorithm with General-Purpose Computing on a Graphics Processing Unit Filip Appelgren and M˚ansEkelund June 5, 2019 2 Abstract Graphics Processing Units (GPU) are increasingly being used for general-purpose programming, instead of their traditional graphical tasks. This is because of their raw computational power, which in some cases give them an advantage over the traditionally used Central Processing Unit (CPU). This thesis therefore sets out to identify the performance of a GPU in a correlation algorithm, and what parameters have the greatest effect on GPU performance. The method used for determining performance was quantitative, utilizing a clock library in C++ to measure performance of the algorithm as problem size increased. Initial problem size was set to 28 and increased exponentially to 221. The results show that smaller sample sizes perform better on the serial CPU implementation but that the parallel GPU implementations start outperforming the CPU between problem sizes of 29 and 210. It became apparent that GPU's benefit from larger problem sizes, mainly because of the memory overhead costs involved with allocating and transferring data. Further, the algorithm that is under evaluation is not suited for a parallelized implementation due to a high amount of branching. Logic can lead to warp divergence, which can drastically lower performance. -
Asynchronous Design for Analogue Electronics
Asynchronous Design for Analogue Electronics Alex Yakovlev Motivation: A4A scope IP core IP core conventional (big digital) (big digital) RTL synthesis ADC sensor sensor DAC analogue level shifters/ power synchronisers power components converter converter ad hoc control for analogue layer (little digital) manual design requires formalisation and design automation digital analogue time/energy A4A scope infrastructure • Analogue and digital electronics are becoming more intertwined • Analogue domain becomes more complex and itself needs digital control 2/31 Motivation: Power electronics context • Efficient implementation of power converters is paramount • Extending the battery life of mobile gadgets • Reducing the energy bill for PCs and data centres (5% and 3% of global electricity production respectively) • Need for responsive and reliable control circuitry - little digital • Millions of control decisions per second for years • An incorrect decision may permanently damage the circuit • Poor EDA support • Synthesis is optimised for data processing - big digital • Ad hoc solutions are prone to errors and cannot be verified 3/31 Basic buck converter: Schematic over-current (oc) I_max Th_pmos buck control gp_ack gp oc PMOS uv zc NMOS gn_ack gn R_load Th_nmos zero-crossing (zc) V_0 under-voltage (uv) V_ref • In the textbook buck a diode is used instead of NMOS transistor 4/31 Basic buck converter: Informal specification current PMIN NMIN PMIN NMIN PMIN I_max NMOS ON NMOS ON NMOS ON PMOS OFF PMOS OFF PMOS OFF PMOS OFF NMOS OFF PMOS ON PMOS ON -
Lecture 34: Bonus Topics
Lecture 34: Bonus topics Philipp Koehn, David Hovemeyer December 7, 2020 601.229 Computer Systems Fundamentals Outline I GPU programming I Virtualization and containers I Digital circuits I Compilers Code examples on web page: bonus.zip GPU programming 3D graphics Rendering 3D graphics requires significant computation: I Geometry: determine visible surfaces based on geometry of 3D shapes and position of camera I Rasterization: determine pixel colors based on surface, texture, lighting A GPU is a specialized processor for doing these computations fast GPU computation: use the GPU for general-purpose computation Streaming multiprocessor I Fetches instruction (I-Cache) I Has to apply it over a vector of data I Each vector element is processed in one thread (MT Issue) I Thread is handled by scalar processor (SP) I Special function units (SFU) Flynn’s taxonomy I SISD (single instruction, single data) I uni-processors (most CPUs until 1990s) I MIMD (multi instruction, multiple data) I all modern CPUs I multiple cores on a chip I each core runs instructions that operate on their own data I SIMD (single instruction, multiple data) I Streaming Multi-Processors (e.g., GPUs) I multiple cores on a chip I same instruction executed on different data GPU architecture GPU programming I If you have an application where I Data is regular (e.g., arrays) I Computation is regular (e.g., same computation is performed on many array elements) then doing the computation on the GPU is likely to be much faster than doing the computation on the CPU I Issues: I GPU -
SEQUENTIAL LOGIC Combinational: Output Depends Only on Current Inputs Sequential: Output Depend on Current Inputs Plus Past History Includes Memory Elements
10/10/2019 COMBINATIONAL VS. SEQUENTIAL DIGITAL ELECTRONICS LOGIC SYSTEM DESIGN Combinational Circuit Sequential Circuit inputs Combinational outputs inputs Combinational outputs FALL 2019 Logic Logic PROF. IRIS BAHAR (TAUGHT BY JIWON CHOE) OCTOBER 9, 2019 State LECTURE 11: SEQUENTIAL LOGIC Combinational: Output depends only on current inputs Sequential: Output depend on current inputs plus past history Includes memory elements BISTABLE MEMORY STORAGE SEQUENTIAL CIRCUITS ELEMENT Fundamental building block of other state elements Two outputs, Q, Q Outputs depend on inputs and state variables No inputs I1 Q The state variables embody the past Q Q I2 I1 Storage elements hold the state variables A clock periodically advances the circuit I2 Q What does the circuit do? 1 10/10/2019 BISTABLE MEMORY ELEMENT REVISIT NOR & NAND GATES Controlling inputs for NAND and NOR gates 0 • Consider the two possible cases: I1 Q 1 – Q = 0: then Q’ = 1 and Q = 0 (consistent) X X 0 1 1 0 I2 Q 0 1 1 – Q = 1: then Q’ = 0 and Q = 1 (consistent) I1 Q 0 Implementing NOT with NAND/NOR using non-controlling 1 0 I2 Q inputs – Bistable circuit stores 1 bit of state in the X X X’ X’ state variable, Q (or Q’ ) 1 0 • But there are no inputs to control the state S-R (SET/RESET) LATCH S-R LATCH ANALYSIS 0 R N1 Q – S = 1, R = 0: then Q = 1 and Q = 0 . Consider the four possible cases: 1 N2 Q . S = 1, R = 0 S . S = 0, R = 1 R N1 Q 1 R . -
RF Electronics Design and Simulation.Pdf
Design and Simulation K1=0.975131011283515 Lr1=38.4514647453448 S12=0.5008 K2=1.00596548213902 L11=6.77604174321048 S23=0.9685 K3=1.00219893760926 L22=Lr1-L11-W50 L2=K2*Lr1 S34=0.9875 K4=0.994348146551798 Lr4=K1*Lr1 L3=K3*Lr1 S45=0.5303 K5=1.00188484397154 L41=6.61424287231546 L4=K4*Lr1 L42=Lr4-L41-W50 L5=K5*Lr1 MCURVE MCURVE ID=TL28 MCURVE ID=TL8 W=Wr mm MCFIL MCFIL ID=TL3 W=Wr mm ANG=180 Deg ID=TL1 ID=TL9 W=Wr mm ANG=180 Deg R=4 mm W=Wr mm W=Wr mm ANG=180 Deg R=4 mm S=S12 mm S=S23 mm R=4 mm L=L2 mm L=L3 mm MLIN MCFIL ID=TL26 ID=TL2 MLIN W=Wr mm W=Wr mm L=L41 mm ID=TL24 S=S45 mm W=Wr mm L=L5 mm MLIN L=L11 mm ID=TL6 W=W50 mm 2 L=10 mm MLIN MTEEX$ 3 ID=TL7 ID=MT1 PORT W=W50 mm 1 MCFIL 1 PORT P=1 L=10 mm ID=TL4 MTEEX$ P=2 Z=50 Ohm W=Wr mm ID=MT4 Z=50 Ohm 3 S=S34 mm L=L4 mm 2 MCURVE MCURVE MLEF ID=TL17 ID=TL5 ID=TL27 W=Wr mm W=Wr mm W=Wr mm ANG=180 Deg ANG=180 Deg L=L42 mm R=4 mm R=4 mm MLEF ID=TL25 W=Wr mm L=L22 mm Cornelis J. Kikkert RF Electronics Design and Simulation Publisher: James Cook University, Townsville, Queensland, Australia, 4811. -
CPE 323 Introduction to Embedded Computer Systems: Introduction
CPE 323 Introduction to Embedded Computer Systems: Introduction Instructor: Dr Aleksandar Milenkovic CPE 323 Administration Syllabus textbook & other references grading policy important dates course outline Prerequisites Number representation Digital design: combinational and sequential logic Computer systems: organization Embedded Systems Laboratory Located in EB 106 EB 106 Policies Introduction sessions Lab instructor CPE 323: Introduction to Embedded Computer Systems 2 CPE 323 Administration LAB Session on-line LAB manuals and tutorials Access cards Accounts Lab Assistant: Zahra Atashi Lab sessions (select 4 from the following list) Monday 8:00 - 9:30 AM Wednesday 8:00 - 9:30 AM Wednesday 5:30 - 7:00 PM Friday 8:00 - 9:30 AM Friday 9:30 – 11:00 AM Sign-up sheet will be available in the laboratory CPE 323: Introduction to Embedded Computer Systems 3 Outline Computer Engineering: Past, Present, Future Embedded systems What are they? Where do we find them? Structure and Organization Software Architectures CPE 323: Introduction to Embedded Computer Systems 4 What Is Computer Engineering? The creative application of engineering principles and methods to the design and development of hardware and software systems Discipline that combines elements of both electrical engineering and computer science Computer engineers are electrical engineers that have additional training in the areas of software design and hardware-software integration CPE 323: Introduction to Embedded Computer Systems 5 What Do Computer Engineers Do? Computer engineers are involved in all aspects of computing Design of computing devices (both Hardware and Software) Where are computing devices? Embedded computer systems (low-end – high-end) In: cars, aircrafts, home appliances, missiles, medical devices,.. -
Single-Cycle
18-447 Computer Architecture Lecture 5: Intro to Microarchitecture: Single-Cycle Prof. Onur Mutlu Carnegie Mellon University Spring 2015, 1/26/2015 Agenda for Today & Next Few Lectures Start Microarchitecture Single-cycle Microarchitectures Multi-cycle Microarchitectures Microprogrammed Microarchitectures Pipelining Issues in Pipelining: Control & Data Dependence Handling, State Maintenance and Recovery, … 2 Recap of Two Weeks and Last Lecture Computer Architecture Today and Basics (Lectures 1 & 2) Fundamental Concepts (Lecture 3) ISA basics and tradeoffs (Lectures 3 & 4) Last Lecture: ISA tradeoffs continued + MIPS ISA Instruction length Uniform vs. non-uniform decode Number of registers Addressing modes Aligned vs. unaligned access RISC vs. CISC properties MIPS ISA Overview 3 Assignment for You Not to be turned in As you learn the MIPS ISA, think about what tradeoffs the designers have made in terms of the ISA properties we talked about And, think about the pros and cons of design choices In comparison to ARM, Alpha In comparison to x86, VAX And, think about the potential mistakes Branch delay slot? Look Backward Load delay slot? No FP, no multiply, MIPS (initial) 4 Food for Thought for You How would you design a new ISA? Where would you place it? What design choices would you make in terms of ISA properties? What would be the first question you ask in this process? “What is my design point?” Look Forward & Up 5 Review: Other Example ISA-level Tradeoffs Condition codes vs. not VLIW vs. single instruction SIMD (single instruction multiple data) vs. SISD Precise vs. imprecise exceptions Virtual memory vs. not Unaligned access vs. -
Analog Electronics Ii B.Tech I Semester for Eee
ANALOG ELECTRONICS II B.TECH I SEMESTER FOR EEE DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING MALLA REDDY COLLEGE OF ENGINEERING & TECHNOLOGY Autonomous Institution – UGC, Govt. of India (Affiliated to JNTU, Hyderabad, Approved by AICTE - Accredited by NBA & NAAC – ‘A’ Grade - ISO 9001:2008 Certified) Maisammaguda, Dhulapally (Post Via Hakimpet), Secunderabad – 500100 PREPARED BY Dr.S.SRINIVASA RAO, Mr K.MALLIKARJUNA LINGAM, Mr R.CHINNA RAO, Mr E.MAHENDAR REDDY Mr V SHIVA RAJKUMAR, MR KLN PRASAD, MR M ANANTHA GUPTHA, (R18A0401) ANALOG ELECTRONICS OBJECTIVES This is a fundamental course, basic knowledge of which is required by all the circuit branch engineers .this course focuses: 1. To familiarize the student with the principal of operation, analysis and design of junction diode .BJT and FET transistors and amplifier circuits. 2. To understand diode as a rectifier. 3. To study basic principal of filter of circuits and various types UNIT-I P-N Junction diode: Qualitative Theory of P-N Junction, P-N Junction as a diode , diode equation , volt- amper characteristics temperature dependence of V-I characteristic , ideal versus practical –resistance levels( static and dynamic), transition and diffusion capacitances, diode equivalent circuits, load line analysis ,breakdown mechanisms in semiconductor diodes , zener diode characteristics. Special purpose electronic devices: Principal of operation and Characteristics of Tunnel Diode with the help of energy band diagrams, Varactar Diode, SCR and photo diode UNIT-II RECTIFIERS, FILTERS: P-N Junction as a rectifier ,Half wave rectifier, , full wave rectifier, Bridge rectifier , Harmonic components in a rectifier circuit, Inductor filter, Capacitor filter, L- section filter, - section filter and comparison of various filter circuits, Voltage regulation using zener diode. -
Sequential Logic .Sel(F[0]), .Out(Addmux Out));
Use Explicit Port Declarations module mux32two (input [31:0] i0,i1, input sel, output [31:0] out); assign out = sel ? i1 : i0; endmodule mux32two adder_mux(.i0(b), .i1(32'd1), Sequential Logic .sel(f[0]), .out(addmux_out)); • Digital state: the D-Register mux32two adder_mux(b, 32'd1, f[0], addmux_out); • Timing constraints for D-Registers 2 • Specifying registers in Verilog • Blocking and nonblocking assignments Order of the ports matters! • Examples Reminder: Lab #2 due Thursday 6.111 Fall 2016 Lecture 4 1 6.111 Fall 2015 Verilog Summary Examples • Verilog – Hardware description language – not software program. parameter MSB = 7; // defines msb as a constant value 7 • A convention: lowercase for variables, UPPERCASE for parameter E = 25, F = 9; // defines two constant numbers parameters module blob #(parameter WIDTH = 64, // default width: 64 pixels parameter BYTE_SIZE = 8, HEIGHT = 64, // default height: 64 pixels BYTE_MASK = BYTE_SIZE - 1; COLOR = 3'b111) // default color: white (input [10:0] x,hcount, input [9:0] y,vcount, output reg [2:0] pixel); endmodule parameter [31:0] DEC_CONST = 1’b1; // value converted to 32 bits • wires wire a,b,z; // three 1-bit wires wire [31:0] memdata; // a 32-bit bus parameter NEWCONST = 3’h4; // implied range of [2:0] wire [7:0] b1,b2,b3,b4; // four 8-bit buses wire [WIDTH-1:0] input; // parameterized bus parameter NEWCONS = 4; // implied range of at least [31:0] 6.111 Fall 2016 Lecture 4 3 6.111 Fall 2016 Lecture 4 4 Something We Can’t Build (Yet) Digital State One model of what we’d like to build What if you were given the following design specification: Next State Memory When the button is pushed: 1) Turn on the light if Device Current it is off State Combinational button 2) Turn off the light if light LOAD it is on Logic The light should change state within a second Input Output of the button press What makes this circuit so different Plan: Build a Sequential Circuit with stored digital STATE – from those we’ve discussed before? • Memory stores CURRENT state, produced at output 1.