Semiconductor The dawn of memory -centric computing
Demand: Memory-centric computing Neutral (Maintain) We recently attended Flash Memory Summit (FMS) 2017, held from August 7 th to 10 th in Santa Clara, California. Launched in 2006, FMS is the world’s largest Industry Report conference on NAND flash technology, and a number of milestone technologies, August 23, 2017 such as eMMC and 3D NAND, have previously been unveiled at the event.
We noticed several important the mes at this year’s event. One key area of focus Mirae Asset Daewoo Co., Ltd. was memory-centric computing, a concept that places memory at the center of server architecture. Ever since the invention of computers, CPUs have been the [Semiconductor ] focal point, with memory playing a supporting role. H owever, the recent rise of new
Hyunwoo Doh sources of demand that require high-performance memory (like machine learning) +822 -3774 -3803 has led to the notion that computer architecture should revolve around memory. [email protected] At this year’s FMS, there was much discussion of specific technol ogies for implementing memory-centric computing, with many presentations focusing on storage fabric technology. Currently, data centers operate at the individual server level, with data processed via each device’s CPUs, DRAM, and NAND. (The servers
are linked through a network.)
In contrast, memory-centric computing manages all data center server elements
(CPU, DRAM, NAND, and HDD) in resource pools. CPUs are aggregated into one pool, and memory into another. This gives multiple CPUs parallel access to dat a stored in one massive memory pool, providing far better performance compared to data processing on CPUs and memory at the server level. Improved data center performance would fuel demand for machine learning, which, in turn, would boost overall semiconductor demand.
Supply: QLCs, double stacking, and SCM While memory-centric computing was the biggest theme regarding memory demand, the main supply-side topics were quadruple-level cells (QLCs), double stacking, and storage-class memory (SCM). There was also widespread anticipation that 3D NAND capacity ramp-ups would pick up pace in 2018. QLCs, which store four bits per NAND cell, enable a 30% bit increase compared to the current triple- level cell (TLC) technology (based on size). While many previously believed QLCs would be difficult to implement because of reliability issues, this year’s conference shed light on advances in technology and pointed to the growing prospects of QLC commercialization. Given new technologies and capex plans, we believe NAND supply growth will begin to accelerate in 2018.
In particular, the recent successful development of QLCs by Toshiba and Samsung Electronics (SEC; 005930 KS/Buy/TP: W2,950,000/CP: W2,350,000) has encouraged many engineers. QLC volume production is largely a nticipated to begin full swing in 2018. At this year’s event, we also heard commentary on how double stacking will facilitate the expansion of NAND supply. It was originally believed that scaling 3D NAND from the current 64 layers to 96 and beyond would gi ve rise to significant technological hurdles. However, there are increasing expectations that the development of double stacking technology, which involves stacking two separate devices, will make the expansion of layer count to 96 or above somewhat easier.
Another widely discussed topic was SCM, a next-generation memory that sits between DRAM and NAND. The recent rapid advance of SCM has been driven by new sources of demand, such as machine learning. Because machine learning calls for huge amounts of data to be accessed quickly, DRAM is considered too expensive, while NAND is considered too slow. This is where SCM comes in, as it is more affordable than DRAM and faster than NAND. Many conference presenters highlighted the importance of SCM to the implementation of memory-centric computing.
August 23, 2017 Semiconductor
I. Flash Memory Summit 2017
We recently attended FMS 2017, held from August 7 th to 10 th in Santa Clara, California. Launched in 2006, FMS is the world’s largest conference on NAND flash technology, and a number of milestone technologies, such as eMMC, TLC, universal flash storage (UFS), 3D NAND, and 3D XPoint have previously been unveiled at the event. This year, engineers from leading NAND producers (SEC, SK Hynix [000660 KS/Trading Buy/TP: W75,000/CP: W68,200], Micron, Toshiba, etc.), controller producers (Marvell Technology Group, Silicon Motion, etc.), storage players (NetApp, Pure Storage, etc.), and internet giants (Google, Facebook, etc.) carried out seminars on new technologies.
We noticed several important themes at this year’s event. One key area of focus was memory-centric computing, a concept that places memory at the center of server architecture. Ever since the invention of computers, CPUs have been the focal point, with memory playing a supporting role. However, the recent rise of new sources of demand that require high-performance memory (like machine learning) has led to the notion that computer architecture should revolve around memory. At this year’s FMS, there was much discussion of specific technologies for implementing memory-centric computing, with many presentations focusing on storage fabric technology.
The subject matter of the FMS 2017 presentations suggests that the key driver of NAND demand has largely shifted from mobile to servers. Another widely discussed topic was SCM, including 3D XPoint and ReRAM, reflecting the rise of technologies requiring high- performance storage solutions like cloud computing and machine learning. In addition, there were a significant number of presentations covering non-volatile memory express (NVMe) and QLC technologies, as well as the outlook for the Chinese memory market. Flash memory for autonomous cars also attracted attention.
We believe that the key takeaways from FMS 2017 were as follows:
1) NAND demand is anticipated to remain on the rise on the back of growth in the server market. Notably, memory-centric computing and storage fabric technologies are expected to drive the high-performance storage market.
2) Demand for SCM, including 3D XPoint and ReRAM, is projected to pick up in the near future.
3) NAND supply is expected to remain stable this year but should grow at an accelerated pace starting next year on the back of increasing 3D NAND capacity, Toshiba’s normalization, and the increasing adoption of new process technologies, including double stacking and QLC.
4) Chinese NAND producers will likely commence mass-production in 2H18 or 2019. While their technological competitiveness is believed to lag behind that of leading players like SEC, it should be on par with or surpass that of niche players.
Mirae Asset Daewoo Research 2 August 23, 2017 Semiconductor
Figure 1. Engineers from Facebook and Seagate present NVMe SSD controller technologies
Source: FMS 2017, Mirae Asset Daewoo Research
Figure 2. An eBay engineer explains the company’s data center structure
Source: FMS 2017, Mirae Asset Daewoo Research
Mirae Asset Daewoo Research 3 August 23, 2017 Semiconductor
II. Demand: Memory-centric computing
Data explosion was a common theme running through the presentations made at FMS 2017, suggesting that the profile of memory, particularly flash memory, will sharply rise amid the emergence of new sources of demand, such as machine learning, autonomous driving, and cloud computing. Significantly, these new demand drivers require high- performance memory as well as changes in server architecture/interfaces. Ever since the invention of computers, CPUs have been the focal point, with memory playing a supporting role. However, we are starting to see a shift toward the notion that computer architecture should revolve around memory.
At this year’s FMS, there was much discussion of memory-centric computing technologies, with many presentations focusing on fabric computing technology. Currently, data centers operate at the individual server level, with data processed via each device’s CPUs, graphics processing units (GPUs), DRAM, HDDs and NAND. In contrast, fabric computing manages all data center server elements (CPUs, DRAM, NAND, and HDDs) in resource pools. CPUs are aggregated into one pool, and memory into another. This gives multiple CPUs parallel access to data stored in one massive memory pool, providing far better performance (particularly for machine learning, which requires parallel data processing), preventing computing resources from being wasted, and enabling flexible expansion/reduction in the number of severs per data center.
However, in order to implement fabric computing, there are still many technological hurdles that need to be cleared. Notably, fabric computing can be divided into two types: static and dynamic. While the former can be implemented with existing technologies (as it is characterized by a hardware structure similar to that of conventional computing and the distribution of resources via software), the latter (which is fabric computing in its truest sense) is currently difficult to implement, as it requires real-time hardware division/integration.
To implement dynamic fabric computing, it will be necessary to develop fresh networking technologies, as even the newest technologies, including HyperTransport and InfiniBand, have weaknesses. Dynamic fabric computing requires real-time integration of computing resources, which is impossible with existing technologies. Currently, linkages between CPUs and memory generally have response times of several nanoseconds and transmission speeds of several gigabytes per second, while linkages between input and output devices are characterized by far lengthier respond times and slower speeds. Therefore, until recently, the development of fabric computing technology mostly involved directly integrating CPUs and memory, and linking the other resources via “fabrics.”
At FMS 2017, storage fabric technology was particularly well represented. We believe this suggests that memory is moving toward the center of server architecture.
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Figure 3. Concept of memory-centric computing
Source: FMS 2017, Western Digital
Figure 4. Memory -centric computing is currently difficult to implement , but this should change soon
Source: FMS 2017, Western Digital
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Figure 5. Many presenters focused on memory-centric computing during FMS 2017
Source: FMS 2017, HPE
Figure 6. Consortiums ( including Gen -Z) have been created to address challenges related to memory -centric computing
Source: FMS 2017, Gen-Z
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III. Supply: QLCs and double stacking
At this year’s FMS, the consensus was that NAND supply growth would begin to accelerate from 2018 onwards (after remaining modest in 2017). While technological challenges related to the shift to 3D NAND (from 2D NAND) and company-specific issues (e.g., financial difficulties for Toshiba) have thus far slowed the pace of supply growth, many attendees expressed confidence that most of these issues would be resolved in 2018.
There was also anticipation that Toshiba, SK Hynix, and Micron would accelerate their shift to 3D NAND and capacity ramp-ups in 2018 and that Chinese players would begin NAND production sometime between 2H18 and 1H19, after placing orders for relevant equipment in 2018. Many industry experts present at the summit projected that the potential launch of QLCs, which store four bits per NAND cell and the introduction of double stacking would accelerate NAND supply growth from 2018 onwards.
With regard to presentation topics, QLCs garnered significant attention from investors, as they have been successfully developed by Toshiba and SEC (in 2017). Existing NAND flash memory technologies include single-level cell (SLC), multi-level cell (MLC), and TLC flash, which store one, two, and three bits per NAND cell, respectively. In comparison with SLCs, MLCs and TLCs are cheaper to produce but suffer from lower accuracy, shorter life spans, and slower read/write speeds. While the life span of SLC flash is estimated at around 100,000 read/write cycles, those of MLC and TLC flash are much shorter, at 10,000 and 1,000, respectively. As such, many previously believed TLC flash would be difficult to apply to SSDs; however, the recent advancement in controller technology has allowed TLCs to become the mainstream NAND flash technology for SSDs.
Theoretically, QLC flash would allow for just 100 read/write cycles, suggesting low feasibility. Nevertheless, chipmakers, such as Toshiba and Intel, assert that advances in controller technology and the usage of next-generation memory (e.g., 3D XPoint) would allow for the adoption of QLCs in SSDs. In fact, they claim that they will begin production of QLC NAND- based SSDs from 2H17. Indeed, at FMS 2017, Silicon Motion, a NAND controller maker, unveiled its findings on error correcting codes (ECCs) for QLC NAND, while Pure Storage, an all-flash storage maker, asserted that QLC NAND boasted relatively high reliability but would still require the development of more accurate ECCs. QLC NAND enables a 30% bit increase compared with existing TLC NAND (based on size), meaning that wider adoption of QLC flash should help accelerate NAND supply growth.
There were many presentations about double stacking, which involves the stacking of two separate devices. For instance, a 96-layer chip would be created by stacking two 48-layer devices. Double stacking circumvents the challenges associated with single stacking and makes the expansion of layer count to 96 or above somewhat easier.
However, double stacking comes with hefty costs. Indeed, as double stacking calls for 30% more wiring than single stacking (which is used up to 64 layers) the technology is more expensive to implement.
Chipmakers are currently weighing whether to opt for single stacking (which is cheaper but more complicated) or double stacking (which is more expensive but less complicated). We believe that SEC and Toshiba are likely to deploy single stacking for 96-layer chips and are considering adopting double stacking for 128 layers and above. SK Hynix is projected to apply double stacking starting with 72-layer chips. Whatever choice chipmakers make, deposition and etching equipment and materials suppliers—including TES (095610 KQ/Buy/ TP: W38,000/CP: W30,400), Wonik IPS (240810 KQ/Buy/TP: W37,000/CP: W31,950), Eugene Technology (084370 KQ/Buy/TP: W25,000/CP: W17,650), and Jusung Engineering (036930 KQ/Buy/TP: W18,000/CP: W15,850)—look well-positioned to benefit.
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Figure 7. At FMS 2017, Western Digital unveiled its 64-layer 3D NAND QLC-based SSD
Source: FMS 2017, Western Digital
Figure 8. Pure Storage presented the results of its QLC testing
Source: FMS 2017, Pure Storage
Mirae Asset Daewoo Research 8 August 23, 2017 Semiconductor
Figure 9. Pure Storage expects technological advances to further improve QLC NAND reliability
Source: FMS 2017, Pure Storage
Figure 10. Silicon Motion unveiled data on ECCs, the key to QLC commercialization
Source: FMS 2017, Silicon Motion
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Figure 11 . At FMS 2017, a number of players unveiled double stacking technologies to address the challenges of 96 layer s and beyond
Source: Lam Research
Figure 12 . Many attendees forecast NAND supply/demand dynamics to remain favorable through 2018
Source: FMS 2017, Seagate
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IV. Storage-class memory
SCM, a next-generation memory that sits between DRAM and NAND, was once again a hot topic at FMS 2017. Recently, 3D XPoint and ReRAM have emerged as strong contenders in the SCM space. ReRAM works by changing the resistance across a solid-state material, and 3D XPoint is a type of ReRAM jointly developed by Micron and Intel.
The recent rapid advance of SCM has been driven by new sources of demand, such as machine learning. As machine learning requires rapid access to massive amounts of data, it calls for high-performance storage. While NAND is considered too slow for machine learning, DRAM, which is faster than NAND, is considered too expensive and volatile. Notably, SCM is non-volatile, cheaper than DRAM, and faster than NAND. Recently, machine learning developers have increasingly been opting for GPUs or field-programmable gate arrays (FPGAs) over CPUs to enable faster data processing. Growing demand for high- performance processing units should boost demand for high-performance storage. At FMS 2017, many global IT/internet firms, including Western Digital, Hewlett Packard Enterprise (HPE), Intel, NetApp, Micron, Crossbar, Nvidia, eBay, Facebook, and IBM, called for the adoption of SCM.
At the event, HPE introduced Gen-Z, a consortium formed to develop standards for SCM, storage fabric, and related architecture. Intel explained its two-track strategy based on the application of 3D XPoint for “hot data” and 3D NAND for “warm data.” Crossbar emphasized that the endurance of its ReRAM technology was two to 40 times greater than that of NAND SSDs. While current SCM technologies, including 3D XPoint, have 2D or two-layer structures, many companies at FMS 2017 suggested that the adoption of 3D/vertical technology should enhance memory capacity (per area).
Many investors are wondering if SCM will erode demand for DRAM and NAND, and, if so, which one will be hit harder. We (as well as many FMS participants) believe that the rise of SCM will have a greater impact on DRAM. In our view, NAND, which currently dominates the storage market (US$25bn as of 2016), is likely to increase its share of the overall computing system market going forward, even if SCM eats into the high-performance NAND market. However, DRAM has no avenue through which to offset market share losses to SCM. In addition, the surge in DRAM prices since 2H16 will likely accelerate the adoption of SCM. Notably, Phison unveiled DRAM-less PCIe SSD technology utilizing host memory buffer (HMB).
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Figure 13. NetApp’s vision for SCM
Source: FMS 2017, NetApp
Figure 14. SCM to bridge the performance gap between DRAM and NAND
Source: FMS 2017, HPE
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Figure 15. IBM to adopt SCM
Source: FMS 2017, IBM
Figure 16. SCM contenders: STT-MRAM, PCRAM, ReRAM, etc.
Source: FMS 2017, IBM
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Figure 17. Intel’s two-track strategy
Source: FMS 2017, Intel
Figure 18. Phison unveiled DRAM-less PCIe SSD utilizing HMB
Source: FMS 2017, Phison
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V. China’s memory market
This year’s FMS served as an independent forum on China’s memory market, with the event featuring a variety of presentations on the country’s current memory trends, data center/SSD market conditions, memory fab construction schedules, etc. According to one presentation, in China, a total of 12 300mm fabs (including one NAND fab and two DRAM fabs) are now either under construction or planned. Specifically, Yangtze Memory Technologies (YMTC), a subsidiary of Tsinghua Unigroup, is investing in a NAND fab, while Fujian Jinhua Integrated Circuit (JHICC) and Rui-Li are investing in DRAM fabs. Notably, JHICC procured relevant DRAM technologies from Taiwan-based UMC. We expect the aforementioned three companies to place orders for semiconductor manufacturing equipment in 1H18, in light of their plans to initiate mass production between end-2018 and end-2019.
The consensus at FMS 2017 was that Chinese memory makers would be positioned between top-tier makers, including SEC, SK Hynix, and Toshiba, and niche players, such as Winbond and Nanya. According to various presenters at the summit, Chinese makers’ technology is far inferior to that of top-tier makers but better than that of Winbond and Nanya, which are currently generating solid profits amid the market boom. Chinese memory makers are planning to focus on the production of chips used in consumer electronics made by local makers. They are expected to start producing high-performance chips for use in PCs, servers, and mobile devices in 2020.
Overall, the Chinese server NAND market is still in its infancy. Chinese SSDs and all-flash storage arrays account for just 5% and 3.7% of their respective global markets. As such, the Chinese server-use SSD market has ample room for growth, especially considering the fact that local IT firms, including Alibaba and Tencent, are aggressively expanding into cloud computing.
Figure 19. Many Chinese makers are planning for DRAM and NAND production
Source: FMS 2017, GigaDevice Semiconductor
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Figure 20. Chinese memory makers are positioned between top-tier makers and niche players.
Source: FMS 2017, GigaDevice Semiconductor
Figure 21. The Chinese government is driving local memory production
Source: FMS 2017, GigaDevice Semiconductor
Figure 22 . The Chinese enterprise SSD market accounts for only a fraction of the global market but is likely to expand
Source: FMS 2017, WatchStor
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APPENDIX 1
Important Disclosures & Disclaimers 2-Year Rating and Target Price History
Company (Code) Date Rating Target Price Company (Code) Date Rating Target Price Samsung Electronics(005930) 07/27/2017 Buy 2,950,000 No Coverage 07/07/2017 Trading Buy 2,700,000 07/28/2016 Buy 1,900,000 04/27/2017 Trading Buy 2,500,000 04/29/2016 Buy 1,750,000 03/01/2017 Trading Buy 2,150,000 04/01/2016 Buy 1,650,000 01/06/2017 Buy 2,350,000 01/29/2016 Buy 1,550,000 01/01/2017 Buy 2,100,000 07/30/2015 Buy 1,700,000
(W) Samsung Electronics 4,000,000
3,000,000
2,000,000
1,000,000
0 Aug 15 Aug 16 Aug 17
Stock Ratings Industry Ratings Buy : Relative performance of 20% or greater Overweight : Fundamentals are favorable or improving Trading Buy : Relative performance of 10% or greater, but with volatility Neutral : Fundamentals are steady without any material changes Hold : Relative performance of -10% and 10% Underweight : Fundamentals are unfavorable or worsening Sell : Relative performance of -10% Ratings and Target Price History (Share price ( ─), Target price (▬), Not covered ( ■), Buy ( ▲), Trading Buy ( ■), Hold ( ●), Sell ( ◆)) * Our investment rating is a guide to the relative return of the stock versus the market over the next 12 months. * Although it is not part of the official ratings at Mirae Asset Daewoo Co., Ltd., we may call a trading opportunity in case there is a technical or short-term material development. * The target price was determined by the research analyst through valuation methods discussed in this report, in part based on the analyst’s estimate of future earnings. * The achievement of the target price may be impeded by risks related to the subject securities and companies, as well as general market and economic conditions.
Equity Ratings Distribution Buy Trading Buy Hold Sell 69.67% 17.06% 13.27% 0.00% * Based on recommendations in the last 12-months (as of June 30, 2017)
Disclosures As of the publication date, Mirae Asset Daewoo Co., Ltd. has acted as a liquidity provider for equity options backed by share s of Samsung Electronics as an underlying asset, and other than this, Mirae Asset Daewoo has no other special interests in the covered companies.
Analyst Certification The research analysts who prepared this report (the “Analysts”) are registered with the Korea Financial Investment Association and are subject to Korean securities regulations. They are neither registered as research analysts in any other jurisdiction nor subject to the laws and regulations thereof. Opinions expressed in this publication about the subject securities and companies accurately reflect the personal views of the Analysts primarily responsible for this report. Mirae Asset Daewoo Co., Ltd. (“Mirae Asset Daewoo”) policy prohibits its Analysts and members of their households from owning securities of any company in the Analyst’s area of coverage, and the Analysts do not serve as an officer, director or advisory board member of the subject companies. Except as otherwise specified herein, the Analysts have not received any compensation or any other benefits from the subject companies in the past 12 months and have not been promised the same in connection with this report. No part of the compensation of the Analysts was, is, or will be directly or indirectly related to the specific recommendations or views contained in this report but, like all employees of Mirae Asset Daewoo, the Analysts receive compensation that is determined by overall firm profitability, which includes revenues from, among other business units, the institutional equities, investment banking, proprietary trading and private client division. At the time of publication of this report, the Analysts do not know or have reason to know of any actual, material conflict of interest of the Analyst or Mirae Asset Daewoo except as otherwise stated herein.
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