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Semiconductor the Dawn of Memory -Centric Computing Semiconductor The dawn of memory -centric computing Demand: Memory-centric computing Neutral (Maintain) We recently attended Flash Memory Summit (FMS) 2017, held from August 7 th to 10 th in Santa Clara, California. Launched in 2006, FMS is the world’s largest Industry Report conference on NAND flash technology, and a number of milestone technologies, August 23, 2017 such as eMMC and 3D NAND, have previously been unveiled at the event. We noticed several important the mes at this year’s event. One key area of focus Mirae Asset Daewoo Co., Ltd. was memory-centric computing, a concept that places memory at the center of server architecture. Ever since the invention of computers, CPUs have been the [Semiconductor ] focal point, with memory playing a supporting role. H owever, the recent rise of new Hyunwoo Doh sources of demand that require high-performance memory (like machine learning) +822 -3774 -3803 has led to the notion that computer architecture should revolve around memory. [email protected] At this year’s FMS, there was much discussion of specific technol ogies for implementing memory-centric computing, with many presentations focusing on storage fabric technology. Currently, data centers operate at the individual server level, with data processed via each device’s CPUs, DRAM, and NAND. (The servers are linked through a network.) In contrast, memory-centric computing manages all data center server elements (CPU, DRAM, NAND, and HDD) in resource pools. CPUs are aggregated into one pool, and memory into another. This gives multiple CPUs parallel access to dat a stored in one massive memory pool, providing far better performance compared to data processing on CPUs and memory at the server level. Improved data center performance would fuel demand for machine learning, which, in turn, would boost overall semiconductor demand. Supply: QLCs, double stacking, and SCM While memory-centric computing was the biggest theme regarding memory demand, the main supply-side topics were quadruple-level cells (QLCs), double stacking, and storage-class memory (SCM). There was also widespread anticipation that 3D NAND capacity ramp-ups would pick up pace in 2018. QLCs, which store four bits per NAND cell, enable a 30% bit increase compared to the current triple- level cell (TLC) technology (based on size). While many previously believed QLCs would be difficult to implement because of reliability issues, this year’s conference shed light on advances in technology and pointed to the growing prospects of QLC commercialization. Given new technologies and capex plans, we believe NAND supply growth will begin to accelerate in 2018. In particular, the recent successful development of QLCs by Toshiba and Samsung Electronics (SEC; 005930 KS/Buy/TP: W2,950,000/CP: W2,350,000) has encouraged many engineers. QLC volume production is largely a nticipated to begin full swing in 2018. At this year’s event, we also heard commentary on how double stacking will facilitate the expansion of NAND supply. It was originally believed that scaling 3D NAND from the current 64 layers to 96 and beyond would gi ve rise to significant technological hurdles. However, there are increasing expectations that the development of double stacking technology, which involves stacking two separate devices, will make the expansion of layer count to 96 or above somewhat easier. Another widely discussed topic was SCM, a next-generation memory that sits between DRAM and NAND. The recent rapid advance of SCM has been driven by new sources of demand, such as machine learning. Because machine learning calls for huge amounts of data to be accessed quickly, DRAM is considered too expensive, while NAND is considered too slow. This is where SCM comes in, as it is more affordable than DRAM and faster than NAND. Many conference presenters highlighted the importance of SCM to the implementation of memory-centric computing. August 23, 2017 Semiconductor I. Flash Memory Summit 2017 We recently attended FMS 2017, held from August 7 th to 10 th in Santa Clara, California. Launched in 2006, FMS is the world’s largest conference on NAND flash technology, and a number of milestone technologies, such as eMMC, TLC, universal flash storage (UFS), 3D NAND, and 3D XPoint have previously been unveiled at the event. This year, engineers from leading NAND producers (SEC, SK Hynix [000660 KS/Trading Buy/TP: W75,000/CP: W68,200], Micron, Toshiba, etc.), controller producers (Marvell Technology Group, Silicon Motion, etc.), storage players (NetApp, Pure Storage, etc.), and internet giants (Google, Facebook, etc.) carried out seminars on new technologies. We noticed several important themes at this year’s event. One key area of focus was memory-centric computing, a concept that places memory at the center of server architecture. Ever since the invention of computers, CPUs have been the focal point, with memory playing a supporting role. However, the recent rise of new sources of demand that require high-performance memory (like machine learning) has led to the notion that computer architecture should revolve around memory. At this year’s FMS, there was much discussion of specific technologies for implementing memory-centric computing, with many presentations focusing on storage fabric technology. The subject matter of the FMS 2017 presentations suggests that the key driver of NAND demand has largely shifted from mobile to servers. Another widely discussed topic was SCM, including 3D XPoint and ReRAM, reflecting the rise of technologies requiring high- performance storage solutions like cloud computing and machine learning. In addition, there were a significant number of presentations covering non-volatile memory express (NVMe) and QLC technologies, as well as the outlook for the Chinese memory market. Flash memory for autonomous cars also attracted attention. We believe that the key takeaways from FMS 2017 were as follows: 1) NAND demand is anticipated to remain on the rise on the back of growth in the server market. Notably, memory-centric computing and storage fabric technologies are expected to drive the high-performance storage market. 2) Demand for SCM, including 3D XPoint and ReRAM, is projected to pick up in the near future. 3) NAND supply is expected to remain stable this year but should grow at an accelerated pace starting next year on the back of increasing 3D NAND capacity, Toshiba’s normalization, and the increasing adoption of new process technologies, including double stacking and QLC. 4) Chinese NAND producers will likely commence mass-production in 2H18 or 2019. While their technological competitiveness is believed to lag behind that of leading players like SEC, it should be on par with or surpass that of niche players. Mirae Asset Daewoo Research 2 August 23, 2017 Semiconductor Figure 1. Engineers from Facebook and Seagate present NVMe SSD controller technologies Source: FMS 2017, Mirae Asset Daewoo Research Figure 2. An eBay engineer explains the company’s data center structure Source: FMS 2017, Mirae Asset Daewoo Research Mirae Asset Daewoo Research 3 August 23, 2017 Semiconductor II. Demand: Memory-centric computing Data explosion was a common theme running through the presentations made at FMS 2017, suggesting that the profile of memory, particularly flash memory, will sharply rise amid the emergence of new sources of demand, such as machine learning, autonomous driving, and cloud computing. Significantly, these new demand drivers require high- performance memory as well as changes in server architecture/interfaces. Ever since the invention of computers, CPUs have been the focal point, with memory playing a supporting role. However, we are starting to see a shift toward the notion that computer architecture should revolve around memory. At this year’s FMS, there was much discussion of memory-centric computing technologies, with many presentations focusing on fabric computing technology. Currently, data centers operate at the individual server level, with data processed via each device’s CPUs, graphics processing units (GPUs), DRAM, HDDs and NAND. In contrast, fabric computing manages all data center server elements (CPUs, DRAM, NAND, and HDDs) in resource pools. CPUs are aggregated into one pool, and memory into another. This gives multiple CPUs parallel access to data stored in one massive memory pool, providing far better performance (particularly for machine learning, which requires parallel data processing), preventing computing resources from being wasted, and enabling flexible expansion/reduction in the number of severs per data center. However, in order to implement fabric computing, there are still many technological hurdles that need to be cleared. Notably, fabric computing can be divided into two types: static and dynamic. While the former can be implemented with existing technologies (as it is characterized by a hardware structure similar to that of conventional computing and the distribution of resources via software), the latter (which is fabric computing in its truest sense) is currently difficult to implement, as it requires real-time hardware division/integration. To implement dynamic fabric computing, it will be necessary to develop fresh networking technologies, as even the newest technologies, including HyperTransport and InfiniBand, have weaknesses. Dynamic fabric computing requires real-time integration of computing resources, which is impossible with existing technologies. Currently, linkages between CPUs and memory generally have response times of several nanoseconds
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