Comprehensive Mapping and Benchmarking of Esaki Diode Performance

Total Page:16

File Type:pdf, Size:1020Kb

Comprehensive Mapping and Benchmarking of Esaki Diode Performance Rochester Institute of Technology RIT Scholar Works Theses 8-30-2013 Comprehensive Mapping and Benchmarking of Esaki Diode Performance David John Pawlik Follow this and additional works at: https://scholarworks.rit.edu/theses Part of the Electronic Devices and Semiconductor Manufacturing Commons, and the Other Electrical and Computer Engineering Commons Recommended Citation Pawlik, David John, "Comprehensive Mapping and Benchmarking of Esaki Diode Performance" (2013). Thesis. Rochester Institute of Technology. Accessed from This Dissertation is brought to you for free and open access by RIT Scholar Works. It has been accepted for inclusion in Theses by an authorized administrator of RIT Scholar Works. For more information, please contact [email protected]. R I T Comprehensive Mapping and Benchmarking of Esaki Diode Performance by David John Pawlik A dissertation submitted in partial fulfillment of the requirements for the degree of Doctorate of Philosophy in Microsystems Engineering Microsystems Engineering Program Kate Gleason College of Engineering Rochester Institute of Technology Rochester, New York August 30, 2013 Comprehensive Mapping and Benchmarking of Esaki Diode Performance by David Pawlik Committee Approval: We, the undersigned committee members, certify that we have advised and/or supervised the candidate on the work described in this dissertation. We further certify that we have reviewed the dissertation manuscript and approve it in partial fulfillment of the requirements of the degree of Doctor of Philosophy in Microsystems Engineering. ______________________________________________________________________________ Prof. Sean L. Rommel Date Associate Professor, Electrical and Microelectronic Engineering Department ______________________________________________________________________________ Prof. Santosh K. Kurinec Date Professor, Electrical and Microelectronic Engineering Department ______________________________________________________________________________ Prof. Seth Hubbard Date Associate Professor, Physics Department ______________________________________________________________________________ Prof. Suman Datta Date Professor, Electrical Engineering Department ______________________________________________________________________________ Prof. Andreas Savakis Date Professor, Computer Engineering Department Certified by: ______________________________________________________________________________ Prof. Bruce Smith Date Director, Microsystems Engineering Program ______________________________________________________________________________ Prof. Harvey Palmer Date Dean, Kate Gleason College of Engineering ii ABSTRACT Kate Gleason College of Engineering Rochester Institute of Technology Degree : Doctor of Philosophy Program : Microsystems Engineering Authors Name: David John Pawlik Advisors Name: Prof. Sean L. Rommel Dissertation Title: Comprehensive Mapping and Benchmarking of Esaki Diode Performance The tunneling-FET (TFET) has been identified as a prospective MOSFET replacement technology with the potential to extend geometric and electrostatic scaling of digital integrated circuits. However, experimental demonstrations of the TFET have yet to reliably achieve drive currents necessary to power large scale integrated circuits. Consequentially, much effort has gone into optimizing the band-to-band tunneling (BTBT) efficiency of the TFET. In this work, the Esaki tunnel diode (ETD) is used as a short loop element to map and optimize BTBT performance for a large design space. The experimental results and tools developed for this work may be used to (1) map additional and more complicated ETD structures, (2) guide development of improved TFET structures and BTBT devices, (3) design ETDs targeted BTBT characteristics, and (4) calibrate BTBT models. The first objective was to verify the quality of monolithically integrated III-V based ETDs on Si substrates (the industry standard). Five separate GaAs/InGaAs ETDs were fabricated on GaAs-virtual substrates via aspect ratio trapping, along with two companion ETDs grown on Si and GaAs bulk substrates. The quality of the virtual substrates and BTBT were verified with (i) very large peak-valley current ratios (up to 56), (ii) temperature measurements, and (iii) deep sub-micron scaling. The second objective mapped the BTBT characteristics of the In 1-xGa xAs ternary system by (1) standardizing the ETD structure, (2) limiting experimental work to unstrained (i) GaAs, (ii) In 0.53 Ga 0.47 As, and (iii) InAs homojunctions, and (3) systematically varying doping concentrations. Characteristic BTBT trendlines were determined for each material system, ranging from ultra-low to ultra-high peak 2 2 current densities ( JP) of 11 µA/cm to 975 kA/cm for GaAs and In 0.53 Ga 0.47 As, respectively. Furthermore, the BTBT mapping results establishes that BTBT current densities can only be improved by ~2-3 times the current record, by increasing doping concentration and In content up to ~75%. The E. O. Kane BTBT model has been shown to accurately predict the tunneling characteristics for the entire design space. Furthermore, it was used to help guide the development of a new universal BTBT model, which is a closed form exponential using 2 fitting parameters, material constants, and doping concentrations. With it, JP can quickly be predicted over the entire design space of this work. iii ACKNOWLEDGMENTS It was my parents (John and Diane) who, through their nurturing and encouragement, set me on the path towards becoming an intellectual in the areas of math, science, and engineering. They never needed to push me in any direction. However they were, and are, great at showing me the various avenues of approach and helping me peer down the way to judge the best course of action. I am forever grateful to them for being superb parents. I never doubted being able to complete this dream, just like I know they will always be there for me (in one way or another). Their work ethic and strength of character continually inspires me to improve my own character. I also want to thank my brother, Michael, who has always had my back. His support and encouragement has always been there, sometimes behind the scenes, even when I didn’t realize I needed it. Recently he has shown me, by example, what it takes to be a strong and effective family member. Prof. Rommel is personally responsible for retaining me at RIT for many years past my undergraduate days, and I have loved all of it. As an intern in his research group I fell in love with the topic area, and gained a great relationship with my advisor and mentor. I cannot imagine having completed this work with anyone else. I know that we will continue our friendship into the future, and look forward to many more discussions regarding research, lab work, fellow researchers, and of course pop culture science fiction. I would like to thank Prof. Lynn Fuller for stimulating my initial interest and pursuit in this highly technical and diverse profession. All of my professors, especially committee members, have added invaluable knowledge and skills to my repertoire over the years. It is in large part due to their passion for this profession that I am expertly prepared and enthusiastically ready to actively contribute to the next generation of micro/nano electronic technologies. Additionally, I may pursue a professorship in order to help share my own passion and knowledge to future generations. It would not have been possible to complete any of the experimental results in this work without the uncounted hours of help from the Semiconductor & Microsystems Fabrication Laboratory (SMFL) staff. Specifically I would like to thank Richard Battaglia, Thomas Grimsley, John Nash, David Yackoff, Scott Blondell, Prof. Karl Hirschman, Sean O’Brien, and Bruce Tolleson. They have always generously donated their time, knowledge, and expertise. This work would have been relegated to the realms of theory if it were not for them and the fabrication facility at RIT. Finally, my sanity throughout any year ebbed and flowed with my friends and family. I apologize to Paul Thomas, for spending so much time cursing out my computer while in the office or explaining how I “hate” X, Y, and Z. But you will never know how much that helped. Furthermore, game nights with Paul and Athena, Andy, and Marybeth were/are always welcome. Finally, beating up my body while mountain biking (thanks Athena) always seems to heal my mental state. And that is largely due to riding with Paul, Athena, Josh, Ben, Shone, Marybeth, John, Ryan, Scott, Katie, Carrie, Chelse, and everyone else I’ve met on the trails. Though we are separated by 1 small continent… let’s peddle! iv TABLE OF CONTENTS List of Tables ................................................................................................................................ viii List of Figures ................................................................................................................................. ix List of Abbreviations .................................................................................................................... xvi List of Variable ........................................................................................................................... xviii 1. Introduction and Motivation ...................................................................................................... 1 1.1. Introduction ....................................................................................................................
Recommended publications
  • A Noise Investigation of Tunnel-Diode Microwave Amplifiers* A
    1961 PROCEEDINGS OF THE IRE 739 A Noise Investigation of Tunnel-Diode Microwave Amplifiers* A. YARIVt, MEMBER, IRE, AND J. S. COOKt, MEMBER, IRE Summary-An analysis and derivation of the noise figure of a must consider the shot noise accompaniying the tunniel- tunnel-diode microwave amplifier are presented. The agreement be- ing process.7 There are two separate and independenit tween the measured noise figure and the theoretical results is an in- direct check on the existence of full shot noise in germanium tunnel tunineling currents, one consisting of electrons tunnelinlg diodes at microwave frequencies. The limiting noise temperature of from the N to the P side of the junction, which we de- the amplifier is elIR/2k, and can be approached by using diodes with inote by ii, and a second curreit, i2, made up of electrons small (RC) products in which the extreme overcoupling (load mis- crossing the junctioni in the opposite directioni. The niet match) and high gain can be achieved simultaneously. measurable dc current is Io-= ii -| i2 . Since the cur- INTRODUCTION renits ii and i2 are uncorrelated, the total shot noisel is represented by a current generator of mean-square A MPLIFIERS utilizing tunniel diodes were first re- amplitude, ported by Chang' at frequencies up to 80 Mc. He also suggested that the noise conitribution of the diode was due to the shot noise accompanying the j2 = 2e( 1iI + i2 I )B, (1) tunneling process. This suggestion was con1firmed by Lee and MAIonitgomery,2 who showed by measurements where e is the electronic charge and B is the bandwidth at 5 Mc that full shot noise was inideed genierated by the in cycles per seconid in which the noise is conisidered.
    [Show full text]
  • Px4v; All 4.Us/ ATTORNEYS Nov
    Nov. 16, 1971 J. E. CONANT ET All 3,619,912 WSUA SIMULATION DISPLAY SYSTEM Filed Aug. 9, 1968 4. Sheets-Sheet I. 12 O MODEL&r 3 MOON TRANSA ORY Motion systEM F.G. 25 D SPLAY SYSTEM GENERA Puy RPOS OG A ARCRAFT COMPER SMUAYOR 5 INVENTORS yOAN. E. CONAN & ATER F.B.CZEK px4v; All 4.us/ ATTORNEYS Nov. 16, 1971 J. E. CONANT ETAL 3,619,912 WISUAL SIMULATION DISPLAY SYSTEM Nov. 16, 1971 J. E. conANT ETAL 3,619,912 WISUAL SIMULATION DISPLAY SYSTEM ATTC)RNIEYS Nov. 16, 1971 J. E. CONANT ET All 3,619,912 WISUAL SIMULATION DISPLAY SYSTEM 3,619,912 United States Patent Office Patented Nov. 16, 1971 2 3,619,912 ual techniques, for coordination of the several monitors VISUAL SIMULATION DISPLAY SYSTEM in an overall display in which an image target is trans John E. Conant, Arlington, and Walter F. Buczek, Spring lated in a path across the several monitors, in any direc field, Va., assignors to Melpar, Inc., Falls Church, Va. tion thereacross, to correspond to the path of such an Filed Aug. 9, 1968, Ser. No. 751,522 image in actual flight of the craft as simulated by the con Int, CI. B64g 7/00, G09b 9/08 trols exercised by the trainee. U.S. C. 35-12 5 Claims Each monitor is supplied with delayed sync pulses and blanking information from its own video control network, with control coordination effected, in a preferred embodi ABSTRACT OF THE DISCLOSURE 10 ment, by computer input signals developed in response An optical image display is provided in a mosaic of to trainee control.
    [Show full text]
  • Two Terminal Special Purpose Devices First Year
    www.uptunotes.com Content: - Special Purpose two terminal Devices: Light-Emitting Diodes, Varactor (Varicap)Diodes, Tunnel Diodes, Liquid-Crystal Displays. 1- Light Emitting Diode (LED) Light Emitting Diode is a photo electronic device which converts electrical energy to light energy. It is heavily doped P-N junction diode which under forward biased emits spontaneous radiation. The diode is covered with a transparent cover so that the emitted light may come out. Construction- In an LED, the upper layer of p-type semiconductor is deposited by diffusion on n-type layer of semiconductor. The metalized contacts are provided for applying the forward bias to the P-N junction diode from battery B through resistance R which controls the brightness of light emitted. Fig: LED construction Working of LED The LED works on the principle of electroluminescence. When a P-N junction is forward biases, the electrons in N- region cross the junction & recombines with holes in P-region. When electrons recombine with the holes, they move from conduction band to valence band which is at lower energy level. While moving, the additional energy is released by the free electrons which appear in the form of light due to the special material used in the LED. The energy released depends on the forbidden gap energy which determines the wavelength & the colour of the emitted light. Materials of LED The materials which are the mixtures of Gallium, Arsenic & Phosphorus are used in LED to obtain different coliour of light. S.No. Material Symbol Colour 1 Gallium Arsenide GaAs Infrared(Invisible) 2 Gallium Phosphide GaP Red or Green 3 Gallium Arsenide Phosphide GaAsP Red or Yellow By: Navneet Pal Email:[email protected] Page 1 www.uptunotes.com Output Characteristics- The amount of power output translated into light is directly propotional to the forward current If , more forward current If , the greater the output light.
    [Show full text]
  • Basic Electronics Engineering. Chapter-1
    Basic Electronics Engineering. Chapter-1 1. Diode Circuit 1.1 Define Electronics & its application. The world's reliance on electronics is so great that commentators claim people live in an "electronic age." People are surrounded by electronics—televisions, radios, computers, mobiles, Laptop and DVD players, along with products with major electric components, such as microwave ovens, refrigerators, and other kitchen appliances, automatic vehicles, Robotics, as well as hearing aids and medical instruments and numerous applications in industry. Definition: The branch of engineering which deals with current conduction through a Vacuum or Gas or Semiconductor is known as Electronics. An electronic device is that in which current flows through a vacuum or gas or semiconductor. This control of electrons is accomplished by devices that resist, carry, select, steer, switch, store, manipulate, and exploit the electron. Or Electronics deals with electrical circuits that involve active electrical components such as vacuum tubes, transistors, diodes and integrated circuits, and associated passive interconnection technologies. Commonly, electronic devices contain circuitry consisting primarily or exclusively of active semiconductors supplemented with passive elements; such a circuit is described as an electronic circuit. Pre Knowledge (Some of the basic definitions): Passive Components: Capable of operating without an external power source. Typical passive components are resistors, capacitors, inductors. Active components: Requiring a source of power
    [Show full text]
  • Pioneering Study on Tunnel Diodes Study on Static Induction Transistors (SIT)
    C-8 Pioneering Study on Tunnel Diodes Leo Esaki (1925-) started the study of PN junction diodes as a chief scientist in the diode research laboratory at Tokyo Communication Industry Co., Ltd., (currently Sony). After trial and error for about one year, he discovered the fact that when making the width of the PN junction of germanium as thin as 10 nm, negative resistance—the higher the voltage, the lower the current, contrary to conventional knowledge—occurred because its current-voltage properties were dominated by the impact of tunnel effects. This discovery was the first example of verifying the tunnel effect of quantum mechanics in the diode and the birth of new electronic devices—tunnel diode (or Esaki diode)—in electronic engineering as well. Then in 1973, L. Esaki was awarded the Nobel Prize for Physics together with Ivar Giaever who made the achievement of tunnel effects in ultrahigh conductors. Initially, the tunnel diode was made from germanium, however, now it is also made from gallium arsenide and silicon. It has also been used for various electronic circuits, e.g., oscillation circuits, amplifying circuits, frequency converters, and detector circuits. C-9 Study on Static Induction Transistors (SIT) In 1950, Junichi Nishizawa (1926-) developed the static induction transistor (hereinafter, SIT) applying the perfect crystal growth technique and high purity crystal growth technique originated by himself. He introduced a transistor having a rising property into the field of conventional transistors, where the properties of both the bipolar transistor and the field-effect transistor (FET) were limited to only the property of current saturation to increase in voltage.
    [Show full text]
  • Tunnel-Diode Microwave Amplifiers
    Tunnel diodes provide a means of low-noise microwave amplification, with the amplifiers using the negative resistance of the tunnel diode to a.chieve amplification by reflection. Th e tunnel diode and its assumed equivalent circuit are discussed. The concept of negative-resistance reflection amplifiers is discussed from the standpoints of stability, gain, and noise performance. Two amplifi,er configurations are shown. of which the circulator-coupled type 1'S carried further into a design fo/' a C-band amplifier. The result 1'S an amph'fier at 6000 mc/s with a 5.S-db noise figure over 380 mc/s. An X-band amplifier is also reported. C. T. Munsterman Tunnel-Diode Microwave Am.plifiers ecent advances in tunnel-diode fabrication where the gain of the ith stage is denoted by G i techniques have made the tunnel diode a and its noise figure by F i. This equation shows that Rpractical, low-noise, microwave amplifier. Small stages without gain (G < 1) contribute greatly to size, low power requirements, and reliability make the overall system noise figure, especially if they these devices attractive for missile application, es­ are not preceded by some source of gain. If a pecially since receiver sensitivity is significantly low-noise-amplification device can be located near improved, with resulting increased homing time. the source of the signal, the contribution from the Work undertaken at APL over the past year has successive stages can be minimized by making G] resulted in the unique design techniques and hard­ sufficiently large, and the overall noise figure is ware discussed in this paper.-Y.· then that of the amplifier Fl.
    [Show full text]
  • A Spice Behavioral Model of Tunnel Diode: Simulation and Application
    International Journal of Control and Automation Vol. 9, No. 4 (2016), pp. 39-50 http://dx.doi.org/10.14257/ijca.2016.9.4.05 A Spice Behavioral Model of Tunnel Diode: Simulation and Application Messaadi Lotfi1 and Dibi Zohir1 1Department of Electronics, Advanced Electronic Laboratory (LEA), Batna University, Avenue Mohamed El-hadi Boukhlouf, 05000, Batna, Algeria [email protected],[email protected] Abstract This paper provides an Analog Behavioral Model (ABM) in Pspice of a tunnel diode The Pspice parameters are implemented as separate parameterized blocks constructed from Spice (ABM) controlled sources and extracted through experiment. A tunnel diode based oscillator is also proposed and simulated using circuit analysis software. The behavior of the tunnel diode is simulated and compared to the measured data to show the accuracy of the Pspice model. Close agreement was obtained between the simulation and experimental results. Keywords: Tunnel diode, tunnel diode oscillator (TDO), Spice simulation, resonant tunneling diode (RTD), Analog Behavioral Modeling (ABM) 1. Introduction Leo Esaki invented a tunnel diode, which is also known as “Esaki diode” on behalf of its inventor. It’s a high conductivity two terminal P-N junction diode doped heavily about 1000 times greater than a conventional junction diode. Because of heavy doping depletion layer width is reduced to an extremely small value of 1/10000 m. When a DC voltage is applied in the forward bias operation, a TD I-V curve features a region of negative differential resistance. At low voltages (< 0.5 V in Figure 1) electrons from the conduction band of the n-side will tunnel to the hole states of the valence band of the p- side through the narrow p - n junction, creating a forward bias tunnel current.
    [Show full text]
  • This Is an Open Access Document Downloaded from ORCA, Cardiff University's Institutional Repository
    This is an Open Access document downloaded from ORCA, Cardiff University's institutional repository: http://orca.cf.ac.uk/112084/ This is the author’s version of a work that was submitted to / accepted for publication. Citation for final published version: Han, Yu, Li, Qiang and Lau, Kei May 2017. Tristate memory cells using double-peaked fin-array III-V tunnel diodes monolithically grown on (001) silicon substrates. IEEE Transactions on Electron Devices 64 (10) , pp. 4078-4083. 10.1109/TED.2017.2738675 file Publishers page: http://dx.doi.org/10.1109/TED.2017.2738675 <http://dx.doi.org/10.1109/TED.2017.2738675> Please note: Changes made as a result of publishing processes such as copy-editing, formatting and page numbers may not be reflected in this version. For the definitive version of this publication, please refer to the published source. You are advised to consult the publisher’s version if you wish to cite this paper. This version is being made available in accordance with publisher policies. See http://orca.cf.ac.uk/policies.html for usage policies. Copyright and moral rights for publications made available in ORCA are retained by the copyright holders. > REPLACE THIS LINE WITH YOUR PAPER IDENTIFICATION NUMBER (DOUBLE-CLICK HERE TO EDIT) < 1 Tri-state memory cells using double-peaked fin- array III-V tunnel diodes monolithically grown on (001) silicon substrates Yu Han, Qiang Li, member, IEEE, and Kei May Lau, Fellow, IEEE quality III-V buffers within a few tens of nanometers has been Abstract— We demonstrate functional tri-state memory cells demonstrated [15]-[22].
    [Show full text]
  • Basics and Types of Diodes
    Basics and Types of Diodes Introduction to Diode: A diode is an electric device that permits the flow of current only in one direction and restricts the flow in the opposite direction. The most ordinary sort of diode in current circuit design is the semi-conductor diode, even though additional diode technologies are present. The word “diode” is traditionally aloof for tiny signal appliances, I ≤ 1 A. When a diode is positioned in a simple battery lamp circuit, then the diode will either permit or stop flow of current through the lamp, all this depend on the polarization of the volts applied. There are various sorts of diode but their fundamental role is identical. The most ordinary kind of diode is silicon diode; it is placed in a glass cylinder. The symbol of diode is represented as follows: Diode Operation: A diode starts its operations when a voltage signal applies across its terminals. A DC volt is applied so that diode starts its operation in a circuit and this is known as Biasing. Diode is similar to a switch which is one way, hence it can be either in conduction more or non-conduction mode. “ON” mode of the diode, is attained by forward biasing, which simply means that higher or positive potential is applied on the anode and on the cathode, negative or lower potential is applied of a diode. Whereas the “OFF” mode of the diode is attained with the aid of reverse biasing which simply means that higher or positive potential is applied on the cathode and on the anode, negative or lower potential is applied of a diode.
    [Show full text]
  • UNIT-I: Special Diodes- LED, Varactor Diode, Photo Diode, Schottky Diode, Tunnel Diode; Their Characteristics and Applications. Transistors As a Switch
    UNIT-I: Special Diodes- LED, Varactor diode, Photo diode, Schottky diode, Tunnel diode; their characteristics and applications. Transistors as a switch. Applications of PN Junctions: BJT (Bipolar Junction Transistor) P HBT (Heterojunction Bipolar Transistor) Rectifiers N Zener Diode Junction Diode Varactor Diode J U Switching Diode Tunnel Diode N C PN Junction Diode Solar Cell T Photo-Diode I Photo Detector O Light Emitting diode & Laser Diode N JFET FET (Field Effect Transistor) MOSFET - memory MESFET - HEMT Common Applications of Diodes: Rectifier Zener LED Schematic symbol Bias for normal Switched back and Reverse Forward operation forth between forward and reverse. Si: V = 0.7 V V = 0.7 V (not 1.2VV 4.3V Normal VF F F F normally operated) Ge: VF = 0.3 V Equal to applied Equal to V . Equal to applied Normal VR Z voltage. voltage. Primary factors to I0 and VRRM ratings. PD(max) and VZ ratings. VF(min), IF(max), and VBR consider for device substitution Types of Diodes and Their Uses PN Junction Diodes: Are used to allow current to flow in one direction while blocking current flow in the opposite direction. The PN junction diode is the typical diode that has been used in the previous circuits. A K P n Schematic Symbol for a Representative PN Junction Diode Structure for a PN Junction Diode Zener Diodes: Are specifically designed to operate under reverse breakdown conditions. These diodes have a very accurate and specific reverse breakdown voltage. A K Schematic Symbol for a Zener Diode Types of Diodes and Their Uses Schottky Diodes: These diodes are designed to have a very fast switching time which makes them a great diode for digital circuit A K applications.
    [Show full text]
  • 90 Nm 32 32 Bit Tunneling SRAM Memory Array with 0.5 Ns Write
    2432 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL. 58, NO. 10, OCTOBER 2011 90 nm 32 32 bit Tunneling SRAM Memory Array With 0.5 ns Write Access Time, 1 ns Read Access Time and 0.5 V Operation Anisha Ramesh, Student Member, IEEE, Si-Young Park, and Paul R. Berger, Fellow, IEEE Abstract—Functional robustness is one of the primary chal- a unique negative differential resistance (NDR) characteristic. lenges for embedded memories as voltage levels are scaled below 1 NDR circuits generally operate below 0.5 V which is a key goal V. A low-power high-speed tunneling SRAM (TSRAM) memory to reduce power consumption. Power consumption is generally array including sense amplifiers and pre-charge circuit blocks op- erating at 0.5 V is designed and simulated using available MOSIS related to the square of the voltage. The folded I-V characteris- CMOS 90 nm product design kit coupled with VerilogA models tics of an NDR device pair creates a simple latch that when used developed from this group’s Si/SiGe resonant interband tunnel in conjunction with transistors enables novel circuit configura- diode experimental data. 1 T and 3 T- 2 tunnel diode memory cell tions for logic, mixed signal and compact low-power embedded configurations were evaluated. The memory array assigns 0.5 V memory [1]–[6]. as a logic “1” and 0 V as a logic “0”. Dual supply voltages of 1 and 0.5 V and dual threshold voltage design are used to ensure high Ultra-low power operation is the dominant issue for em- sensing speed concurrently with low operating and standby power.
    [Show full text]
  • Investigations of Tunneling for Field Effect Transistors
    Investigations of Tunneling for Field Effect Transistors by Peter Matheu A dissertation submitted in partial satisfaction of the requirements for the degree of Doctor of Philosophy in Applied Science & Technology in the Graduate Division of the University of California, Berkeley Committee in charge: Professor Tsu-Jae King Liu, Chair Professor Sayeef Salahuddin, Member AS&T Professor Chenming Hu, Outside Member Spring 2012 Investigations of Tunneling for Field Effect Transistors Copyright 2012 by Peter Matheu 1 Abstract Investigations of Tunneling for Field Effect Transistors by Peter Matheu Doctor of Philosophy in Applied Science & Technology University of California, Berkeley Professor Tsu-Jae King Liu, Chair Over 40 years of scaling dimensions for new and continuing product cycles has introduced new challenges for transistor design. As the end of the technology roadmap for semiconduc- tors approaches, new device structures are being investigated as possible replacements for traditional metal-oxide-semiconductor field effect transistors (MOSFETs). Band-to-band tunneling (BTBT) in semiconductors, often viewed as an adverse effect of short channel lengths in MOSFETs, has been discussed as a promising current injection mechanism to allow for reduced operating voltage for beyond MOSFET technology. This dissertation discusses the proposal of BTBT for tunneling field effect transistors (TFETs). Some early work is briefly reviewed to better appreciate the academic re- search landscape regarding BTBT. Then, experimental observations of a steeply switching enhanced-Schottky-barrier MOSFET are analysed in detail and the steep characteristic is plausibly explained by metal impurity trap states near the source tunneling junction. Next, follow-up experiments to investigate the role of traps in BTBT are reviewed with a likely explanation that traps in close proximity to the tunneling junction can lower the activation energy for BTBT.
    [Show full text]