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Single Phase PWM Controller for CPU Core Power Supply

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Single Phase PWM Controller for CPU Core Power Supply RT8153C/D Single Phase PWM Controller for CPU Core Power Supply General Description Features The RT8153C/D is a single phase PWM controller with z Single Phase PWM Controller with Integrated integrated MOSFET drivers. Moreover, it is compliant with MOSFET Driver TM Intel IMVP6.5 Voltage Regulator Specification to fulfill its z G-NAVP Control Topology mobile CPU core and Render core voltage regulator z 7-bit DAC with 0.8% DAC Accuracy requirements. The RT8153C/D adopts G-NAVP (Green z 1.5% or 11.5mV System Accuracy Native AVP), which is a Richtek proprietary topology z Fixed VBOOT 1.1V (Only for RT8153C CPU Core Only) derived from finite DC gain compensator constant on-time z Fixed VBOOT 1.2V (Only for RT8153D CPU Core Only) mode, making it an easy setting PWM controller which z Current Monitor Output meets all Intel AVP (Active Voltage Positioning) mobile z Built-in Offset Programming for Platform CPU/Render requirements. The output voltage of the z Differential Remote Voltage Sensing RT8153C/D is set by a 7-bit VID code. The built in high z Diode Emulation Mode at Light Load Condition accuracy DAC converts the VID code into a voltage ranging z Programmable Output Transition Slew Rate Control from 0V to 1.5V with 12.5mV per step. The system z System Thermal Compensated AVP accuracy of the controller can reach 1.5%. z Fast Transient Response z Load Line Enable/Disable The part supports VID on the fly and mode change on the z Power Good Indicator fly functions that are fully compliant with IMVP6.5 z Clock Enable Output (For CPU Core Only) specification. It operates in single phase and diode z Thermal Throttling emulation modes. It can reach up to 90% efficiency in z Switching Frequency Up to 1MHz different modes according to different loading conditions. z OVP, UVP, OCP, OTP, UVLO, NVP The RT8153C/D includes power good and thermal throttling z RoHS Compliant and Halogen Free indicator and an additional clock enabling for CPU core specification. The soft-start and output transition slew rate Ordering Information is programmable by an external capacitor. It also features RT8153C/D complete fault protection functions including over voltage, Package Type under voltage, negative voltage, over current and thermal QW : WQFN-32L 5x5 (W-Type) shutdown. The RT8153C/D is available in WQFN-32L 5x5 QW : WQFN-32L 4x4 (W-Type) and WQFN-32L 4x4 small foot print packages. Lead Plating System G : Green (Halogen Free and Pb Free) Applications Z : ECO (Ecological Element with Halogen Free and Pb free) z IMVP 6.5 V /Render CORE Package Size z AVP Step-Down Converter L : 5x5 z Notebook / Desktop Computer / Servers S : 4x4 VBOOT C : 1.1V D : 1.2V Note : Richtek products are : ` RoHS compliant and compatible with the current require- ments of IPC/JEDEC J-STD-020. ` Suitable for use in SnPb or Pb-free soldering processes. DS8153C/D-05 April 2011 www.richtek.com 1 RT8153C/D Marking Information RT8153CLGQW RT8153DLGQW RT8153CLGQW : Product Number RT8153DLGQW : Product Number RT8153CL YMDNN : Date Code RT8153DL YMDNN : Date Code GQW GQW YMDNN YMDNN RT8153CLZQW RT8153DLZQW RT8153CLZQW : Product Number RT8153DLZQW : Product Number RT8153CL YMDNN : Date Code RT8153DL YMDNN : Date Code ZQW ZQW YMDNN YMDNN RT8153CSGQW RT8153DSGQW EH= : Product Code EJ= : Product Code EH=YM YMDNN : Date Code EJ=YM YMDNN : Date Code DNN DNN RT8153CSZQW RT8153DSZQW EH : Product Code EJ : Product Code EH YM YMDNN : Date Code EJ YM YMDNN : Date Code DNN DNN Pin Configurations (TOP VIEW) VRTT VID0 VID1 VID2 VID3 VID4 VID5 VID6 32 31 30 29 28 27 26 25 NTC1 24 BOOT OCSET 2 23 UGATE DPRSLPVR 3 22 PHASE VRON 4 21 PGND GND PGOOD 5 20 LGATE CLKEN 6 19 PVDD VCC 7 33 18 OFS SOFT 8 17 TON 910111213 1415 16 FB CM ISEN VSEN RGND COMP CMSET ISEN_N WQFN-32L 5x5 / WQFN-32L 4x4 www.richtek.com DS8153C/D-05 April 2011 2 RT8153C/D Typical Application Circuit VIN 5V to 25V RT8153C/D R1 7 17 R2 R3 5V VCC TON C5 C1 C3 19 PVDD R4 BOOT 24 C4 31 Q1 C2 VID0 VID0 UGATE 23 30 R5 L1 VID1 VID1 22 PHASE VOUT VID2 29 VID2 Q2 LGATE 20 R8 R6* D1* R7 C7 28 COUT VID3 VID3 21 C6* 27 PGND VID4 VID4 16 R14 R20 ISEN VID 26 5 VID5 15 25 ISEN_N NTC1 VID6 VID6 3 11 R13 DPRSLPVR DPRSLPVR CMSET 4 R21 R22 VRON VRON VSEN 12 C9 5 PWRGD PGOOD FB 13 6 CLKEN CLKEN C12 C13 32 VRTT VRTT 14 R18 R19 R9 R10 R11 COMP CPU VCC_SENSE VCCP 9 3.3V RGND CPU VSS_SENSE C10 NTC2 R15 1 8 VCC NTC SOFT R12 C11 R23 R24 CM 10 CM OFS 18 R16 2 VCC OCSET R17 GND * = Optional 33 (Exposed Pad) Figure 1. IMVP 6.5 CPU Core Application Circuit DS8153C/D-05 April 2011 www.richtek.com 3 RT8153C/D VIN 5V to 25V RT8153C/D R1 7 17 R2 R3 5V VCC TON C5 C1 C3 19 PVDD R4 BOOT 24 C4 31 Q1 C2 VID0 VID0 UGATE 23 30 R5 L1 VID1 VID1 22 PHASE VOUT VID2 29 VID2 Q2 LGATE 20 R8 R6* D1* R7 C7 28 COUT VID3 VID3 21 C6* 27 PGND VID4 VID4 16 R14 R20 ISEN VID5 26 VID5 15 25 ISEN_N NTC1 VID6 VID6 3 11 R13 DPRSLPVR DPRSLPVR CMSET 4 R21 R22 VRON VRON VSEN 12 C9 5 PWRGD PGOOD FB 13 6 CLKEN CLKEN C12 C13 32 VRTT VRTT 14 R18 R19 R9 R10 R11 COMP CPU VCC_SENSE VCCP 9 3.3V RGND CPU VSS_SENSE C10 NTC2 R15 1 8 VCC NTC SOFT R12 C11 R23 R24 CM 10 CM OFS 18 to 1.6V R16 2 1V VCC OCSET R17 GND * = Optional 33 (Exposed Pad) Figure 2. IMVP 6.5 CPU Core with Offset Application Circuit www.richtek.com DS8153C/D-05 April 2011 4 RT8153C/D VIN 5V to 25V RT8153C/D R1 7 17 R2 R3 5V VCC TON C5 C1 C3 19 PVDD R4 BOOT 24 C4 31 Q1 C2 VID0 VID0 UGATE 23 30 R5 L1 VID1 VID1 22 PHASE VOUT VID2 29 VID2 Q2 LGATE 20 R8 R6* D1* R7 C7 28 COUT VID3 VID3 21 C6* 27 PGND VID4 VID4 16 R14 R20 ISEN VID 26 5 VID5 15 25 ISEN_N NTC1 VID6 VID6 3 11 R13 DPRSLPVR DPRSLPVR CMSET 4 R21 R22 VRON VRON VSEN 12 C9 5 PWRGD PGOOD FB 13 32 C12 C13 VRTT VRTT R9 R11 14 R18 R19 COMP GPU VCC_SENSE VCCP 6 3.3V CLKEN 9 RGND GPU VSS_SENSE C10 NTC2 R15 1 8 VCC NTC SOFT R12 C11 R23 R24 CM 10 CM OFS 18 R16 2 VCC OCSET R17 GND * = Optional 33 (Exposed Pad) Figure 3. IMVP 6.5 Render Application Circuit DS8153C/D-05 April 2011 www.richtek.com 5 RT8153C/D VIN 5V to 25V RT8153C/D R1 7 17 R2 R3 5V VCC TON C5 C1 C3 19 PVDD R4 BOOT 24 C4 31 Q1 C2 VID0 VID0 UGATE 23 30 R5 L1 VID1 VID1 22 PHASE VOUT VID2 29 VID2 Q2 LGATE 20 R8 R6* D1* R7 C7 28 COUT VID3 VID3 21 C6* 27 PGND VID4 VID4 16 R14 R20 ISEN VID 26 5 VID5 15 25 ISEN_N NTC1 VID6 VID6 3 11 R13 DPRSLPVR DPRSLPVR CMSET 4 R21 R22 VRON VRON VSEN 12 C9 5 PWRGD PGOOD FB 13 32 C12 C13 VRTT VRTT R9 R11 14 R18 R19 COMP GPU VCC_SENSE VCCP 6 3.3V CLKEN 9 RGND GPU VSS_SENSE C10 NTC2 R15 1 8 VCC NTC SOFT R12 C11 R23 R24 CM 10 CM OFS 18 1V to 1.6V R16 2 VCC OCSET R17 GND * = Optional 33 (Exposed Pad) Figure 4. IMVP 6.5 Render with Offset Application Circuit www.richtek.com DS8153C/D-05 April 2011 6 RT8153C/D Functional Pin Description Pin No. Pin Name Pin Function Thermal Detection Input for VRTT Circuit. Connect this pin with a resistor divider 1 NTC from VCC using NTC on the top to set the thermal management threshold level. Furthermore, this pin provides load line enable/disable function. Over Current Protection Setting. Connect a resistor voltage divider from VCC to 2 OCSET ground, the joint of the resistive voltage divider is connected to the OCSET pin, with a voltage VOCSET, to set the over current threshold ILIM. 3 DPRSLPVR Deeper Sleep Mode Signal. 4 VRON Voltage Regulator Enabler. 5 PGOOD Power Good Indicator. Inverted Clock Enable. Pull high by a resistor for CPU core application. This 6 CLKEN open-drain pin is an output indicating the start of the PLL locking of the clock chip. Connect to GND for Render application. 7 VCC Chip Power. Soft-Start. This pin provides soft-start function and slew rate controller. The capacitance of the slew rate control capacitor is restricted to be larger than 10nF. 8 SOFT The feedback voltage of the converter follows the ramping voltage on the SOFT pin during soft-start and other voltage transitions according to different mode of operation and VID change. Return Ground. This pin is the negative node of the differential remote voltage 9 RGND sensing. Current Monitor Output. This pin outputs a voltage proportional to the output 10 CM current. Current Monitor Output Gain Externally Setting. Connect this pin with one resistor 11 CMS ET to VSEN the while CM pin is connected to ground with another resistor. In such a way, the current monitor output gain can be set by the ratio of these two resistors.
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