Low-Current Design of Gaas Active Inductor for Active Filters Applications

electronics

Article Low-Current Design of GaAs Active Inductor for Active Filters Applications

Leonardo Pantoli 1 , Vincenzo Stornelli 1,* , Giorgio Leuzzi 1, Hongjun Li 2 and Zhifu Hu 2 1 Department of Industrial and Information Engineering and Economics, University of L’Aquila, 67100 L’Aquila AQ, Italy; [email protected] (L.P.); [email protected] (G.L.) 2 Hebei Semiconductor Research Institute, Shijiazhuang 050000, China; [email protected] (H.L.) * Correspondence: [email protected]

Received: 30 May 2020; Accepted: 23 July 2020; Published: 31 July 2020

Abstract: Active inductors are suitable for MMIC integration, especially for filters applications, and the definition of strategies for an efficient design of these circuits is becoming mandatory. In this work we present design considerations for the reduction of DC current in the case of an active filter design based on the use of active inductors and for high-power handling. As an example of applications, the approach is demonstrated on a two-cell, integrated active filter realized with p-HEMT technology. The filter design is based on high-Q active inductors, whose equivalent inductance and resistance can be tuned by means of varactors. The prototype was realized and tested. It operates between 1800 and 2100 MHz with a 3 dB bandwidth of 30 MHz and a rejection ratio of 30 dB at 30 MHz from the center frequency. This solution allows to obtain a P1 dB compression point of about 8 dBm and a dynamic − range of 75 dB considering a bias current of 15 mA per stage.

Keywords: active ﬁlters; active inductor; MMIC; tunable ﬁlters

1. Introduction On-chip passive filters are affected by the limited Q-factor of inductors and capacitors, due to ohmic and substrate losses, even on low-loss substrates as Gallium Arsenide. Tunable passive filters are also affected by the limited Q of varactors, normally used for tunability. Moreover, the bandpass of the filter is affected by the combination of constant passive inductance and variable capacitance in the tuning range. Active filters can be realized with several approaches [1–3]; many of them are usually based on active inductors (AIs), that can achieve very low or even negative equivalent resistance, and therefore a high filter Q. The AI can be tuned both in terms of equivalent inductance and of equivalent resistance, yielding constant bandpass with limited losses or positive gain. In general, active filters usually have limited power handling capabilities also due to the nonlinearities of the active elements, and they are prone to instability due to the negative resistance required for the compensation of the losses of the passive elements in the circuit. In order to increase the dynamic range, usually a high bias current is required for the active devices. This can lead to higher power consumption that is often unacceptable for integrated circuits and also not allowed at system level. A possible means to reduce the bias current is provided by Class-AB bias, which has already been demonstrated [4]. However, this approach is not always possible or, at least, it experiences some drawbacks depending on the characteristics of the technology process (e.g., the availability of complementary transistors, highly linear active devices). In this paper, we present a design approach of integrated active inductor and its applications in filters realized in GaAs technology that allows the minimization of bias current, still maintaining Class-A operations that usually ensure high-power handling capability. Concerning the filter AI base design, the proposed approach is based on AIs coupled with shunt capacitors in order to realize an

Electronics 2020, 9, 1232; doi:10.3390/electronics9081232 www.mdpi.com/journal/electronics Electronics 2020, 9, x FOR PEER REVIEW 2 of 14

Class-A operations that usually ensure high-power handling capability. Concerning the filter AI base design, the proposed approach is based on AIs coupled with shunt capacitors in order to realize an equivalent high-order filter with good performances in terms of shape factor and dynamic range [5– 8]. The topology of the AI is such that only a fraction of the bias current is effectively drawn by the active device and it is useful to provide the required negative resistance. In addition, each cell makes use of a single transistor, reducing power consumption and minimizing possible instability concerns. An example of application is proposed in MMIC technology, potentially tunable in the frequency range between 1.8 to 2.1 GHz, with a tuning bandwidth of about 15%. The −3 dB bandwidth is almost constant and equal to 30 MHz, while the out-of-band rejection is significant thanks to the high shape factor equal to 2.5 for a 30 dB/3 dB bandwidth ratio. The chip has been designed with a standard process provided by HSRI Foundry that implements 0.13 μm GaAs pHEMT devices. Both simulations and on-chip measurement results are presented with a good agreement between them. Electronics 2020, 9, 1232 2 of 14 Currently; however, no varactor diodes are available in this technology. Therefore, a fixed- equivalent high-order filter with good performances in terms of shape factor and dynamic range [5–8]. capacitor versionThe was topology implemented, of the AI is such that with only adifferent fraction of the va biaslues current of is the effectively capacitors. drawn by the In active fact, our aim is to provide a feasibilitydevice andproof it is useful demonstrating to provide the required the negative tunability resistance. capability In addition, each of cell the makes filter use of aby replacing the single transistor, reducing power consumption and minimizing possible instability concerns. unavailable varactorsAn examplewith fixed of application capacitors. is proposed A in vers MMICion technology, with potentiallythe varactors tunable in thewill frequency be implemented and range between 1.8 to 2.1 GHz, with a tuning bandwidth of about 15%. The 3 dB bandwidth is almost fabricated as soon as the technology is available. However, good −performances with varactors have constant and equal to 30 MHz, while the out-of-band rejection is significant thanks to the high shape already been demonstratedfactor equal to 2.5in fora hybrid a 30 dB/3 dBimplementation bandwidth ratio. The [5], chip that has been indicate designed the with possibility a standard of a successful implementation withprocess varactors provided by HSRI also Foundry in monolithic that implements technology. 0.13 µm GaAs pHEMT devices. Both simulations and on-chip measurement results are presented with a good agreement between them. Noise figure hasCurrently; not been however, considered no varactor diodes in this are available design in this since technology. noise Therefore, performance a fixed-capacitor requirements were not so strict in theversion proposed was implemented, application with di (asfferent later values discussed); of the capacitors. therefore, In fact, our it aim is quite is to provide high. a However, noise feasibility proof demonstrating the tunability capability of the filter by replacing the unavailable reduction techniquesvaractors have with fixedbeen capacitors. developed A version and with patent the varactorsed [7] will that be implemented yield a relatively and fabricated low noise figure. They will be dealtas with soon as in the a technology future publication. is available. However, good performances with varactors have already been demonstrated in a hybrid implementation [5], that indicate the possibility of a successful In the following,implementation the withtopology varactors alsoand in monolithicprinciple technology. of operation of the active inductor is briefly summarized in SectionNoise 2. figure Section has not been2 illustrates considered in also this design the sinceproposed noise performance low-current requirements design were approach on an not so strict in the proposed application (as later discussed); therefore, it is quite high. However, noise active filter, whilereduction in Section techniques 3 havethe beenMMIC developed design and patented and measurement [7] that yield a relatively results low noise are figure. shown. Finally, the conclusions are drawnThey will (Section be dealt with 4). in a future publication. In the following, the topology and principle of operation of the active inductor is briefly summarized in Section2. Section2 illustrates also the proposed low-current design approach on 2. The Active Inductoran active filter,Architecture while in Section 3 the MMIC design and measurement results are shown. Finally, the conclusions are drawn (Section4). Active filters can be realized by one or more cells, each including an AI-based shunt resonator 2. The Active Inductor Architecture (Figure 1). Both the shunt capacitor and the AI are tuned in order to maintain both insertion loss and Active filters can be realized by one or more cells, each including an AI-based shunt resonator bandpass almost(Figure constant1). Both across the shunt the capacitor tuning and the range. AI are tuned Thus in order, it is to straightforward maintain both insertion lossto notice and that the AI is the centerpiece ofbandpass the filter, almost as constant it is acrossalso theable tuning to range.control Thus, the it is losses straightforward of the to cell notice and; that the therefore, AI is the overall the centerpiece of the filter, as it is also able to control the losses of the cell and; therefore, the overall quality factor of thequality filter. factor of the filter.

Figure 1. TopologyFigure 1. Topology of a ofsingle a single cell for for bandpass bandpass active ﬁlters. active filters. The traditional structure of the AI is shown in Figure2a. The input voltage is sampled by a non-inverting The traditionaltransconductance structure amplifier, of the that AI drives is shown a current into in theFigure capacitor. 2a. The The voltage input generated voltage in the capacitor is sampled by a non- is sampled by the inverting transconductance amplifier, that draws an inductive current from the input inverting transconductance amplifier, that drives a current into the capacitor. The voltage generated in the capacitor is sampled by the inverting transconductance amplifier, that draws an inductive current from the input of the active inductance. The relations between voltages and currents in the active inductor can be better understood in the complex phasor plane (Figure 3). Phases are referred to that of the input voltage Vin. The capacitor voltage VC has a 90 degrees delay (capacitive delay) with

Electronics 2020, 9, x FOR PEER REVIEW 3 of 14 Electronics 2020, 9, 1232 3 of 14 respect to the input voltage and the inverting transconductance introduces a further 180° phase shift, so generating anof the inductive active inductance. current The relationsIind with between respect voltages to and the currents input in thevoltage active inductor Vin. An can overall be better excess phase understood in the complex phasor plane (Figure3). Phases are referred to that of the input voltage V . of the output current with respect to the purely inductive 90° phase shift gives an equivalentin negative The capacitor voltage VC has a 90 degrees delay (capacitive delay) with respect to the input voltage and the resistance in additioninverting transconductance to the equivalent introduces inductance, a further 180◦ phase while shift, soan generating insufficient an inductive phase current shiftIind with gives a positive equivalent resistance.respect to the The input amplitude voltage Vin. An of overall the excess indu phasective of the current output current with with respect respect to theto purelythe input voltage inductive 90◦ phase shift gives an equivalent negative resistance in addition to the equivalent inductance, determines thewhile value an insufficient of the equivalent phase shift gives inductance. a positive equivalent This resistance.amplitude The amplitudecan be changed, of the inductive for instance, by tuning the valuecurrent of the with respecttransconductance(s). to the input voltage determines the value of the equivalent inductance. This amplitude can be changed, for instance, by tuning the value of the transconductance(s).

gm1 Vin Zin Vc Iin C -gm2

(a)

Phase Vc shift Vin Zin

Iin

-gm

(b)

Figure 2. Active inductor architecture: (a) Traditional topology, (b) improved topology. Figure 2. Active inductor architecture: (a) Traditional topology, (b) improved topology.

An improved topology of the AI is shown in Figure 2b [5]. The input voltage is sampled at the input of a phase-shifting passive network, then transferred to the input of the inverting transconductance amplifier, that in turn draws the current from the input port. The relations between voltages and currents are approximately the same as in Figure 3; however, some phase shift is also introduced by the inverting transconductance amplifier, given the high operation frequencies. In this improved topology, the amplifier is a fixed-bias, class-A linear amplifier, stable and with fixed gain. The tuning of the phase and amplitude is; therefore, performed by the phase-shifting passive network that includes varactors. This approach allows one to obtain stable and easily tuned AI, and consequently filters with a relatively high gain compression point.

Electronics 2020, 9, 1232 4 of 14 Electronics 2020, 9, x FOR PEER REVIEW 4 of 14

FigureFigure 3.3. PhasorsPhasors ofof voltagesvoltages andand currentscurrents inin thethe AIAI ofof FigureFigure2 2in in the the complex complex phasor phasor plane. plane. Vin Vin is is

thethe inputinput voltage,voltage, VVCC thethe currentcurrent acrossacross thethe capacitorcapacitor (Figure(Figure2 2a)a) or or at at the the output output of of the the phase phase shifting shifting networknetwork (Figure2 2b),b), and I Iindind thethe current current drawn drawn from from the invertin the invertingg transconductance transconductance amplifier.3. ampliﬁer.3. Low- Low-currentcurrent design design of GaAs of GaAs active active filters ﬁlters based based on the on proposed the proposed AI. AI.

AnFor improved relatively topology high-power of the handli AI isng, shown the incurrent Figure in2b an [ 5 ].AI, The conceived input voltage with isa class-A sampled polarization, at the input ofmay a phase-shifting become relatively passive high. network, With cl thenass-A transferred operation, to this the requires input of a the high inverting bias current transconductance in the active amplifier,device, where that inthe turn whole draws output the current current flows. from theA po inputssible port. means The of relations reducing between the DC voltagescurrent is and the currentsuse of a are class-B approximately or class-AB the sameamplifier as in Figurein the3 ;AI however, [4]. This some is phasecertainly shift a is feasible also introduced approach by thethat invertingsignificantly transconductance reduces the DC amplifier, power requirements given the high of operation the filter, frequencies.even if it may In cause this improved some concerns topology, on theintermodulation. amplifier is a fixed-bias,However, this class-A approach linear is amplifier, not always stable possible, and withdepending fixed gain. on the The characteristics tuning of the of phasethe active and amplitudedevice. For is; instance, therefore, a very performed sharp bypinc theh-off phase-shifting of the transistor passive makes network the class-B that includes or AB varactors.impractical; This therefore, approach a allowsdifferent one approach to obtain is stable here andproposed easily tunedand successfully AI, and consequently applied to filtersthe design with aof relatively an active high filter. gain compression point. ForIn order relatively to have high-power a high-Q handling, filter, the thecurrent current at the in an input AI, conceivedof the active with inductor a class-A must polarization, be purely mayinductive, become or relativelynearly so, high.that is, With with class-A a 90 degree operation, phase this relation requires with a respect high bias to currentthe voltage in the across active it. device,The current where through the whole a passive output inductor current flows. has less A possiblethan 90 degrees means of with reducing respect the to DC the current applied is voltage, the use ofdue a class-Bto losses. or class-ABThis current amplifier can be in seen the AIas [the4]. Thisvectorial is certainly sum of aa feasible purely approachinductive thatcurrent, significantly and of a reducespurely resistive the DC power current requirements in phase with of the the filter, applied even ifvoltage, it may causemuch some smaller concerns in amplitude, on intermodulation. due to the However,losses in the this inductor. approach The is notcompensation always possible, of thedepending losses can be on obtained the characteristics by summing of the another active current, device. Foropposite instance, in phase a very with sharp respect pinch-o to fftheof resistive the transistor current makes and; thetherefore, class-B equivalent or AB impractical; to the current therefore, of a anegative different resistance. approach isThis here negative proposed resistance and successfully current will applied be therefore to the design much of smaller an active than filter. the total currentIn order in the to inductor. have a high-Q filter, the current at the input of the active inductor must be purely inductive,A possible or nearly topology so, that that is, implements with a 90 degree this approach phase relation is shown with in respectFigure to4. The the voltagecurrent acrossfrom the it. Theinput current of the throughAI flows a through passive inductora passive hasinductor less than (IL in 90 Figure degrees 4), with because respect the tocapacitive the applied current voltage, that dueenters to losses.the gate This of the current active can device be seen is relatively as the vectorial small and sum can of abe purely neglected. inductive Then, current, the main and part of of a purelythis current resistive (Ipassive current in Figure in phase 4) with flows the through applied voltage,a relatively much large smaller capacitor in amplitude, Cg, that due has to thea smaller losses inimpedance the inductor. compared The compensation to the passive of inductor. the losses Therefore, can be obtained this current by summing is mainly another inductive current, with opposite respect into phasethe input with voltage, respect but to thealso resistive has a resistive current compon and; therefore,ent, due equivalentto the losses to in the the current capacitor of a and negative in the resistance.inductor. From This the negative plot in resistance Figure 5 its current resistive will nature be therefore is apparent much from smaller its phase than relation the total to current the input in thevoltage. inductor. AA possiblesmaller topologypart of the that current implements through this the approach passive isinductor shown inflows Figure through4. The the current phase-shifting from the inputnetwork of the (Iactive AI in flows Figure through 4). This a passivecurrent can inductor have a (I Lnegativein Figure resistance4), because component the capacitive with respect current to that the entersinput thevoltage, gate ofbecause the active it ultimately device is relativelycomes from small theand active can device. be neglected. The size Then, of the the active main device, part of thisand currentthe delay (Ipassive introducedin Figure by4) flowsthe phase-shifting through a relatively networ largek must capacitor be designedCg, that in has such a smaller a way, impedance that the negative-resistance component of the Iactive current compensates the resistive component of the Ipassive current through the capacitor. In this way its amplitude is kept to a low value compared to the total

Electronics 2020, 9, 1232 5 of 14 ElectronicsElectronics 2020 2020, ,9 9, ,x x FOR FOR PEER PEER REVIEW REVIEW 55 of of 14 14 currentcurrentcompared flowing flowing to the into into passive the the AI. AI. inductor. Therefore, Therefore, Therefore, the the current current this currentthrough through is the the mainly active active inductive device device is is with minimized, minimized, respect tocompared compared the input totovoltage, thethe standardstandard but also design,design, has a resistive wherewhere allall component, thethe currentcurrent due flowinflowin to thegg into lossesinto thethe in AIAI the comescomes capacitor fromfrom and thethe in activeactive the inductor. device.device. As FromAs aa consequence,consequence,the plot in Figure biasbias 5 currentcurrent its resistive andand overaloveral naturell power ispower apparent consumptionconsumption from its phase inin minimized.minimized. relation to the input voltage.

FigureFigureFigure 4. 4. 4. Improved ImprovedImproved topology topology topology of of of the the the AI AI AI for for for class-A class-A class-A low low low bias bias bias current. current. current.

Figure 5. Phasors of voltages and currents in the AI of Figure 3 in the complex plane. Vin is the input FigureFigure 5. 5. PhasorsPhasors of of voltages voltages and and currents currents in in the the AI AI of of Figure Figure 33 inin thethe complexcomplex plane.plane. Vinin isis the the input input voltage, IL the current through the inductor L. Ipassive is the current through the capacitor Cg and Iactive voltage,voltage, IILL thethe current current through through the the inductor L.L. Ipassive isis the the current current through through the capacitor Cgg and Iactive thethethe currentcurrent current drawndrawn drawn fromfrom from thethe the transisttransist transistororor throughthrough through thethe the phase-shiftingphase-shifting phase-shifting nene network.twork.twork. TheirTheir Their vectorialvectorial vectorial sum sum sum givesgives gives the current through the inductance IL. thethe current current through through the the inductance inductance IILL. .

TheTheA smaller valuevalue ofof part thethe ofequivalentequivalent the current inductanceinductance through isis the easilyeasily passive tunedtuned inductor byby varyingvarying flows thethe through valuevalue ofof the thethe phase-shifting capacitancecapacitance g CCnetworkg,, that that can can (I be activebe implemented implementedin Figure4). with with This a a current varactor; varactor; can given given have the the a negativerelatively relatively resistance high high value value component of of the the capacitor, capacitor, with respectthe the series series to g LLthe -- CC inputg isis inductive,inductive, voltage, because because thethe it ultimately operatingoperating comes frequencyfrequency from isis the higherhigher active thanthan device. thethe resonantresonant The size frequencyfrequency of the active ofof thethe device, LCLC series.series.and the By By delaychanging changing introduced the the value value by of of thethe the phase-shiftingcapacito capacitor,r, also also the networkthe equivalent equivalent must inductance inductance be designed of of inthe the such LC LC series series a way, is is varied. thatvaried. the res AnotherAnothernegative-resistance varactorvaractor cancan component bebe usedused alsoalso of the totoI activeimplementimplementcurrent the compensatesthe resonatingresonating the capacitancecapacitance resistive component CCres ofof thethe of singlesingle the I passive cellcell (Figure(Figurecurrent 1).1). through TheThe simultaneoussimultaneous the capacitor. tuningtuning In this ofof way thethe resonati itsresonati amplitudengng capacitancecapacitance is kept to and aand low ofof value thethe equivalentequivalent compared inductanceinductance to the total yieldsyieldscurrent aa constant flowingconstant intobandpassbandpass the AI. acrossacross Therefore, thethe tuningtuning the current frequencyfrequency through range,range, the whilewhile active thethe device lowlow losses islosses minimized, oror possiblypossibly compared smallsmall negativenegativeto the standard equivalentequivalent design, reresistancesistance where ofof all thethe the AIAI current allowallow toflowingto enhanceenhance into thethe the Q-factorQ-factor AI comes ofof the fromthe filter.filter. the active device. As a consequence,TheThe proposedproposed bias currentdesigndesign andapproachapproach overall hashas power somesome consumption similasimilaritiesrities inwithwith minimized. thethe negativenegative impedanceimpedance converterconverter (NIC)(NIC) The approachapproach value of [9,10].[9,10]. the equivalent However,However, inductance thethe negativenegative is easily resistanceresistance tuned byisis not varyingnot designeddesigned the value asas aa of one-port,one-port, the capacitance additiveadditiveCg , network,network,that can butbebut implemented isis obtainedobtained byby with suitablesuitable a varactor; phasingphasing given ofof thethe the activeactive relatively inductorinductor high loop.loop. value Moreover,Moreover, of the capacitor, thethe veryvery the simplesimple series AIAIL-C topologytopologyg is inductive, herehere addressed,addressed, because the basedbased operating onon aa frequency singlesingle transistortransistor is higher perper than cell,cell, the greatly resonantgreatly reducesreduces frequency thethe of currentcurrent the LC requirements,requirements,series. By changing and and makes makes the value stab stability ofility the enforcement enforcement capacitor, also quite quite the straightforward, straightforward, equivalent inductance ensuring ensuring of at theat the theLC same sameseries time time is varied. also also high-powerhigh-powerAnother varactor handlinghandling can togethertogether be used withwith also low-powerlow-power to implement consumption.consumption. the resonating capacitance Cres of the single cell (FigureWhenWhen1). properly Theproperly simultaneous implemented, implemented, tuning the the of proposed proposed the resonating approach approach capacitance does does not not cause andcause of any any the reduction reduction equivalent in in inductancethe the tuning tuning rangerange oror increaseincrease inin losseslosses withwith respectrespect toto thethe traditionaltraditional approach.approach. TheThe mainmain resultresult isis thethe reductionreduction

Electronics 2020, 9, 1232 6 of 14 yields a constant bandpass across the tuning frequency range, while the low losses or possibly small negative equivalent resistance of the AI allow to enhance the Q-factor of the filter. The proposed design approach has some similarities with the negative impedance converter (NIC) approach [9,10]. However, the negative resistance is not designed as a one-port, additive network, but is obtained by suitable phasing of the active inductor loop. Moreover, the very simple AI topology here addressed, based on a single transistor per cell, greatly reduces the current requirements, and makes stability enforcement quite straightforward, ensuring at the same time also high-power handling together with low-power consumption. When properly implemented, the proposed approach does not cause any reduction in the tuning range or increase in losses with respect to the traditional approach. The main result is the reduction of the current required from the active device, with consequent increase of power handling with the same active device. It is also important to notice that the proposed design approach is not based on equations but on the optimization of network parameters (currents, voltages, equivalent impedances) at both small and large signals. It suggests a suitable architecture for the realization of active filters based on active inductors. An analytical approach is hard to realize since the filter makes use of AIs that are implemented as closed loop circuits. In addition, it is not useful from a practical point of view also considering that at these frequencies circuits usually make use of distributed elements that are difficult to analytically describe. So the description is strictly related to the network configuration and cannot be generalized.

3. MMIC Design and Test Following the above proposed design strategy and making use of the new architecture shown in Figure4 for the AI, a two-cells example filter has been designed, considering for each cell the same architecture shown in Figure1. However, the core of the proposed work is the AI design and the filter performance are strictly dependent on the active inductor characteristics. The AI should be applied also to different filter families (e.g., Butterworth, Chebyshev, etc.) [11] that make use of grounded inductors. In this example, the filter has been fabricated on a GaAs technology provided by HSRI, realized and tested for demonstration. The standard PDK from HSRI includes 0.13 µm pHEMT devices that exhibit low noise figure, high gain and high-power density (0.7 W/mm). Varactor diodes are not currently available in this technology; the design will be updated with inclusion of varactors as soon as they are available in the future. The proposed design method can be applied with any technology process and into the millimeter-wave band. It is also important to note that the performances of the example filter have been designed for the replacement of an existing passive filter used as post selector in base station unit for mobile communications, and so could be improved further. The filter acts exactly as a resonator. Its ease of realization represents its effectiveness. More in detail, Cres and Lres in Figure1 define the resonant frequency, that is the center frequency of the filter. The quality factor of the filter depends mainly on the quality factors of the components used in the resonator. Cdc and Ldc realize series resonators that have decoupling effects and are helpful to tighten the filter bandwidth. The same architecture has been widely described in [11–13]. The filter has been realized replying twice the same cell. Each single cell includes an active inductor that realizes Lres. The embedded AI in each cell has been realized with a transistor, whose dimensions are 6 25 um, × in common source configuration. A self-gate bias architecture has also been implemented in order to limit the number of the bias pads and to reduce the temperature dependence of the filter characteristics. The bias current per transistor is 15 mA, while the total power consumption is 120 mW with a DC voltage supply of 4 V. It is straightforward to notice that the DC power consumption is not very low; but in this example this design choice was not critical. In general, it depends on the desired linearity and dynamic range of the filter, in addition to the available technology. Considering the HAMLA13B Model Handbook from HSRI, in particular the recommended bias voltages and the IV-curves of the active devices, a drain voltage of 4 V and a bias current per transistor of 15 mA are suitable choices, Electronics 2020, 9, 1232 7 of 14 considering the required power handling and the connected voltage and current swings. Obviously, by using different technology processes and considering different design specs power consumption should be different, but still in the same order of magnitude if you use the same transistor topology. In addition, it may be reduced also changing the number of cells, so allowing to have a lower shape factor of the filter. In Figure6, the complete schematic of the single cell is reported, while in Figure7, the simulated results of the proposed IC design are shown for a fixed tuning state. The insertion loss is about 6 dB, while the 3 dB bandwidth is 30 MHz. It is worth noting that given the active nature of the filter there is no problem in principle to obtain very low attenuation, close to zero, but this was not the aim of this Electronics 2020, 9, x FOR PEER REVIEW 7 of 14 work since the proposed circuit has been designed for the one-to-one replacement of an existing passive post-selectorthe insertion filter,loss is and not therefore a critical itparameter, had to have and the has same not performances. been improved. In thatHowever, application active the filters insertion may reduceloss is notthe aattenuation critical parameter, to zero or and even has have not been amplification, improved. at However, the expense active of stability. filters may Typically, reduce thean insertionattenuation loss to of zero 0.5or dB even can havebe reached amplification, with still at a the good expense stability ofstability. margin. Typically,The insertion an insertion loss is defined loss of properly0.5 dB can balancing be reached the with negative still a good resistance stability introduced margin. The by insertionthe active loss inductor is defined and properly losses of balancing passive componentsthe negative resistanceof filtering introduced network. So by, it the is activeof primary inductor importance and losses the of definition passive components of a suitable of shape filtering for thenetwork. input impedance So, it is of primary of the AI importance that allows the to definitionprovide low of alosses, suitable out-of-band shape for rejection the input and impedance tunability of versusthe AI thatan external allows to control provide voltage. low losses, As out-of-band shown in Figure rejection 7, and the tunabilityshape factor versus achievable an external with control the proposedvoltage. As solution shown inis Figuretypical7 ,of the higher-order shape factor achievablepassive solutions with the [11], proposed and the solution quality is typical factor ofis approximatelyhigher-order passive equal solutionsto 90. It [is11 important], and the qualityto remark factor that is approximatelythe circuit is stable, equal as to 90.evident It is importantfrom the behaviorto remark of that the thestability circuit factor is stable, K and as Delta evident parameter from the in behaviorthe same offigure the stability [14]. The factor stability K and has Deltabeen parameterchecked not in only the same between figure the [14 external]. The stability RF I/O pads, has been but checkedalso at transistor not only betweenlevel in each the external stage with RF the I/O pads,approach but alsoproposed at transistor in [8]. levelThis inis eachnecessary stage withdue to the the approach presence proposed of feedback in [8 ].networks This is necessary (Figure 4) due that to maythe presence generate of feedbackinner instability networks problems. (Figure4) thatIn particular, may generate the inner amplifier instability in each problems. active Ininductor particular, is unconditionallythe amplifier in each stable active at all inductor frequencies. is unconditionally Additionally, stable each at allcell frequencies. is unconditionally Additionally, stable each at cellall frequencies,is unconditionally because stable the small at all frequencies,negative resistance because of the the small active negative inductor resistance is compensated of the active by the inductor losses ofis compensatedthe resonating by capacitor the losses and of of the the resonating connecting capacitor lines. Therefore, and of the no connecting oscillations lines. can take Therefore, place due no tooscillations reflections can between take place cells. due In toFigure reflections 8, the betweensimulated cells. output In Figure power8, and the simulatedattenuation output vs. input power power and attenuation vs. input power are shown for the circuit tuned at 1800 MHz, for a 7 dBm compression are shown for the circuit tuned at 1800 MHz, for a −7 dBm compression point.− In Figure 9, the point.simulated In Figure dynamic9, the load simulated lines of dynamic the transistor load lines for of the the same transistor tuning for frequency the same tuning are also frequency shown arefor severalalso shown input for power several levels, input demonstrating power levels, demonstratingclass-A operations. class-A operations. DC bias pad

R1 2.9nH 25pF P2

2.9nH N=6 P1 0.9pF W=23um 25pF 4.2pF 49 Ω 6.9pF

11.8pF 1600um 12.2pF 680Ω DC bias pad

Figure 6. Schematic of the single cell. Figure 6. Schematic of the single cell.

Electronics 2020, 9, x FOR PEER REVIEW 8 of 14

0 10

-10 5 delta K, (dB), S22 (dB), S11 2.2 -20 0 Electronics 2020,, 99,, 1232x FOR PEER REVIEW 8 of 14 Electronics 2020, 9, x FOR PEER REVIEW 8 of 14 -300 -510 S21 (dB)

S21 (dB) 0 10 -40 S11 (dB) -10 -10 5 delta K, (dB), S22 (dB), S11 S22 (dB)

-10 2.2 5 delta K, (dB), S22 (dB), S11 -50 K -15 -20 2.2 delta 0 -20 0 -60-30 -20-5 -30 1.01.21.41.61.82.02.22.42.62.8S21 (dB) 3.0-5 S21 (dB) -40 Freq (GHz) S21S11 (dB) -10 S21 (dB) -40 S11S22 (dB) -10 S22 K(dB) Figure 7. Simulated-50 S-parameters and stability parameters of the two-cell filter for-15 a single frequency. delta -50 K -15 delta -60 -20 -60 1.01.21.41.61.82.02.22.42.62.8 3.0-20 1.01.21.41.61.82.02.22.42.62.8 3.0 Freq (GHz) Freq (GHz) Figure 7. Simulated S-parameters and stability parameters of the two-cell filter for a single frequency. Figure 7. Simulated S-parameters and stability parameters of the two-cell ﬁlter for a single frequency. Figure 7. Simulated S-parameters and stability parameters of the two-cell filter for a single frequency.

Figure 8. Simulated compression of the filter tuned at 1800 MHz.

At the considered frequencies, better performance can be achieved by using, for instance, SAW devices. However, SAW filters [15] have a limited integration capability and cannot be used at very high frequencies. Additionally, an active chip filter has potential tunability, and smaller size and cost compared to a SAW filter. Figure 8. Simulated compression of the ﬁlterfilter tuned at 1800 MHz. Figure 8. Simulated compression of the filter tuned at 1800 MHz. At the considered frequencies, better performance can be achieved by using, for instance, SAW devices.At the However, considered SAW frequencies, filters [15] betterhave a performance limited integration can be capabilityachieved by and using, cannot for be instance, used at SAW very devices.high frequencies. However, Additionally, SAW filters [15]an active have chipa limited filter integrationhas potential capability tunability, and and cannot smaller be sizeused and at very cost highcompared frequencies. to a SAW Additionally, filter. an active chip filter has potential tunability, and smaller size and cost compared to a SAW filter.

Figure 9. DynamicDynamic load load line line of of the the transistor transistor of of the the f ﬁlterilter tuned tuned at at 1800 1800 MHz, MHz, for for different diﬀerent input power levels up to 9 dBm. levels up to −9 dBm. At the considered frequencies, better performance can be achieved by using, for instance,

SAW devices. However, SAW filters [15] have a limited integration capability and cannot be used at very high frequencies. Additionally, an active chip filter has potential tunability, and smaller size and cost comparedFigure 9. Dynamic to a SAW load filter. line of the transistor of the filter tuned at 1800 MHz, for different input power Figurelevels up 9. Dynamicto −9 dBm. load line of the transistor of the filter tuned at 1800 MHz, for different input power levels up to −9 dBm.

Electronics 2020, 9, x FOR PEER REVIEW 9 of 14

A photograph of the fabricated chip is shown in Figure 10a. The chip size is 3 × 1.5 mm, and obviously may be further reduced in next redesign. The two cells are coupled by LC-series elements. The single cell is magnified in Figure 10b, where also some voltages and currents components are reported to better illustrate the proposed approach. The behavior of the same electrical parameters is shown in the follows in order to prove the design consideration introduced in the previous Section. The main inductance L in Figure 4 in this example is replaced by a length of line in each cell. Since standard PDK from HSRI does not include varactors, it has not been possible to use variable capacitors, so in this first run they have been replaced by fixed capacitances, for a first assessment of the design approach and in order to avoid further uncertainties that may be introduced by the nonlinear models of the devices. In fact, our aim is to provide a feasibility proof demonstrating the tunability capability of the filter by replacing the unavailable varactors with fixed capacitors. So, three different chips with different capacitance values of the capacitor Cg in Figure 10b have been fabricated, each tuned to a different center frequency. However, the values of the fixed capacitances have been designed with a capacitance ratio of 3:1 for Electronicsthe full2020 tuning, 9, 1232 bandwidth, making them suitable to be replaced by real varactors. Obviously,9 ofthere 14 are minor adjustments to be made when the fixed capacitors are replaced by varactors, mainly in termA of photograph losses. But ofwe the have fabricated already verified chip is shownin different in Figure discrete 10 a.prototypes The chip that size the is replacement 3 1.5 mm, is still possible and does not significantly affect the overall performance of the filter. This× is possible and obviously may be further reduced in next redesign. The two cells are coupled by LC-series thanks to the active nature of the inductors, that can be slightly tuned to compensate the additional elements. The single cell is magniﬁed in Figure 10b, where also some voltages and currents components losses introduced by varactors. are reported to better illustrate the proposed approach.

(a) (b)

FigureFigure 10. 10.The The fabricated fabricated active active ﬁlter: filter: (a )(a Photograph) Photograph of theof the chip, chip, (b) ( ab single) a single cell cell where where the currentsthe currents of Figureof Figure4 are 4 indicated. are indicated.

TheIn Figure behavior 11, of comparison the same electrical between parameters simulatedis and shown measured in the followsS-parameters in order for to a prove fixes tuning the design state considerationis reported demonstrated introduced in a the good previous agreement; Section. while The me mainasured inductance results Lofin the Figure S-parameters4 in this example of the three is replacedchips, centered by a length at the of linecenter in frequency each cell. Sinceand at standard the two PDKextreme from frequencies HSRI does in not the include tuning varactors, range, are itreported has not been in Figure possible 12. to As use shown, variable bandwidth capacitors, and so inqu thisality first factor run theyare approximately have been replaced constant by fixed at all capacitances,frequencies. forThe a currents first assessment in the active of the inductor design approachand the corresponding and in order tovoltages, avoid further as indicated uncertainties in Figure that10b, may are be plotted introduced in Figures by the 13–15 nonlinear vs. time. models All of quantities the devices. refer In fact,to the our cell aim tuned is to provideat 1800 aMHz feasibility and at proofcompression demonstrating level. More the tunability in details, capability in Figure of 13 the the filter voltage by replacing (Vcell) and the current unavailable (Icell) at varactorsthe input withof the fixedcell are capacitors. shown. It So, is apparent three diff thaterent the chips cell has with resistive different behavior, capacitance but very values low of losses, the capacitor as indicatedCg in by Figurethe very 10b low have current. been fabricated, In Figure each 14 the tuned currents to a di ff(Ierentres) in centerthe resonating frequency. capacitance However, theand values in the of active the fixedinductance capacitances (IL) are have shown, been together designed with with the a capacitancevoltage at that ratio node of 3:1(Vres for). The the fullsum tuning of the bandwidth,two currents making them suitable to be replaced by real varactors. Obviously, there are minor adjustments to be made when the fixed capacitors are replaced by varactors, mainly in term of losses. But we have already verified in different discrete prototypes that the replacement is still possible and does not significantly affect the overall performance of the filter. This is possible thanks to the active nature of the inductors, that can be slightly tuned to compensate the additional losses introduced by varactors. In Figure 11, comparison between simulated and measured S-parameters for a fixes tuning state is reported demonstrated a good agreement; while measured results of the S-parameters of the three chips, centered at the center frequency and at the two extreme frequencies in the tuning range, are reported in Figure 12. As shown, bandwidth and quality factor are approximately constant at all frequencies. The currents in the active inductor and the corresponding voltages, as indicated in Figure 10b, are plotted in Figures 13–15 vs. time. All quantities refer to the cell tuned at 1800 MHz and at compression level. More in details, in Figure 13 the voltage (Vcell) and current (Icell) at the input of the cell are shown. It is apparent that the cell has resistive behavior, but very low losses, as indicated by the very low current. In Figure 14 the currents (Ires) in the resonating capacitance and in the active inductance (IL) are shown, together with the voltage at that node (Vres). The sum of the two Electronics 2020, 9, x FOR PEER REVIEW 10 of 14 Electronics 2020, 9, 1232 10 of 14

(Ires and ElectronicsIL) is almost 2020, 9, x zeroFOR PEER since REVIEW they are in anti-phase, indicating their almost total cancellation.10 of 14 In Electronics 2020, 9, x FOR PEER REVIEW 10 of 14 Figure 15,currents the inductor (Ires and IL current) is almost IL zero, the since current theyare Ipassive in anti-phase, through indicatingthe capacitor their almost Cg and total the cancellation. current Iactive from In(Ires Figure and I L15) is, thealmost inductor zero currentsince theyIL, theare current in anti-phase,Ipassive through indicating the their capacitor almostCg andtotal the cancellation. current Iactive In the transistor(Ires and areIL) is shown, almost zero together since they with are thein anti-phase, voltage atindicating the corresponding their almost total node. cancellation. As stated In in the fromFigure the 15, transistor the inductor are shown,current togetherIL, the current with theIpassive voltage through at the the capacitor corresponding Cg and node. the current As stated Iactive in from the previousFigure section, 15, the it isinductor apparent current that IL ,also the current in this I passiveexample through the the main capacitor contribution Cg and the current of the Iinductoractive from current previousthe transistor section, are it shown, is apparent together that alsowith in the this voltage example at the the main corresponding contribution node. of the As inductor statedcurrent in the the transistor are shown, together with the voltage at the corresponding node. As stated in the flows throughﬂowsprevious through the section, capacitor the it capacitoris apparent Cg toC thatground,to ground, also in and this and examplethat that itit is isthe a a passive main passiv contribution current,e current, as indicatedof asthe indicated inductor by the current phase by the phase previous section, it is apparentg that also in this example the main contribution of the inductor current relation relationflowsbetween through between voltage the voltage capacitor and and current. C current.g to ground, and that it is a passive current, as indicated by the phase flows through the capacitor Cg to ground, and that it is a passive current, as indicated by the phase relation between voltage and current. relation between voltage and current. Measured Simulated S21 MeasuredS11 SimulatedS21 S11 0 S21Measured S11 S21 Simulated S11 4 0 S21 S11 S21 S11 4 0 4 -20 -20 0 0 -20 0 S11 (dB) S11 S11 (dB) S11

-40 -40 -4 (dB) S11 -4 -40 -4 S21 (dB)

S21 (dB) -60 -8 -60 S21 (dB) -60 -8 -8 -80 -12 -80 -80 -12 -12 -100 -16 -100 -16 -100 1.50 1.65 1.80 1.95 2.10 2.25 2.40 -16 1.50 1.65 1.80 1.95 2.10 2.25 2.40 1.50 1.65 1.80Freq 1.95 (GHz) 2.10 2.25 2.40 . Freq (GHz) . Freq (GHz) . Figure 11. Comparison between simulated and measured S-parameters at center frequency. Figure 11. ComparisonComparison between between simulated simulated and and measured measured S-parameters at center frequency. Figure 11. Comparison between simulated and measured S-parameters at center frequency.

Figure 12. Measured S-parameters of the two-cell filter at three frequencies in the tuning range. Figure 12. MeasuredMeasured S-parameters S-parameters of the two-cell filter ﬁlter at three frequencies in the tuning range.

Figure 12. Measured S-parameters of the two-cell filter at three frequencies in the tuning range.

Figure 13. SimulatedSimulated voltage and current at the input of the resonating cell (see Figure 1010b).b). Figure 13. Simulated voltage and current at the input of the resonating cell (see Figure 10b).

Figure 13. Simulated voltage and current at the input of the resonating cell (see Figure 10b).

Electronics 2020, 9, 1232x FOR PEER REVIEW 11 of 14 Electronics 2020, 9, x FOR PEER REVIEW 11 of 14

Figure 14. Simulated currents IRES in the resonating capacitance CRES and in the active inductor IL, Figure 14. Simulated currents IRES in the resonating capacitance CRES and in the active inductor IL, togetherFigure 14. with Simulated the voltage currents VRES at IRES the in corresponding the resonating node capacitance (see Figure CRES 10b). and in the active inductor IL, together with the voltage VRES at the corresponding node (see Figure 10b). together with the voltage VRES at the corresponding node (see Figure 10b).

FigureFigure 15. SimulatedSimulated voltage voltage and and current current at at the the input input of the resonating cell (see Figure 10b).10b). Figure 15. Simulated voltage and current at the input of the resonating cell (see Figure 10b). A minor contribution comescomes fromfrom thethe transistor,transistor, and and it it is is an an active active current. current. Their Their combination combination is is a aslightly slightlyA minor active active contribution current, current, corresponding corresponding comes from tothe to a atransistor, negative negative equivalentandequivalent it is an resistance, resistance,active current. thatthat Their compensatescompensates combination for the is lossesa slightly in the active resonator resonator current, capacitance corresponding (Cresres).). Thus,to Thus, a negative these these real real equivalent waveforms waveforms resistance, il illustratelustrate that and and compensates confirm confirm the the designfor design the approachlosses in the representedrepresented resonator in capacitancein Figures Figures4 and (4C res5and,). that Thus, 5, minimizesthat these minimizes real the waveforms RF the current RF il inlustratecurrent the transistor andin the confirm transistor and; the therefore, design and; therefore,approachthe bias current therepresented bias requirement current in requirFigures for theement 4 transistorand for 5,the that itself.transistor minimizes itself. the RF current in the transistor and; therefore,The noise the bias figure figure current of the requir filter filterement has not for been the transistor meas measured,ured, itself. since since it it was was not not optimized optimized in in this this design. design. SimulationsThe noise givegive figure aa noise noise of figurethe figure filter in in thehas the order not order been of 12of meas dB.12 However,dB.ured, However, since reduction it was reduction not techniques optimized techniques [6] in should this [6] design.should reduce reduceSimulationsit to approximately it to approximatelygive a 8noise dB, approachingfigure 8 dB, inapproaching the the order noise of the figure 12 noise dB. of However,figure a filter of with areduction filter similar with losses.techniques similar Noise losses. [6] reduction should Noise reductionreducetechniques it totechniques will approximately be specifically will be 8 specifically dB, addressed approaching addressed in a successive the noisein a successive design. figure of design.a filter with similar losses. Noise reductionIt isis also techniquesalso important important will to be noticeto specificallynotice that inthat the addressed in proposed the proposed in design a successive exampledesign design. ofexample Figure 6of, passive Figure components 6, passive componentsare optimizedIt is also are for important theoptimized considered to fornotice frequencythe thatconsidered andin the they frproposedequency change accordingly designand they example tochange the operationalof accordingly Figure bandwidth.6, passiveto the operationalcomponentsIn any case, bandwidth. as are showed optimized in In the any layoutfor case, the photographas considered showed in of thfr Figureequencye layout 10 the photographand area they waste change of due Figure to accordingly both 10 the the area number towaste the of dueoperationalcomponents to both bandwidth. andthe theirnumber values In ofany iscomponents minimal;case, as showed in additionand intheir th somee valueslayout passive photographis minimal; components ofin Figureaddition can be 10 also thesome replacedarea passive waste by componentsduedistributed to both elements canthe benumber movingalso replaced of at components higher by frequencies,distributed and their soelements further values reducingmoving is minimal; at the higher chip in area. additionfrequencies, In general, some so the passivefurther same reducingcomponentsnetworks definitionthe canchip be area. may also changeIn replaced genera movingl, by the distributed thesame design networks toelements different definition moving frequencies, may at higherchange since itfrequencies, moving strictly depend the sodesign further also onto differentreducingthe technology frequencies,the chip and area. specs, since In but genera it stillstrictlyl, preserving the depend same aroundnetworks also on the the definition same technology area may occupation and change specs, andmoving but realizing still the preserving design the same to arounddifferentdesign principle the frequencies, same illustrated area occupationsince in it Figure strictly and4. The dependrealizing proposed also the on designsame the design istechnology also robustprinciple and towards illustratedspecs, tolerances but instill Figure andpreserving spread4. The proposedaroundeffects. the It hasdesign same been areais verified also occupation robust also measuring towardsand realizing tolerances different the same chips and design andspread all principle ofeffects. them illustrated showIt has similar been in Figureverified performance. 4. alsoThe measuringproposed designdifferent is chipsalso robustand all towardsof them showtolerances similar and performance. spread effects. So the It designhas been choices verified allow also to obtainmeasuring a good different reliability chips making and all the of filterthem a show good similar candidate performance. to be used Soin practicalthe design applications. choices allow to obtain a good reliability making the filter a good candidate to be used in practical applications.

Electronics 2020, 9, 1232 12 of 14

So the design choices allow to obtain a good reliability making the filter a good candidate to be used in practical applications. Finally, for completeness, in Table1 a summary of measurement results is also presented. Both linear and nonlinear characteristics are in good agreement with simulations, showing the feasibility and reliability of the proposed IC design. Table2 shows also a comparison with di fferent literary solutions. From Table2 it is evident that this work has the highest power consumption, but it is important to notice that the power consumption mainly depends on the selected technology. In the same table, almost all the cited works are realized with CMOS technologies; while just one work makes use of a p-HEMT technology. Obviously, the power consumption of MOS technologies is significantly lower; but on the opposite this kind of technologies cannot provide proficient results at higher frequencies, mainly in term of power handling capability and tunability. The power consumption of the reference makes use of p-HEMT technology around one half (so on the same order of magnitude) of that shown by our work, but it has also a P compression point significantly lower. A higher −1 dB power consumption is usually necessary to obtain better power handling capability. Our work is not strictly focused on performance, but it should be considered as a proof-of-concept and demonstrates the reliability of the proposed design approach. By using HEMT devices, the same design scheme should be successfully applied at also tens of GHz, ensuring good tunability and high 1 dB power compression point.

Table 1. Summary of measured results.

Frequency f0 (GHz) IL (dB) BW 3 dB (MHz) P 1 dB (dBm) OIP3 (dBm) − − 2.102 5.62 26 8.60 0.5 − 1.950 6.28 29 9.54 0.6 − − 1.785 7.84 33 9.31 0.5 − −

Table 2. Comparison with diﬀerent literary solutions.

Center Tuning Power BW P References Topology Frequency 3 dB Range 1 dB Consumption [MHz] [dBm] [MHz] [%] [mW] BiCMOS [16] 3375 - 66 8 96 (0.13 um) − CMOS [17] 2000 - 66 6 38 (0.13 um) − CMOS [18] 2511 36 - 1.5 0.18 (45 nm) − CMOS [19] 140 5 56 100 12 38 (40 nm) ÷ CMOS [20] 5.3 103 1.7 103 - 2.5 2.2 (0.18 um) × × p-HEMT [21] 22.6 103 900 8.8 20 50 (0.15 um) × − BiCMOS [22] 53.85 103 14 103 - 3.67 2.62 (0.13 um) × × − p-HEMT (0.13 um) This work 1950 29 15 8.5 120 (Two-cell ﬁlter) −

4. Conclusions We presented an innovative design approach for the minimization of the bias current in the AI-based active filters. The design strategy here proposed allows to obtain a significant reduction of the required DC power, without significantly affecting the power handling capability. The core of the solution here addressed for the first time is the active inductor design. Both the circuitry architecture and the components values were optimized to this purpose and the design choices were described in Electronics 2020, 9, 1232 13 of 14 detail. We also showed how the equivalent inductance and resistance can be tuned by means of variable capacitances. An example of application was also provided: An integrated active filter, centered at three different frequencies, was realized with pHMET technology provided by HSRI Foundry. The filter was optimized between 1800 and 2100 MHz with a narrow and almost constant 3 dB bandwidth of about 30 MHz and a high shape factor, typical of higher order passive filters. This solution allows one to obtain a dynamic range of about 75 dB, minimizing the power consumption. All these characteristics, as well as measured results, makes the proposed solution a good candidate to be used in practical applications and many RF TX/RX systems.

Author Contributions: Conceptualization, G.L., V.S. and L.P.; investigation, L.P. and V.S.; data curation, H.L. and Z.H.; supervision, G.L.; validation, H.L.; writing and editing, L.P., G.L. and V.S. All authors have read and agreed to the published version of the manuscript. Funding: This research received no external funding. Conﬂicts of Interest: The authors declare no conﬂict of interest.

References

1. Aghazadeh, S.; Martinez, H.; Saberkari, A. 5 GHz CMOS All-Pass Filter-Based True Time Delay Cell. Electronics 2018, 8, 16. [CrossRef] 2. Safari, L.; Barile, G.; Ferri, G.; Stornelli, V. High performance voltage output filter realizations using second generation voltage conveyor. Int. J. RF Microw. Comput. Aided Eng. 2018, 28, e21534. [CrossRef] 3. Ben Hammadi, A.; Haddad, F.; Mhiri, M.; Saad, S.; Besbes, K. RF and Microwave Reconfigurable Bandpass Filter Design Using Optimized Active Inductor Circuit. Int. J. RF Microw. Comput. Aided Eng. 2018, 28, e21550. [CrossRef] 4. Thanachayanont, A.; Sae Ngow, S. Class AB VHF CMOS active inductor. In Proceedings of the 2002 45th Midwest Symposium on Circuits and Systems, 2002, MWSCAS-2002, Tulsa, OK, USA, 4–7 August 2002. 5. Pantoli, L.; Stornelli, V.; Leuzzi, G. Tunable active filters for RF and microwave applications. J. Circuits Syst. Comput. 2014, 23, 1450088. [CrossRef] 6. Pantoli, L.; Stornelli, V.; Leuzzi, G.; Hongjun, L.; Zhifu, H. GaAs MMIC tunable active filter. In Proceedings of the 2017 Integrated Nonlinear Microwave and Millimetre-wave Circuits Workshop (INMMiC), Graz, Austria, 20–21 April 2017. 7. Pantoli, L.; Stornelli, V.; Leuzzi, G. Low-noise tunable filter design by means of active components. Electron. Lett. 2016, 52, 86–88. [CrossRef] 8. Pantoli, L.; Stornelli, V.; Leuzzi, G. A low-voltage low-power 0.25 µm integrated single transistor active inductor-based filter. Analog Integr. Circuits Signal Process. 2016, 87, 463–469. [CrossRef] 9. Foster, R. A Reactance Theorem. Bell Syst. Tech. J. 1924, 3, 259–267. [CrossRef] 10. Merrill, J. Theory of the Negative Impedance Converter. Bell Syst. Tech. J. 1951, 30, 88–109. [CrossRef] 11. Zverev, A.I. Handbook of Filter Synthesis; John Wiley & Sons: New York, NY, USA, 1967. 12. Rhea, R.W. Filter Synthesis Using Genesys S/Filter; Artech House Publishers: Boston, MA, USA, 2014. 13. Matthaei, G.L.; Young, L.; Jones, E.M. Microwave Filters. Impedance Matching Networks and Coupling Structures; Artech House Books: Boston, MA, USA, 1980. 14. Platzker, A.; Struble, W.; Hetzler, K.T. Instabilities diagnosis and the role of K in microwave circuits. In Proceedings of the IEEE MTT-S International Microwave Symposium Digest, Atlanta, GA, USA, 14–18 June 1993; Volume 3, pp. 1185–1188. 15. Lu, X.; Mouthaan, K.; Soon, Y.T. Wideband Bandpass Filters With SAW-Filter-Like Selectivity Using Chip SAW Resonators. IEEE Trans. Microwave Theory Tech. 2014, 62, 28–36. [CrossRef] 16. Mohammadi, L.; Koh, K. 2–4 GHz Q-tunable LC bandpass filter with 172-dBHz peak dynamic range, resilient to +15 dBm out-of-band blocker. In Proceedings of the 2015 IEEE Custom Integrated Circuits Conference (CICC), San Jose, CA, USA, 28–30 September 2015. 17. Mohammadi, L.; Koh, K. Low power highly linear band-pass/band-stop filter for 2–4 GHz with less than 1% of fractional bandwidth in 0.13 µm CMOS technology. In Proceedings of the 2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), Honolulu, HI, USA, 4–6 June 2017. Electronics 2020, 9, 1232 14 of 14

18. Kumar, V.; Mehra, R.; Islam, A. A 2.5 GHz Low Power, High-Q, Reliable Design of Active Bandpass Filter. IEEE Trans. Device Mater. Reliab. 2017, 17, 229–244. [CrossRef] 19. Wu, B.; Chiu, Y. A 40 nm CMOS Derivative-Free IF Active-RC BPF With Programmable Bandwidth and Center Frequency Achieving Over 30 dBm IIP3. IEEE J. Solid-State Circuits 2015, 50, 1772–1784. [CrossRef] 20. Wang, S.; Lin, W. C-band complementary metal-oxide-semiconductor bandpass filter using active capacitance circuit. IET Microw. Antennas Propagat. 2014, 8, 1416–1422. [CrossRef] 21. Fan, K.W.; Weng, C.C.; Tsai, Z.M.; Wang, H.; Jeng, S.K. K-band MMIC active band-pass filters. IEEE Microw. Wirel. Compon. Lett. 2005, 15, 19–21. 22. Chaturvedi, S.; Božanić,M.; Sinha, S. 60 GHz BiCMOS active bandpass filters. Microelectron. J. 2019, 90, 315–322. [CrossRef]

© 2020 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (http://creativecommons.org/licenses/by/4.0/).