DOCSLIB.ORG

En II) Satellite Computers Have No Disk Memory and No .."'U :E :Iii :Iii :11>- >-

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
En II) Satellite Computers Have No Disk Memory and No ..- >-" /> The 6th Symp. on Accelerator Science and Technology, 1987, Tokyo, japan (©lonics, Tokyo, 1987} TEST SYSTEM FOR KEK PS CONTROL USING VME COMPUTERS AND PRIVATE NETWORK H. Nakagawa, E. Kadokura, K. Ishii and T. Katoh KEK, National Laboratory for High Energy Physics Oho-mach, Tsukuba, Ibaraki-ken, 305 Japan ABSTRACT The control system for KEK 12 GeV Proton Synchrotron will be replaced with a new micro-computer system with a new computer network system. The VME-bus based multi-microcomputer system has been introduced into the test control system. A private network system named 'mini-KOP' for test is a 'token-bUs' system with 9600 bps MODEM. Special extended PASCAL program 'OBJP' is also made for network support and simple 60MB 2HO 200 programming. The OBJP is built from the analysis of FLOPPY OISI\ control programs. HARO 0 ISK In this paper we describe the prototype system; rxxl ~x, NAME the VME-computer construction, the mini-KOP, the OBJP LlU.J i, NODE No. programs and operation of the system. Fig. 1 Test control system ~ith VME-computers. INTRODUCTION MELCOM-70 multi-computer system has been used as of control computers for VME-computers which are widely used standard bus 12 GeV proton synchrotron for computers. about 14 years[1]. The By using VME-computer in standard Euro Card system is composed of eight 16- format[3] bit mini-computers; a multi-purpose with reliable two-piece connectors, the central computer, a system can be constructed data-logging one and six satellite to be very flexible and the ones. The data multi-CPU board configuration logging computer is called 'software is possible. development The test system consists computer', because this is used for programming of eleven VME-computers; at a software development computer, early time. Now, the central computer is used operation console both for computers and data-taking computers. programming and real-time tasks such as accelerator They control the 20/40 MeV beam transport line devices, condition displays, human interface for operation and booster network control. injection system power supplies and main ring dynamic steering Satellite computers magnet power supplies. have one or two process In the new system, input/output controllers for M68000 family CPUs and VERSAdos data taking and device operating system are used control. As they have small size memory for both real-time control and poor CPU task and programming. The power, the programs are simple and premitive. software development computer and satellite computers communicate Due to poor CPU power of the satellite computers with each other through a home-made network which is called and heavy duty of the central computer, response of the mini-KOP. system is The prototype control system is described in this very slow for human interface. Power of the paper. 16-bit mini-computer is limited mainly by memory work space; summation of system program, real-time tasks and a user program is limited to 64 kW. Large scale data SYSTEM CONFIGURATION analysis program cannot run on this system. Recently, the failure rate of the system has so increased and the Eleven VME-computes are maintenance of the system becomes distributed around the very difficult. accelerator as shown in Fig.l. Both Replacement of the system 'SD' and 'TOP' are has been decided related installed in the programming room and other to the reason written above[2]. computers New system is composed are in the control room and sub-control rooms. A software development computer 'SD' has three terminals, two 60MB hard disks. Three persons can make program simultaneously using the computer, because it is a multi-user system. The 'SD' has both the main CPU 0: board called MVME-121 (MC68010 + MC68451) 0 and a ~ communication CPU u board (M68000 family). Fig.2 shows w z the configuration of the 'SD' system. It has both a .. 0 0 ~ Ill 0 0 z 0 ~ 0 0: ..J graphic display controller and a display monitor 0 0 0 u for ... ; ; 0: u "'0 ... .., ... ... 0: '"'.., checking the network. Under VERSAdos, both real-time I I I '"'I ... w I '"' w u ..J w w w 0 Ill Ill w w tasks whicn are related to the network and transient :Iii :Iii :Iii 0 ·- ·- :Iii :Iii 0 "0 Ill ... 0 II) tasks for programming run on about 5M~ .."' > > > Ill "' > > - .. en memory . u :E :Iii :Iii :11>- >- ...... II) w 0 a: Ten satellite computers have no disk memory and no terminal. But they have various process input/output 60MB boards; A/D, D/A, digital input/output, graphic display 2DD Floppy disk Hard disk controller, pulse-train gernerator and MIL-1553B like serial device controller. The configuration of the 60MB satellite computers are classified 2HD Floppy disk by CPU into two Hard disk types !iS shown in Fig.3. First generation has an MC68000 CPU on the main CPU board and the second generation has an MC68020 and an MC68881 on the main CPU board. In both generations, the home-made network devices are same. Both 'OP' and 'TOP' are operation console computers. They have graphic displays and a touch-panel for human interface. We adopted multi-displays ins ted of multi-windows on single display for simplification Fig. 2 Configuration of the software development both of programming and operation. COIIrpUter 'SD'. The '20/40 BT' controls the all power supplies of the 20 MeV and 40 MeV beam transport lines. A vacuum -239- CPU S-RAM D-RAM RS-232C _!'\, Both pointers are manipulated by special tasks on /" I / VERSAdos. Server task works on transmission by "TRAP ~ ~ 0 0 0 0 0 ~ ~ #6" command in an application task. Receiver task works 0 0 :> > 0 Fl RS T !0 !0 every 0.1 second and checks the pointer. If new data I I "'I "'I "'I GENERATION has arrived in the buffer, it activates a new task or ~ AD. DA. RELAY etc. ...,="" ...,="" "' "' :;; it sends the message to the destination task. ... ... ,__> "" :;; :;; >-"' >-"' -~ !---MAIN PART---+---PERIPHERAl---1 Table 1 Data types on the network. ~ ~ TYPE CODE 0 CPU DATA TYPE "" "'I 0 0 = ~ GRAPHIC 0 v v 0 SECOND 0 ~ 0 :> <? !0 DISPlAY CONTROllER etc. GENERATION I "'I I I ~ J.."' J.."' "' :!E :;; :;; :;; AD. OA ..... etc. :> :> :> "' ~ :;; :> -"" ,__ ... M :;; :;; ~ >-"' :;; ABSOLUTE LOAD MODULES ( S-FORMAT ) 1 cPu s-kAM.J oJAM /. c1pu l COMMUNICATION D-RAM RS-ZJZC S-RAM y CPU VERSAdos ( S-FORMAT ) Fig. 3 Basic configuration of satellite computers. In our system of first generation, MC68000 CPU = is used. In second generation, MC68020 CPU is =G $XXXXXX used. START FROM $XXXXXX gauge and valve status of the lines are connected to L POSITION INDEPENDNT the 'VAC'. The 'H-' controls the power supplies of the ( DISK FORMAT ) booster synchrotron injection magnets for the charge MAIN exchnge injection. CPU The 'M1', 'M2', 'M3' and 'M4' are for control of Q MESSAGE TO A TASK the power supplies of dynamic steering magnets of the main ring. They will be used for other purpose at each location. The 'MON' watches the beam intensity signals of SOFTWARE -OS and OBJP- all accelerators of the proton synchrotron and takes the data of the 20/40 MeV BT profile monitor. VERSAdos is a multi-user, multi-tasking operating system for the M68000 family CPU in a VME-module made by Motorola. The kernel of the VERSAdos is the RMS68K NETWORK Real-time Executive which provides task services and supports memory management. It also allows inter-task The each VME-computer communicates through a home­ communication. made network (mini-KOP}. The network interface of a The VERSAdos can generate both hard disk operating VME-computer is composed of a CPU board, memory boards, system and diskless operating system. At 'SD', the hard a serial I/0 board and an RS-232c modem. The bit rate disk operating system is used. On the other hand, all of network is 9600 bps. The scheme is base-band and satellite computers have diskless VERSAdos. token-bus. The token rotation time of the network is The inter-task communication is expanded for about 0.2 second with no data and it depends on the network support by the network server task. In this data length. system, any task can communicate with all tasks in any The maximum data transfer rate depends on the bit computer in the network. rate and is 1kB/second. The maximum number of packet Both Pascal and assembly language system are used transmission per node depends on the token rotation for programming. Pascal is expanded for network support time, about 4 times per second. by a program called 'OBJP'. Fortran is now under test Fig.4 shows the packet frame in the network. In for use in this system. this network, duplicate header method is used for error The programming model by 'OBJP' is shown in fig.5. check of the header. Check-sum method is used for error By the 'OBJP', some routines are built in the task check of the data part. Most of the frames on the automatically, which are as follows, network are with no data and no check-sum part. The data types of the network are categorized as 1} creates an Asynchronous ~ervice gueue of listed in Table 1. One group is for the communication message receive buffer, CPU, the other group is for the main CPU with VERSAdos. 2) "WAIT" for message, New communication program and the VERSAdos which are in 3} selects a subroutine by "message selector", absolute load modules are handled by the communication 4} calls a server for message transmission. CPU (MACR0-6001 of second generation in Fig.3). Application task modules and messages between tasks are When a message arrives at a task, the message transferred from communication CPU to the main CPU comes into the ASQ, then "WAIT" state turns to "RUN" (MVME-130 of second generation in Fig.3} and handled by state.
Load more

Recommended publications
  • EUUGN Vo14 Nol
    5 Registered by Australia Post Publication No. NBG6524 The Australian UNIX* systems User Group Newsletter Volume 5 Number 5 October 1984 CONTENTS Editorial 2 Message from the President 2 Next AUUG Meeting 3 New Magazine 3 Books 4 Nets 7 Next AUUG Meeting - Call for Papers 14 AUUG Meeting in Melbourne - Abstracts 15 Domain Addressing in SUN III 28 From the USENIX Newsletter (;login:) 33 System V Performance Enhancements 36 Trivia Quiz 42 From the EUUG Newsletter 45 Nijmegen Conference Summary 46 Clippings 63 Netnews 66 Minutes of the AUUG General Meeting 76 Final AUUG Constitution 78 Who’s Who 83 AUUG Membership and Subscription Forms 85 Copyright (c) 1984o AUUGN is the journal of the Australian UNIX systems User Group. Copying without fee is permitted provided that copies are not made or distributed for commercial advantage and credit to the source is given. Abstracting with credit is permitted. No other reproduction is permitted without the prior permission of the Australian UNIX systems User Group. UNIX is a trademark of AT&T Bell Laboratories. AUUGN Vol 5 No 5 Editorial Well, finally, the Australian UNIX systems User Group is official. (Hooray) The office-bearers are: John Lions - President Greg Rose - Secretary Chris Maltby - Treasurer Colin Webb - Returning Officer John O’Brien - Assistant Returning Officer James Mann - Auditor The Management Committee consists of the President, the Secretary, the Treasurer and four General members. The General members elected to the Management Committee were: Robert Elz, Ken McDonell, Piers Lauder and Tim Roper I have reproduced the minutes of the meeting and the amended AUUG constitution at the end of this issue, along With the inevitable forms for founding membership, membership and newsletter subscription.
    [Show full text]
  • Systems Integration for the Kennedy Space Center (KSC) Robotics Applications Development Laboratory (RADL)
    The Space Congress® Proceedings 1988 (25th) Heritage - Dedication - Vision Apr 1st, 8:00 AM Systems Integration for the Kennedy Space Center (KSC) Robotics Applications Development Laboratory (RADL) V. L. Davis Ross Nordeen Follow this and additional works at: https://commons.erau.edu/space-congress-proceedings Scholarly Commons Citation Davis, V. L. and Nordeen, Ross, "Systems Integration for the Kennedy Space Center (KSC) Robotics Applications Development Laboratory (RADL)" (1988). The Space Congress® Proceedings. 10. https://commons.erau.edu/space-congress-proceedings/proceedings-1988-25th/session-3/10 This Event is brought to you for free and open access by the Conferences at Scholarly Commons. It has been accepted for inclusion in The Space Congress® Proceedings by an authorized administrator of Scholarly Commons. For more information, please contact [email protected]. Systems Integration for the Kennedy Space Center (KSC) Robotics Applications Development Laboratory (RADL) V. Leon Davis Ross Nordeen INTRODUCTION Robotics technology is a rapidly advancing field moving from applications on repetitive manufacturing processes toward applications of more variable and complex tasks. Current directions of NASA designs for the Space Station and other future spacecraft is moving toward the use of robotics for operational, maintenance and repair functions while the spacecraft is in orbit. These spacecraft systems will eventually require processing through KSC for launch and refurbishment. In the future, KSC will be called on to design ground processing facilities for new generation launch vehicles such as the Heavy Lift Launch Vehicle and the Second Generation Shuttle. The design of these facilities should take advantage of state- of-the-art robotics technology to provide the most efficient and effective vehicle processing.
    [Show full text]
  • RTMPL—A Structured Programming and Documentation Utility for Real- Time Multiprocessor Simulations
    N84-20259 NASA Technical Memorandum 83606 RTMPL—A Structured Programming and Documentation Utility for Real- Time Multiprocessor Simulations Dale J. Arpasi Lewis Research Center Cleveland, Ohio Prepared for the Summer Computer Simulation Conference sponsored by the Society for Computer Simulation Boston, Massachusetts, July 23-25, 1984 rWNSA RTMPL - A STRUCTURED PROGRAMMING AND DOCUMENTATION UTILITY FOR REAL-TIME MULTIPROCESSOR SIMULATIONS Dale J. Arpasi National Aeronautics and Space Administration Lewis Research Center Cleveland, Ohio 44135 ABSTRACT multiprocessor simulation programs. The language and its utility (translator) are targetable to The NASA Lewis Research Center is developing specific simulator architectures, processor-types, and evaluating experimental hardware and software and simulation requirements. To aid in portability systems to help meet future needs for real-time sim- of RTMPL, the utility is written, for the most part, ulations of air-breathing propulsion systems. The in Pascal. Two simple MC68000 assembly language Real-Time Multiprocessor Simulator (RTMPS) project routines are used for special system interfacing. is aimed at developing a prototype simulator system The RTMPL utility functions as an assembly language that uses multiple microprocessors to achieve the programmer, accepting an engineering-level des- desired computing speed and accuracy at relatively cription of the simulation and translating it into low cost. Software utilities are being developed to time-efficient assembler source code. The utility provide engineering-level programming and inter- provides program optimization and diagnostic in- active operation of the simulator. formation to the user via output listings. It also provides operational information to the simulator Two major software development efforts were operating system in the form of database files to undertaken in the RTMPS project.
    [Show full text]
  • Operating System for a Real-Time Multiprocessor Propulsion System Simulator
    -N 84- 20 258 NASA Technical Memorandum 83605 Operating System for a Real-Time Multiprocessor Propulsion System Simulator Gary L. Cole Lewis Research Center Cleveland, Ohio Prepared for the Summer Computer Simulation Conference sponsored by the Society for Computer Simulation Boston, Massachusetts, July 23-25, 1984 NASA OPERATING SYSTEM FOR A REAL-TIME MULTIPROCESSOR PROPULSION SYSTEM SIMULATOR Gary L. Cole National Aeronautics and Space Administration Lewis Research Center Cleveland, Ohio 44135 ABSTRACT Simulations are becoming more sophisticated in terms of the complexity of the systems being modeled The NASA Lewis Research Center is developing and in the level of model details being sought. and evaluating experimental hardware and software Therefore, the computer hardware and associated systems to help meet future needs for real-time, operating systems that are needed to support these high-fidelity simulations of air-breathing propul- simulation efforts, in real time, are also becoming sion systems. Specifically, the Real-Time Multi- more complex. An example is the Real-Time Multipro- processor Simulator project focuses on the use of cessor Simulator (RTMPS) being studied at the NASA multiple microprocessors to achieve the required Lewis Research Center. The objective of the RTMPS computing speed and accuracy at relatively low project is to develop and evaluate experimental cost. Operating systems for such hardware configu- hardware and software systems for real-time inter- rations are generally not available. This paper active simulation of air-breathing propulsion sys- describes Che Real-Time Multiprocessor Operating tems. The RTMPS project is focusing on the use of System (RTMPOS) that has been developed at NASA- multiple microprocessors to achieve the required Lewis.
    [Show full text]
  • Emerson / Motorola MVME130 / MVME131
    Full-service, independent repair center -~ ARTISAN® with experienced engineers and technicians on staff. TECHNOLOGY GROUP ~I We buy your excess, underutilized, and idle equipment along with credit for buybacks and trade-ins. Custom engineering Your definitive source so your equipment works exactly as you specify. for quality pre-owned • Critical and expedited services • Leasing / Rentals/ Demos equipment. • In stock/ Ready-to-ship • !TAR-certified secure asset solutions Expert team I Trust guarantee I 100% satisfaction Artisan Technology Group (217) 352-9330 | [email protected] | artisantg.com All trademarks, brand names, and brands appearing herein are the property o f their respective owners. Find the Emerson / Motorola MVME130 at our website: Click HERE MVME130 MVME131 I VMEmodule 32-Bit Monoboard Microcomputer The VMEmodule 32-bit Monoboard Microcomputer (MVME130) is designed to function in those applications requiring maximum performance while maintaining the ver- satility inherent in VMEmodule systems. Highest performance is attained when the MVME130 is used in conjunction with one or more MVME204 Dual Ported RAM Cards operating CPU as a main memory. The MVME130 is the first VMEmodule The MVME130 uses an MC68020 Microprocessor oper- product to offer the following: ating at a fixed speed of 12.5 MHz. This CPU will eventually operate at 16.67 MHz on the MVME130. The MC68020 is • MC68020 Microprocessor with 32-bit Address and Data the first product within the popular MC68000 family to offer VMEbus Interface external 32-bit address and data paths. With its higher clock • Provision for MC68881 Floating Point Coprocessor (cus- rate, advanced architecture, enhanced addreSSing modes, tomer-supplied option) and on-chip instruction cache, this product offers state-of- • Provision for Demand Paged Virtual Memory Management the-art performance while maintaining software compatibility Board (MMB) Implemented with Gate Array Technology with its widely accepted predecessors.
    [Show full text]
  • Understanding of and Applications for Robot Vision Guidance at KSC
    The Space Congress® Proceedings 1988 (25th) Heritage - Dedication - Vision Apr 1st, 8:00 AM Understanding Of And Applications For Robot Vision Guidance At KSC Lawrence M. Shawaga NASA/Kennedy Space Center, Florida 32899 Follow this and additional works at: https://commons.erau.edu/space-congress-proceedings Scholarly Commons Citation Shawaga, Lawrence M., "Understanding Of And Applications For Robot Vision Guidance At KSC" (1988). The Space Congress® Proceedings. 7. https://commons.erau.edu/space-congress-proceedings/proceedings-1988-25th/session-3/7 This Event is brought to you for free and open access by the Conferences at Scholarly Commons. It has been accepted for inclusion in The Space Congress® Proceedings by an authorized administrator of Scholarly Commons. For more information, please contact [email protected]. UNDERSTANDING OF AND APPLICATIONS FOR ROBOT VISION GUIDANCE AT KSC Lawrence M. Shawaga NASA/Kennedy Space Center Florida 32899 ABSTRACT The primary thrust of robotics at KSC is for the"servicing of Space Shuttle remote umbilical docking functions. In order for this to occur, robots performing servicing operations must be capable of tracking a swaying Orbiter in Six Degrees of Freedom (6-DOF) . Currently, in NASA KSC's Robotic Applications Development Laboratory (RADL) , an ASEA IRB-90 industrial robot is being equipped with a real-time computer vision (hardware and software) system to allow it to track a simulated Orbiter interface (target) in 6-DOF. The real-time computer vision system effectively becomes the eyes for the lab robot, guiding it through a closed loop visual feedback system to move with the simulated Orbiter interface. This paper will address an understanding of this vision guidance system and how it will be applied to remote umbilical servicing at KSC.
    [Show full text]
  • Automatic Malfunction Diagnosis by On-Line Expert System for Underground Mobile Machines Philippe Villeneuve De Janti, Jean-Paul Malet, Marc Lefevre
    Automatic malfunction diagnosis by on-line expert system for underground mobile machines Philippe Villeneuve de Janti, Jean-Paul Malet, Marc Lefevre To cite this version: Philippe Villeneuve de Janti, Jean-Paul Malet, Marc Lefevre. Automatic malfunction diagnosis by on- line expert system for underground mobile machines. 9. International Conference on Coal Research, Oct 1991, Washington DC, United States. pp.77-83. ineris-00971831 HAL Id: ineris-00971831 https://hal-ineris.archives-ouvertes.fr/ineris-00971831 Submitted on 4 Apr 2014 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. AUTOMATIC MALFUNCTION DIAGNOSIS BY ON-LINE EXPERT SYSTEM FOR UNDERGROUND MOBILE MACHINES P. VILLENEUVE de JANTI, JP. MALLET, M. LEFEVRE INERIS (Institut National de l'Environnement Industriel et des Risques) B.P. 2 60550 VERNEÜIL-EN-HALATTE, FRANCE ABSTRACT In many Underground workings, either for mineral production or for creating lines of communicauon, mobile machines have to operate under conditions that are very difficult for personnel and equipment. Problems such äs excessive dust, rock falls, high temperature and humidity, or the presence of an explosive atmosphere are not uncommon. Today, it is possible to monitor such machinery from a surface Station, in real time, using a highiy reliable digital transmission System (developed by INERIS), at distances of up to 10 km from the working.
    [Show full text]
  • I I I I I I I I I I I I I I I I I I $! Comglbins.Com -- Command File to Install 'Comglb' Global Common
    I Report No. SAT88-0002 I I I SPACE STATION I OPEI_AT I NG SYSTEM STUDY I I SUMMARY REPORT I PREPARED FOR NASA I tINDER CONTRACT NAS8-36462 I I PREPARED BY: ALBERT E. HORN I MORRIS C. HARWELL SMITH ADVANCED TECHNOLOGY, INC. I HUNTSVILLE, ALABAMA I I February 1988 I I I I SMITH ADVANCED TECHNOLOGY , INC . I SPACE STATION OPERATING SYSTEM STUDY I SUMMARY REPORT I Page I. OVERVIEW AND SUMMARY .................... 1 I A Purpose and Methodology ................ 1 B Systems Tested .................... 1 C Structure of Report .................. 4 D Benchmark Summary ................... 4 I E Source Code Conventions ............... iI F Conclusions ..................... 13 I. Ada ..................... 13 I 2. Operating Systems ............... 14 II. BENCHMARK SOFTWARE .................... 16 I A. Prime Number .................... 16 B. Floating Point .................... 16 C. Matrix Manipulation ................. 19 I D. Disk Write Timing ................. 20 E. Ada Tasking ..................... 21 I. Ada Rendezvous Response ............ 21 I 2. Ada Two-Task Data Transfer ........ 21 3. Ada Two-Task Data Transfer via Shared Disk 23 F. System Services ................ 23 I. Send/Receive .............. 23 I 2. Process Creation ............. 25 3. Synchronization ............ 26 i III. TEST PROGRAMS ..................... 28 A Multi-Process Timing Test .............. 28 B Ada Multi-tasking Scenario .............. 28 i C VAX High-Level Language Access to System Services . 30 D VAX Alarm Test .................... 30 E Ada "delay" Test ................... 33 i F Ada Task Order Test ................. 33 G Multi-task Time Shared Execution Test ........ 33 I IV. SYSTEM AND COMPILER ANALYSIS ............... 35 A. Ada Terminal Input Analysis ............. 35 B. Foreign Routine Capability ............. 37 I C. I/O Loading Analysis ................. 40 D. Multiple Process Loading Analysis .........
    [Show full text]
  • VME/10 Microcomputer System Overview Manual
    M68KVSOM/D1 VME/10 Microcomputer System Overview Manual QUALITY • PEOPLE • PERFORMANCE M68KVSOM/Dl FEBRUARY 1984 VME/10 MICROCOMPUTER SYSTEM OVERVIEW MANUAL The information in this document has been carefully checked and is believed to be entirely reliable. However, no responsibility is assumed for inaccuracies. Furthermore, Motorola reserves the right to make changes to any products herein to improve reliability, function, or design. Motorola does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights or the rights of others. DEbug, I/Omodule, RMS68K, SYMbug, TENbug, VERSAdos, VMEbus, VMFmodule, and VME/10 are tradercarks of Motorola Inc. SAS! is a tradercark of Shugart Associates. The computer program stored in the Read Only Memory of this device contains material copyrighted by Motorola Inc., first published 1983, and may be used only under a license such as the License For Computer Programs (Article 14) contained in Motorola's Terms and Conditions of Sale, Rev. 1/79. WARNING THIS EQUIPMENT GENERATES, USES, AND CAN RADIATE RADIO FREQUENCY ENERGY AND, IF NOT INSTALLED AND USED IN ACCORDANCE WITH THE INSTRUCTION MANUAL, MAY CAUSE INTERFERENCE TO RADIO COMMUNICATIONS. AS TEMPORARILY PERMITTED BY REGULATION, IT HAS NOT BEEN TESTED FOR COMPLIANCE WITH THE LIMITS FOR CLASS A COMPUTING DEVICES PURSUANT TO SUBPART J OF PART 15 OF FCC RULES, WHICH ARE DESIGNED TO PROVIDE REASONABLE PROTECTION AGAINST SUCH INTERFERENCE. OPERATION OF THIS EQUIPMENT IN A RESIDENTIAL AREA IS LIKELY TO CAUSE INTERFERENCE, IN WHICH CASE THE USER, AT HIS OWN EXPENSE, WILL BE REQUIRED TO TAKE WHATEVER MEASURES MAY BE REQUIRED TO CORRECT THE INTERFERENCE.
    [Show full text]
  • Ffty«O 1*2 *S
    Ffty«o 1*2 *s COMMISSARIAT A l_'ENERGIE ATOMIQUE CENTRE D'ETUDES NUCLEAIRES DE SACLAY CEA-CONF -- 8210 Service de Documentation F9I191 GIF SUR YVETTE CEDEX L4 Rapport DPh-N/Saclay n'2307 THE NEW CONTROL SYSTEM OF THE SACLAY LINEAR ACCELERATOR J.F. Gournay Service de Physique Nucléaire-Accélérateur Linéaire • CEN Saclay, 91191 Gif-sur-Yvette, France Communication présentée à s Conference VEMbus in physics Gsntva ^Switzerland) 7-8 Oct 1985 THE NEW CONTROL SYSTEM OF THE SACLAY LINEAR ACCELERATOR J.F. Gournay, G. Gourcy, F. Carreau, A. Giraud, J. Rouault Service de Physique Nucléaire- Accélérateur Linéaire, CEN Saclay 91191 Gif-sur-Yvette, France A new control system for the Saclay Linear Accelerator designed during the two past years is now in operation. The computer control architecture is based on 3 dedicated VME crates : one crate with a disk-based operating system runs the high level application programs and the database management facilities, another one manages the man- machine communications and the third one interfaces the system to the linac equipments. At the present tine,communications between the VME micro-computers are done through 16 bit parallel links. The software is modular and organized in specific layers, the database is fully distributed. About 90% of the code is written in Fortran. The present status of the system is discussed and the hardware and software developments are described. INTRODUCTION The ALS, in operation since 1969 Cl] » was primarily manually controlled, a computer was introduced into the accelerator control system in 1974 for centralization of informations, automatic surveillance of the main parameters and control of the bean switchyard f-2,3j.
    [Show full text]
  • VLB ARRAY MEMO N<Xjjg
    VLB ARRAY MEMO N<xJjg VLBA Station Computer: Choice of CPU B.G. Clark October 1984 Listed below are what appeared to be the most attractive possibilities for an inexpensive station computer. Following the discussion of the individual vendors is a recomendation of the course we follow for the real-time developement of the VLBA. The material from which this memo was compiled was gathered over the course of several months from July 1984 to the end of September 1984. In such a fast moving industry, some sections will be found to be out of date already. Rather than trying to keep the entire document current, I have not changed my initial draft of any section where the changes would not affect the conclusions drawn. 1. 68K based systems For some years the Motorola 68000 series microprocessors have been hailed as the once and future king. Having no desire to spend effort enthroning this dauphin, I feel we should confine ourselves to systems that are purchasable, off the shelf, NOW. This is somewhat limiting. The currently available computers involve the 68000 and 68010 processors (the difference is primarily in memory handling, and does not impress me as being significant in our application). The 68020 is available as a processor chip (that is, orders are being accepted; deliveries are another matter), but not really as a computer. The big deal about the 68020 is that it comes with a matching chip, also by Motorola, which provides hardware floating point. This is a major plus although various systems houses sell 68K systems with other people's floating point hardware (Masscomp, Sun and Data Sud that I know of).
    [Show full text]
  • Jecel Mattos De Assumpção Jr November 13, 2019
    Smalltalk Computers, Past and Future Jecel Mattos de Assumpção Jr November 13, 2019 Why? Why build Smalltalk computers? Who and How? Who built Smalltalk computers in the past and how did they do it? When? When will you have a Smalltalk computer? Why? Word processors, CAD stations, conventional Raspberry Pi, Merlin, Tektronix 440x specific Von Neumann bottleneck 4 MB/s 8 MB/s Processor Memory Program that accesses 40MB will take 105 seconds seconds Cache memory 14 MB/s 4 MB/s Memory Processor $ Cache 4 times faster than main memory with a 95% hit rate Smalltalk 0 tinyBenchmarks Bytecodes / second high level primitives Sends / second high level primitives Who? 1968: Smalltalk history Alan Kay Flex 1968/1969 Seymour Papert Dynabook Simula I B220 tape format LISP 1.5 Ivan Sutherland's Sketchpad 1973: Xerox Alto Butler Lampson, Chuck Thacker 1978: Notetaker Multiple 8086 processors => kernels Small integers are unboxed Object Table 1979: Dorado 1980: Smalltalk for partner machines Apple Tektronix DEC => Berkeley HP 1981 1982: LSI USP Osvaldo Cristo João Zuffo Takeo Kofuji TG1000 graphics terminal old HP minicomputer VersaBUS modules and VersaDOS 1983: SINDE Supermicro Multiprocessor Unix: - microkernel - no interrupts (but timer) - files on top of virtual memory - dynamic libraries Terminals and Printers 68010 Static 68000 68000 MMU&cache RAM SCSI serial VME bus with modified arbitration 1983: Pegasus (Logo Machine) Jecel & Fábio Cunha 1983: RISC III (SOAR) Smalltalk On A RISC Joan Pendleton, David Ungar, Shing Kong, Will Brown, Frank Dunlap, and Chris Marino Professors David Hodges and David Patterson 1983: RISC III (SOAR) 1983: RISC III (SOAR) Inline caches L Peter Deutsch and Alan Schiffman 1984: Tektronix 4404 (AI Workstation) CPU: 68010@10 MHz + NS32081 FPU RAM: 1 – 4 MB Resolution: 640 x 480 CRT: 13″ HDD: 45 MB FDD: 320 kB Interfaces: RS232C, LAN, SCSI, centronics OS: Unix-like OS Initial price: $14950 1984: Sword32 Sword32 (Katana32) bytecodes ASIC University of Tokyo 1984: Caltech Object Machine (COM) Caltech James T.
    [Show full text]