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Emerson / Motorola M68KVM02 Datasheet

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Emerson / Motorola M68KVM02 Datasheet Full-service, independent repair center -~ ARTISAN® with experienced engineers and technicians on staff. TECHNOLOGY GROUP ~I We buy your excess, underutilized, and idle equipment along with credit for buybacks and trade-ins. Custom engineering Your definitive source so your equipment works exactly as you specify. for quality pre-owned • Critical and expedited services • Leasing / Rentals/ Demos equipment. • In stock/ Ready-to-ship • !TAR-certified secure asset solutions Expert team I Trust guarantee I 100% satisfaction Artisan Technology Group (217) 352-9330 | [email protected] | artisantg.com All trademarks, brand names, and brands appearing herein are the property o f their respective owners. Find the Emerson / Motorola M68KVM02 at our website: Click HERE M6810/11102-3 VERSAmodule — II Monoboard Microcomputer • MC68000 8 MHz 16-bit MPU — 16 32-bit data, address and stack registers — 14 addressing modes —16 megabyte direct addressing range — Memory mapped I/O — 56 powerful instruction types — Operations on five data types including bit, byte, word, long word and BCD • Two multiprotocol serial I/O ports with RS-232C interface selectable for MODEM or terminal use. Asynchronous and — Provides interlock instruction for multiprocessor systems synchronous byte-oriented protocols (including IBM Bi- — 256 multilevel vectored interrupts including exceptions, sync) as well as SDLC and HDLC bit-oriented protocols traps and external interrupts are supported. Internal clock rates strappable from 50 bps — Architecturally optimized for efficient support of high- to 19.2 kbps. External clock rates to 600 kbps supported. level languages. • Three 16-bit programmable timer/counters. All three are • VERSAbus system bus compatibility with bus arbitration cascadable. When not programmed to create an interrupt logic. the timer may be programmed to issue an output to an external device. By jumper selection, time/count inputs can • Local on-board bus for intercommunications between the be connected to: MPU, ROM, RAM, serial I/O and timer/counter resources as well as interface to VERSAbus. — Serial port baud rate clocks • I/O Channel for interfacing off-board resources such as — 2 MHz clock A/D, discrete I/O and parallel I/O to the monoboard — VERSAbus ac line clock microcomputer. — External input • 128K byte Dynamic RAM with shared memory access from • 0° C-70° C operating temperature range local bus and VERSAbus via a dual port controller. Byte parity with automatic retry is a jumper option. RAM may The VM02 VERSAmodule Monoboard Microcomputer is be strapped to operate from VERSAbus +5 Vdc standby a complete microcomputer system-on-a-board. At its heart power for external battery backup. Power fail write inhibit is the powerful microprocessor representing a significant logic is included. advance in 16-bit units — the MC68000. Its architecture is • Two 28-pin sockets for up to 64K bytes of user provided optimized for high-level language support to foster rapid pro- 2, 4, 8, 16 or 32K byte ROM/PROM/EPROM devices. gram development. MOTOROLA 16/32-BIT MICROCOMPUTER SYSTEM COMPONENTS 2-51 M68KVM02-3 The Monoboard Microcomputer in combination with the mation systems. For example, its shared RAM permits effi- VERSAmodule Chassis and Real-time Multitasking Software cient DMA operation with VERSAbus Intelligent Peripheral (RMS68K) provides a complete design environment that Controller (IPC) Modules as well as intercommunications frees the system designer to develop the software required between multiple monoboards and processors in complex for the unique I/O hardware of his application. systems. Figure 1 diagrams the major functional components Many powerful features equip VM02 for application in a of the Monoboard Microcomputer. wide spectrum of industrial automation and general infor- FIGURE 1 — M68KVM02 Block Diagram Reset Abort ) Board Fault ik {Run/Hal Indic. System Indic. Controller Two Sockets for Select ROM/PROM/EPROM System Test Control 128K BYTE Reset Reset Control Dynamic RAM with Byte Panty Status and Control MC68000 MPU Register Dual Port Controller Local Bus L VERSAbus 3 16-Bit VERSAbus I/O Channel 2 Serial Interface VERSAbus Interface I/O Ports Programmable • Address • Data Interrupt Timer/Counters • Control Handler Arbiter • Interrupter P2 VERSAbus P1 I/O Channel Serial I/O Ports An I/O Channel lets small, single function, non-VERSAbus The VM02 serial port 1 and serial port 2 are independent boards be easily added to enlarge the microcomputer func- communication channels each comprising a parallel-to-serial tion. One such board can be directly connected to the conversion section using RS-232 serial drivers and a serial- monoboard itself. Other boards, externally mounted, can ac- to-parallel section using RS-232 serial receivers. cess the I/O Channel from the VERSAbus backplane The Transmit Clock (TXC) input of each port can be con- connectors. These can be connected using up to 12' of nected by jumper selection to the port baud rate generator multidrop ribbon cable. to obtain any of 16 data transmission rates. Or the input can MOTOROLA 16/32-BIT MICROCOMPUTER SYSTEM COMPONENTS 2-52 M68KVM02-3 be synchronized with an external serial receiver via serial base address is PROM configurable on 1K byte boundaries link. Similarly, jumper selected connection of the Receiver within a 256K byte jumper selectable block of VERSAbus Clock (RXC) input to the baud rate generator can provide space. Thus on-board RAM appears as a separate RAM any of 16 data reception rates. Or the rate can be set by board to other modules on the VERSAbus. synchronization with an external transmitter via serial link The 1K byte blocks can be individually configured as• For interfacing at high data rates over longer distances — Local RAM than those provided by RS-232 devices, the TXC and RXC — Shared Read/Write RAM inputs on port 2 are supported at TTL levels permitting use of a user-supplied TTL-to-RS-422 adapter board powered by — Shared Read-Only RAM VM02 via port 2. — Shared Program Write Protectable RAM Both ports are software configurable to support asynchro- RAM blocks configured as local are shielded from VERSAbus nous and synchronous protocols. Synchronous protocols in- access. Blocks configured as shared program-protectable clude monosync and bisync Character Oriented Protocols can be write protected by the on-board processor under pro- (COP) and SDLC and HDLC Bit Oriented Protocols (BOP). gram control via the control register. This feature can provide Parity checking is software selectable for a!I modes and CRC protected operation following an initial bootstrap load. operations are supported for the COP and BOP procotols. All interrupts from the serial ports are routed to the MPU VERSAbus Interface over a single line the priority level of which can be strapped for level six or wire-wrapped for levels 1-5. A serial interrupt VERSAbus is characterized by asynchronous, bidirectional cycle is completed by the MPU causing the dual-ported RAM operation and support of Direct Memory Access (DMA), section to place a program supplied vector number on the multiprocessor operation and the full 16 megabyte address data lines. range of the MC68000 MPU. Design requiring an expanded Several interrupt-causing modes can exist within each port. microcomputer function can utilize the VERSAbus interface The condition-affects-vector mode can be enabled so that to add other resources such as RAM and intelligent I/O con- the port status register can be read to determine the cause trollers. Pins for all address, data, and control lines are pro- of an interrupt. When the mode is disabled, various registers vided in the 140-pin VERSAbus connector, P1. The 120-pin must be examined for the interrupt cause. Interrupt causing connector P2 provides interface to the serial I/O and pro- conditions are cleared via software commands sent to the grammable timer functions and to monoboard microcomputer serial port control register. support of the I/O Channel. Programmable Timer Local Bus On board functional components are interconnected by a Each of the three separate programmable 16-bit timers local bus which is connected to the VERSAbus interface, the within an MC6840 Programmable Timer (PTM) device can I/O Channel interface or one of the serial ports when the on- operate in any of four modes: 16-bit continuous, single shot, board MPU accesses an off-board resource. This feature period measurement or pulse width measurement. Each allows monoboard microcomputer processing to proceed si- timer can be cascaded with another and programmed to use multaneously with the activities of another bus master. the internal or external clock. This PTM versatility equips the VM02 for straightforward application in environments requir- ing pulse generation, interval and period measurement, in- Bus Request dustrial timing control and programmable one-shot functions. Normal access to off-board VERSAbus resources is pro- The timers appear in the VM02 memory map at locations vided the MPU by means of a five-priority-levels bus request F70001 to F7000F. Only the lower bytes are used. method. The monoboard level is strap selectable. For normal access, VERSAbus mastership is gained in one Local Memory of two ways: Jumper selection allows the 28-pin ROM/PROM/EPROM Direct Request - A program can use the VM02 status sockets to be used for 24-pin 2716/2732 devices or 28-pin and control registers to insure bus mastership prior to per- 16K byte and 32K byte devices. Jumper selection of VERSAbus forming a function requiring access to a VERSAbus re- Data Acknowledge (DTACK) response time permits devices source. Bus mastership is retained until released by the of various speeds to be used. Device access times can range program via the status and control register. The direct re- from 0 to 500 ns. quest method permits a board to transfer blocks of data The on-board RAM is fully accessible to the processor via at the maximum rate.
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