Introduction to Nanotechnology and Nanoscience – Class#12
Introduction to Nanotechnology and Nanoscience – Class#12
Liwei Lin
Professor, Dept. of Mechanical Engineering Co-Director, Berkeley Sensor and Actuator Center The University of California, Berkeley, CA94720 e-mail: [email protected] http://www.me.berkeley.edu/~lwlin
Liwei Lin, University of California at Berkeley 1 Outline
Review HW#4 Problem 2 Nanowires Paper #5.1 HW#5 Paper 6 & 6-1
Liwei Lin, University of California at Berkeley 2 ABET Outcomes
a. An ability to apply knowledge of mathematics, science, and engineering b. an ability to design and conduct experiments, as well as to analyze and interpret data e. an ability to identify, formulate, and solve engineering problems f. an understanding of professional and ethical responsibility g. an ability to communicate effectively
Liwei Lin, University of California at Berkeley 3 ABET Outcomes
h. the broad education necessary to understand the impact of engineering solutions in a global, economic, environmental, and societal context i. a recognition of the need for, and an ability to engage in life-long learning j. a knowledge of contemporary issues k. an ability to use the techniques, skills, and modern engineering tools necessary for engineering practice.
Liwei Lin, University of California at Berkeley 4 HW#4, Problem 2
Liwei Lin, University of California at Berkeley 5 Graphene to CNT Unit Cell a : unit vector
Zig-Zag (n,0)
(n,m)
Armchair(n,n)
Liwei Lin, University of California at Berkeley 6 Chiral Vector
Liwei Lin, University of California at Berkeley 7 CNT Structure
Liwei Lin, University of California at Berkeley 8 CNT Structure Equations
Liwei Lin, University of California at Berkeley 9 1D Translation Vector
Liwei Lin, University of California at Berkeley 10 1D Translation Vector Equations
Liwei Lin, University of California at Berkeley 11 Why Nanowires?
• CNTs and semiconducting nanowires promising for use in nano-scale electronic devices • Issues with CNTs o Semiconducting or Metallic o Difficult to select form • Pros of Nanowires o Properties of semiconducting nanowires set by material choice o Wide range of possible materials means a wide range of properties Image courtesy of www.grin.com Microsystems Laboratory Why nanowires? UC-Berkeley, ME Dept.
“They represent the smallest dimension for efficient transport of electrons and excitons, and thus will be used as interconnects and critical devices in nanoelectronics and nano- optoelectronics.” (CM Lieber, Harvard)
General attributes & desired properties Diameter – 10s of nanometers Single crystal formation -- common crystallographic orientation along the nanowire axis Minimal defects within wire Minimal irregularities within nanowire arrays Liwei Lin, University of California at Berkeley 13 Microsystems Laboratory Why Nanowires? UC-Berkeley, ME Dept. Quantum confinement Trap particles and restrict their motion Quantum confinement produces new material behavior/phenomena “Engineer confinement”- control for specific applications Structures Quantum dots (0-D) only confined states, and no freely moving ones Nanowires (1-D) particles travel only along the wire Quantum wells (2-D) confines particles within a thin layer
Liwei Lin, University of California at Berkeley (Scientific American)14 Fundamental Science Semiconductor Metal
Van Hove Singularities 3D 2D 1D 0D
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Energy Liwei Lin, University of California at Berkeley 15 Nanowire Synthesis - Strategies
Template Growth Self-assembly of 0D
VLS (Vapor- Liquid-Solid)
Capping Control Anisotropic Crystal Adapted after Y. Xia et al., Adv. Mat. 15, 353 (2003) Liwei Lin, University of California at Berkeley 16 Microsystems Laboratory UC-Berkeley, ME Dept. Template Assisted Growth
Create a template for nanowires to grow within Based on aluminum’s unique property of self organized pore arrays as a result of anodization to
form alumina (Al2O3) Very high aspect ratios may be achieved Pore diameter and pore packing densities are a function of acid strength and voltage in the anodization step Pore filling – nanowire formation via various physical and chemical deposition methods
Liwei Lin, University of California at Berkeley 17 Microsystems Laboratory UC-Berkeley, ME Dept. Al2O3 Template Preparation Anodization of aluminum Start with uniform layer of ~1m Al Al serves as the anode, Pt may serve as the cathode, and 0.3M oxalic acid is the electrolytic solution Low temperature process (2-50C) 40V is applied Anodization time is a function of sample size and distance between anode and cathode Key Attributes of the process Pore ordering increases with template thickness – pores are more ordered on bottom of template Process always results in nearly uniform diameter pore, but not always ordered pore arrangement Aspect ratios are reduced when process is performed when in contact with substrate (template is ~0.3-3 m thick) Liwei Lin, University of California at Berkeley 18 Microsystems Laboratory UC-Berkeley, ME Dept. The Alumina (Al2O3) Template
(T. Sands/ HEMI group http://www.mse.berkeley.edu/groups/Sands/HEMI/nanoTE.html) alumina template
Si substrate 100nm
(M. Sander) Liwei Lin, University of California at Berkeley 19 Template - Electrodeposition • Alumina, polycarbonate track etched, and silica membranes • 5-10 m thick with pore sizes to 10 nm
S. Nicewarner-Peña, et al., Science 294, 137 (2001) Liwei Lin, University of California at Berkeley 20 CNT-Template
GaN nanorods from MWNTs
2Ga O (g) + nanotube + NH 4GaN + H 0 + 5H + CO 2 3 2 2 W. Han, et al., Science 277, 1287 (1997) TiC nanorods from MWNTs
E. Wong, et al., Chem. Mater., 8, 2041 (1996)
Liwei Lin, University of California at Berkeley 21 Templating vs. Others
Nanoscale structures generated by templating methods are typically not crystalline • Number of defects is larger • Quantum size effects usually not observed • Monodispersity is limited by the structure of template • Free-standing, 1D structures are difficult to obtain
What are the requirements for a general, synthetic approach to nanowires? • Anisotropic growth • Control of catalyst size
Liwei Lin, University of California at Berkeley 22 Vapor-liquid-solid (VLS) Growth
• LV is the liquid-vapor interface free energy, 2 LVLV V is the molar volume of the r L min RT ln liquid, is the vapor phase of super-saturation, R is the gas constant and T is the temperature.
Competing conditions: energy gain of condensation and the energy cost in the interfacial energy.
Equilibrium conditions results in nanowires of order 100 nm or larger.
Liwei Lin, University of California at Berkeley 23 VLS Fabrication
• Vapor-liquid-solid(VLS) o Wagner and Ellic • Semiconductor gas blown over liquid catalyst • Vertical growth due to saturation and condensation of semiconductor material • Temperature greater then eutectic temperature
Image: C.N.R. Rao, F.L Deepak, Gautam Gundiah, A. Govindarah. “Inorganic Nanowires.” Progress in Solid State Chemistry Ostwald Ripening First observed by Wilhelm Ostwald in 1896 • When a phase precipitates out of a solid (or liquid) causing large precipitates to grow, drawing material from the smaller precipitates, which shrink. Larger particles are more energetically favored than smaller particles as their greater volume to surface area ratio, represent a lower energy state. • An everyday example is the re-crystallization of water within ice cream which gives old ice cream a gritty, crunchy texture.
Liwei Lin, University of California at Berkeley 25 Germanium Nanowires
(Temperature above (Temperature below eutectic temperature eutectic temperature of 361C) of 361C)
Schmidt et al, 2007 Sub‐Eutectic Growth
• Euctectic Point o Temp: 361°C o Ge:Au Ratio: 7:18 • It is possible to grow nanowires below eutectic point • Growth via Vapor- Solid-Solid and Vapor-Liquid-Solid processes • Solid and liquid catalysts tips
Image: S. Kodambaka et al. “Germanium Nanowire Growth Below the Eutectic Temperature” VLS Growth: Nanowire fabrication process
• Vapor‐Liquid‐Solid Process
• Usually: Semiconductor material as a gas is absorbed by liquid catalyst nanodroplet e.g. Germanium absorbs onto Gold catalyst
• Catalyst nanodroplets serve as ‘seeds’ for nanowire growth and their size also determines nanowire diameter
• “The semiconductor material condenses at the interface between the droplet and the nanowire, http://pubs.rsc.org/en/content/chapter thereby extending the length of the nanowire.” html/2014/bk9781849738156‐ 00001?isbn=978‐1‐84973‐815‐6 Nanostructure Synthesis
• CVD (Chemical Vapor Deposition) with VLS (Vapor-Liquid-Solid) growth
• Silane (SiH4) - vapor phase reactant • Gold-Palladium (AuPd) - solid phase, metal catalyst • Silicon from the thermal decomposition of silane and AuPd form a liquid alloy at the eutectic temperature of AuPd-Si (high temperature)
29 Vapor-Liquid-Solid Growth
LV is the liquid-vapor interface free energy, 2 LVLV VL is the molar volume rmin of the liquid, is the RT ln vapor phase of super- saturation, R is the gas constant and T is the temperature • Competing conditions: energy gain of condensation and the energy cost in the interfacial energy • Equilibrium conditions results in nanowires of order 100 nm or larger
30 31 CNTs Synthesis Methods
• Arc Discharge Method • Uniform Diameters • Fewest Defects •SW or MWNTs • Highest quality • Gaseous, Laser- Vaporization, Pyrolysis, other CVD • Require high temperature chamber
(Smalley Image Gallery) 32 Nanoscale Assembly
• Synthesis in high temperature tubes • Fluidic self-assembly • Focus-Ion-Beam or E-beam for serial bonding
33 Vapor‐Liquid‐Solid mechanism of single crystal growth. Presenter: Faisal Alrakaf Key Facts
• Silicon whiskers do not contain an axial screw dislocation. • An impurity is essential for whisker growth. • A small globule is present at the tip of the whisker during growth. Using gold as impurity
• Au‐Si alloy droplet is formed. • The alloy acts as a catalyst for the chemical process. • Si enters the liquid and freezes out at the interface between Solid Si and liquid alloy. • By continuing this process, alloy droplet becomes displaced and “rides” atop the growing whisker. Remarks
• Whiskers grow until Au is consumed or growth condition are changed. • Similar results have been obtained using Pt, Ag, Pd, Cu, or Ni. • VLS growth of Si whiskers can occur a wide range of cross‐ sectional area. • The selection of proper impurity for VLS growth depends on: • Formation of liquid alloy at the deposition temperature • Vapor‐liquid‐solid interfacial energies. • Distribution coefficient • Inertness to the reaction products. Applications
• Growth of both filamentary and macroscopic crystals. • Controlled growth can be obtained through appropriate use of impurities. • P‐N junctions and heterojunctions can be made. • Dislocation‐free crystals can be grown. HW#5 - continue
Liwei Lin, University of California at Berkeley 39