Bus Systems for Process Control

physical structure is simplified but the Bus Systems protocol is more complex and includes For Process Control powerful error detection features. R.J. Rausch Multiple controllers The last improvement to the CAMAC CERN, Geneva, Switzerland system was made in 1979 to allow more Associate Member of EPS than one controller in each CAMAC crate, while retaining full compatibility with exis Buses used in large experimental faci which has adapted technical advances to ting modules. Two or more dataway mas lities to communicate between elements meet complex requirements. ters could operate in a crate, and bus mas of control systems have strongly influen tership protocols had to be specified to ced the architecture of these systems Parallel highway ensure orderly sharing of the dataway. over the past 20 years. The buses were CAMAC initially handled the input/out- This new capability (EUR-6500) allowed initially employed in conjunction with put (I/O) needs of the computer to which computing capacity to increase to solve minicomputers for data acquisition and it was connected via an electronic inter critical real-time problems by exporting control applications : today they support face that matched the computer's internal them out of the computer into the a variety of high-speed processors and bus to the electrical specification of the CAMAC crate. powerful control modules on a single CAMAC dataway. The EUR-4100 specifi entity — the data highway. cation thus describes a bus system com Microprocessors The standardization of data highways prising a single master, or controller, and The introduction of microprocessors became necessary when physicists and up to 23 slave modules In a crate with 25 after the original CAMAC specifications engineers realized that general purpose slots for circuit boards. The master acts as were published has greatly enhanced the functions could be implemented as stan an interface module between the compu versatility and performance of CAMAC dard modules plugged onto an agreed ter's I/O bus and the slave modules. Many equipment. A microprocessor can be used dataway. Teams from different laborato different CAMAC slave modules are avai in a module to pre-process data or to ries could then collaborate more efficient lable on the market (e.g. simple I/O or handle a communication protocol bet ly on large experiments, with each team status registers to coincidence selectors ween the module and some external de contributing its know-how and using com and triggers for complicated, high-speed vice. It can also be located in the crate patible material to assemble larger data events). controller used for sequencing and hand acquisition and control systems. The dataway is a parallel highway with ling data in a simple stand-alone system; Complex performance features, new 24 read lines from modules to the control or in a crate which is also connected to a applications and alternative approaches to ler and 24 write lines In the opposite direc parallel or serial highway to perform local bus systems have emerged following the tion. A station address, a sub-address and control or processing and so relieve the early successes of CAMAC, the first wide a function code constitute the CAMAC loads on the computer and on the high ly used parallel bus system. In helping a command. Two dedicated signal lines con way. Finally, the microprocessor can be user select the optimum system from nect each station to the controller: one located in a separate controller module among a profusion of commercial pro addresses the station (either alone or in called an auxiliary crate controller (ACC) ducts, it is useful to consider the impact combination with other stations) and the to act like a local controller or processor. on control system architectures of Eu module uses the other to inform the con rope's three most popular parallel bus troller that it requires attention — a very 8-Bit Microprocessor Buses systems (CAMAC, G64 and VMEbus). useful interrupt capability. The emergence of 8-bit microproces CAMAC Branch highway sors in 1978-79 gave rise to a demand for The standardized bus systems adven A single CAMAC crate connected to a inexpensive, compact, intelligent buses ture started in 1965-66 when European computer soon became insufficient and with CAMAC's modularity in applications high energy physics laboratories estab the relatively high price of minicomputers where CAMAC equipment was not pre lished the CAMAC system definition [1]. justified the simultaneous control of seve sent and where a few I/O signals called for Despite its early specification (in 1969), ral CAMAC crates. One could either con some local processing. Very simple micro CAMAC equipment Is being produced nect several computer-dedicated crate processor buses, usually optimized for a around the world and is still widely used controllers to the I/O bus (if this was elec given type of microprocessor, appeared for data acquisition. CAMAC's major ad trically possible) or use a single interface on the market. vantages are flexibility to build optimized between the computer and a standard Several groups in the early 1980's se systems and the interchangeability of parallel bus onto which several CAMAC lected the G 64 bus system from GESPAC commercial equipment. Existing control crates were branched. A second CAMAC for applications at CERN's LEP accelera systems can thus be easily restructured specification (EUR-4600) describes a tor. It involves a single height Eurocard and upgraded by incorporating more common vertical bus, the CAMAC branch format (100 mm x 160 mm) for the prin powerful modules. It also provides inde highway (BH) linking seven slave CAMAC ted circuit boards and a crate containing a pendence from computer manufacturers crates to a single computer. A BH driver maximum of 10 cards. The dataway uses in that the large capital investment in interface for each major type of computer 64 signal lines to provide 18 address lines, CAMAC for control systems is not lost was then developed to ensure indepen 16 data lines, one interrupt line and when obsolete computers are replaced. dence from manufacturers of electronic memory cycles for the microprocessors. Moreover, CAMAC is a standard bus circuits. Direct memory access (DMA) transfers system, developed "by users for users", are also specified. Serial highway The basic G64 specification has since Raymond Rausch studied physics and electro A CAMAC serial highway has been spe been enhanced to cater for new technical nic engineering at the Conservatoire National cified (EUR-6100) to extend the crate ad needs. The number of cards per crate has des Arts et Métiers, Paris. He has been an dressing capability and the bus length. It been extended to 16 by changing the accelerator controls engineer with CERN, has the form of a loop starting from the dataway line drivers, and a double height Geneva since 1972 after setting up data acqui master controller, connecting up to 62 Eurocard was introduced together with a sition systems at the linear accelerator at the crates and returning to the controller. front panel to facilitate attaching I/O cable CNRS, Orsay. Compared with the branch highway, its connectors. 40 Europhys. News 22 (1991) More than 2000 G64 bus systems are cessor and memory sub-bus; VMS provi SPS used in LEP. Industrial sub-systems are des a serial connection between modules The SPS control system (Fig. 1a) is connected to the LEP control system via a for communications between processors. based on minicomputers, a proprietary G64 crate in which the microprocessor The VMEbus specification aimed to real-time kernel and a software develop acts as a communications protocol con define a dataway to interconnect data pro ment system which became available in verter. The various systems are closely lin cessing, data storage, peripheral control the early 1970's. A system connecting ked to the equipment they control so they devices and network interfaces into a clo numerous minicomputers distributed over can provide autonomous control sequen sely coupled configuration. It is also inten the SPS site (7 km in circumference) had ces, the surveillance and monitoring of ded to allow multiprocessor configura to be developed, even though a standard sub-systems and alarm generation. tions capable of handling data and ad network protocol had not been specified Hierarchically, the G64 systems are dress paths of up to 32 bits, and to adapt and the accelerator's control hardware connected to process control assemblies the Eurocard sub-rack, an existing and was not yet available. (PCA's) that actually drive beam line widely used mechanical standard. The interface to the accelerator equip equipment via buses (MIL-STD-1553-B The essential VMEbus feature is a mul ment was implemented in CAMAC, then protocol). It is also at the level of the G64 tiprocessor bus with 2 to 21 slots for Euro the only international standard. CAMAC bus systems that the real-time operation cards (single or double height). The con crates were interfaced either directly to and synchronization of controls arise. nector of the single height card provides the computer I/O bus via dedicated crate The G64 microprocessors mostly use a 16-bit data, 24-bit address, 7 interrupt controllers or by using the standard simple software kernel and are program lines and all the control lines. The second CAMAC branch and serial highways with med in PASCAL or BASIC languages. The connector available on the double height associated crate controllers. addressing capability (64 Kbyte) of the card adds additional 16-bit data and 8-bit Field buses for equipment were not ava microprocessor used in G 64 is sufficient address. The additional 64 pins on this se ilable so an economic serial bus with for most simple applications.

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