Computer Architecture Basics

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Computer Architecture Basics V03: Computer Architecture Basics Prof. Dr. Anton Gunzinger Supercomputing Systems AG Technoparkstrasse 1 8005 Zürich Telefon: 043 – 456 16 00 Email: gunzinger@scs.ch Web: www.scs.ch Supercomputing Systems AG Phone +41 43 456 16 00 Technopark 1 Fax +41 43 456 16 10 8005 Zürich www.scs.ch Computer Architecture Basic 1. Basic Computer Architecture Diagram 2. Basic Computer Architectures 3. Von Neumann versus Harvard Architecture 4. Computer Performance Measurement 5. Technology Trends 2 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 1.1 Basic Computer Architecture Diagram Sketch the basic computer architecture diagram Describe the functions of the building blocks 3 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 1.2 Basic Computer Architecture Diagram Describe the execution of a single instruction 5 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 2 Basic Computer Architecture 2.1 Sketch an Accumulator Machine 2.2 Sketch a Register Machine 2.3 Sketch a Stack Machine 2.4 Sketch the analysis of computing expression in a Stack Machine 2.5 Write the micro program for an Accumulator, a Register and a Stack Machine for the instruction: C:= A + B and estimate the numbers of cycles 2.6 Write the micro program for an Accumulator, a Register and a Stack Machine for the instruction: C:= (A - B)2 + C and estimate the numbers of cycles 2.7 Compare Accumulator, Register and Stack Machine 7 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 2.1 Accumulator Machine Draw the Accumulator Machine 8 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 2.2 Register Machine Draw the Register Machine 10 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 2.3 Stack Machine Draw a Stack Machine 12 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 2.4 Expression Analysis on a Stack Machine + Expression Term - + Factor - Term ÷ x ident Factor number ) Expression ( 14 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 2.4 Expression Analysis on a Stack Machine Do the calculation 23 5 12 4 / 2 on a stack machine 15 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 2.5 Program Analysis C:= (A + B) Accumulator # Mem Register Machine # Mem Stack # Mem Machine Cycles (CISC) Cycles Machine Cycles 17 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 2.6 Program Analysis C:= (A – B)2 + C Accumulator # Mem Register Machine # Mem Stack # Mem Machine Cycles (CISC) Cycles Machine Cycles 19 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 2.7 Compare Accumulator, Register and Stack Machine Accumulator Register Stack 21 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 3.1 Von Neumann Architecture + single bus + optimum memory allocation program/data + minimum expensive pins - performance Program Memory Data Memory Single bus Control Unit ALU CPU 23 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 3.2 Harvard Architecture + performance - 2 busses - many expensive pins - not optimal memory allocation Program Memory Data Memory Dual bus Control Unit ALU CPU 24 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 4 Computer Performance Measurement (I) Best Practice: Measurement of the execution time of the target program on the target processor Problem: Very expensive measurement Solution: Time measurement of reference programs 25 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 4 Computer Performance (II) Peak Performance (the application can never exceed) MFlops (Million Floating Point Operations per Second) MIPS (Million Integer Operations per Second) MOPS (Million Operations per Second) 26 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 4 Computer Performance Measurement (III) Benchmarks SPEC - Standard Performance Evaluation Corporation - to compare general purpose processors - improvement over ref. platform (SPARC 10) - SPEC int - SPEC fp Linpack - to compare supercomputers - solving linear equation - performance is measured in Gflops Whetstone - synthetic benchmark program - 1 Million instructions - unit: kWips; Mwips Dhrystone - like Whetstone but no floating point 27 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 4 Computer Performance Measurement (III) Benchmarks What you measure is what you get. 28 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5 Technology Trends/ Moore’s Law 1. Moors Law 2. Transistors/Chip 3. Clock 4. Performance 29 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5 .1 Technology Trends/ Moore’s Law 30 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.1 Technology Trends/ Moore’s Law Processor speed: Doubles every 28 months Memory size: Doubles every 12 months Communication speed: Doubles every 6 months (Network) • Key factors processor speed: • Transistor size • Integration density • Clock speed 31 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.2 Technology Trends Transistor Size w/slides/contents/computer.html http://mrsec.wisc.edu/Edetc/SlideSho 32 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.2 Technology Trends Transistor Size Hennessy/ Patterson 2018 33 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.2 Technology Trends Integration Density http://mrsec.wisc.edu/Edetc/SlideShow/slides/contents/computer.html 34 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.3 Technology Trends Clock Speed Road Map 25% of Moore‘s Law through smaller, faster transistors Source: IBM Corporation 2000 35 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.3 Technology Trends Clock Speed Road Map http://www.scidacreview.org/0904/html/multicore.html 36 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.3 Technology Trends Clock Speed Road Map Hennessy/ Patterson 2018 37 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.3 Memory Access Time versus CPU Clock http://www.cs.sandia.gov/Conferences/SOS13/presentations/Klein_Session4.pdf 38 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.3 Power & Bandwith http://www.cs.sandia.gov/Conferences/SOS13/presentations/Klein_Session4.pdf 39 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.3 Technology Trends/ Latency & Bandwidth 40 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.4 Technology Trends Comparisons http://www.scidacreview.org/0904/html/multicore.html 41 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.4 Technology Trends/ Performance 42 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.4 Technology Trends Processor Core Size http://www.scidacreview.org/0904/html/multicore.html 43 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.4 Technology Trends Disk Capacity org/wiki/Moore's_law http://en.wikipedia. 44 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.4 Technology Trends How is Moore’s Law doing? http://mrsec.wisc.edu/Edetc/SlideShow/slides/contents/computer.html 45 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 5.4 Technology Trends CPU vs. GPU http://www.nvidia.com/content/webinar/Tesla_Fermi_Webinar_Jan13_10_v1_1.pdf 46 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 6 World Wide Processor Production (2014) New in 2014 Total [Mio] [Mio] Mobile Phones 1880 7000 Mobile Phones with Internet 2700 Tablets 216 ~700 Standard PC’s 309 ~2300 Server 10 ~50 47 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 6 Worldwide Processor Production (2018) Produced 2018 Total in Use 2018 [Mio] [Mio] Mobile Phones 1’926 8’160 Tablets 173 1’190 Personal PC’s (Desktop/Laptop) 265 1’363 Servers 12 ~60 48 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 6 World Wide Controller Production (2014) Yearly ww wafer production (ø 200 mm) 190 Mio Yearly ww wafer with controllers 72 Mio ARM A9 working processors/ wafer ~ 6000 ww production of controllers ~ 430 Mia Controller per person & year ~ 60 Controllers per second ~ 14k 49 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 6 Worldwide Controller Production Equivalents (2018) Yearly ww wafer production (ø 300 mm) 181 Mio Yearly ww wafers used for controllers/logic 83 Mio ARM A9 working processors/wafer ~ 13’500 ww production of A9-controller equivalents ~ 1’120 Mia Controllers per person & year ~ 145 Controllers per second ~ 35 k 50 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL 7 Processor Cost (2000) Alpha Intel Engineering Cost 20 M$ 100 M$ Production Cost/Proc. 50 $ 100 $ # Processors 100 k 10 M Engineering Cost/Proc. 200 $ 10 $ Total Cost 250 $ 110 $ 51 Zürich 20.09.2019 © by Supercomputing Systems AG CONFIDENTIAL Vision meets reality. Supercomputing Systems AG Phone +41 43 456 16 00 Technopark 1 Fax +41 43 456 16 10 8005 Zürich www.scs.ch.
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