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Solutions Overview 2020 ABOUT At New Wave DV everything we do, we do with the utmost quality, attention, and expertise. We know that when we excel at our job it facilitates our partners to push the boundaries of technology and continue to improve our world. Our team is made up of passionate engineers who have extensive skill designing, building, testing, and delivering electronic systems. We uphold our reputation Solutions for industry-leading products and services through persistent dedication backed by decades of experience. What does New Wave DV “sell”? In short, we provide Overview programmable high-speed, high-bandwidth serial interfaces via off-the-shelf FPGA-based interface boards, IP cores, and custom engineering development. CONTACT New Wave Design and Verification 4950 W 78th St. Minneapolis, MN 55435 USA www.newwavedv.com [email protected] +1 952-224-9201 FPGA-Based Interface and Co-Processor Cards High-Speed Serial FPGA IP Cores Network Appliances Custom Engineering Services IP Cores PMC/XMC Cards Available Pre-loaded on New Wave DV Hardware or Standalone High Density XMC Interface Solutions - Pre-loaded or Standalone PRE-LOADED V1153 Overview Built for rugged FPGA-based high-speed interface and coprocessing requirements, the V1153 is a OR VITA 42 compliant XMC, meeting VITA 20 dimensions for conduction cooling, and meets the VITA STAND-ALONE 47 ECC4 ruggedization for shock, vibration, and operating temperature range of -40° C to +85° C. Capabilities Features Up to eight 25Gbs capable optical ports (or Xilinx UltraScale+ VU3P FPGA twelve 10Gbs capable optical ports) on the Xilinx UltraScale KU095 FPGA Ethernet 1394b - AS5643 front panel and sixteen high-speed links to the One bank of 16GB DDR4 SDRAM backplane. ExpressXG™ PHY 8-lane PCI Express Gen 3 host interface AS5643 PHY layer hardware implementation. Includes Available with a suite of networking IP Complete FPGA design provides Ethernet interface IP, Performs as a low-latency, high-bandwidth standard PHY-Link interface. 1/10/25Gbs Ethernet external memory interfaces, DMA controllers, PCIe interface, interface card, FPGA accelerator card, port 40/100Gbs Ethernet and software drivers. This IP provides out-of-the-box replicator/aggregator, or port mux operation of an FPGA-based Ethernet interface. Easy to add OHCI Link Layer 1/2/4/8/16Gbs Fibre Channel AS5643 OHCI Link layer hardware implementation. Includes custom features for specific applications. Variety of off-the-shelf IP cores to provide 1/2/2.5/4.25/5Gbs sFPDP NEW standard PHY-Link interface and AXI bus for PCIe or a turnkey solution or a base for your custom Aurora (1Gbs-25Gbs) FOR embedded processor interface. interface needs Custom Protocol 2020 Fibre Channel (FC) GP2Lynx Link Layer Link Layer AS5643 GP2Lynx Link layer hardware implementation. Complete layer 1/layer 2 solution for Fibre Channel. Provides Includes standard PHY-Link interface. easy-to-integrate frame interface. Supports rates of 1/2/4/8/16Gbs. Offload Engine Hardware-based full-network stack implementation of Anonymous Subscriber Messaging AS5643. Provides hardware based label lookup, DMA Hardware-based full-network stack implementation of FC- controllers, and message chain engines. F-35 compatible ASM. Provides hardware-based label lookup, DMA controllers, interface mode available. and message chain engines. F-35 compatible interface mode available. Fibre Channel Upper Layer Protocol ARINC 818 Hardware-based full-network stack implementation of ARINC 818 DMA the FC-RDMA and FC-AV protocols. Provides hardware- ARINC 818 interface to processor solution. ARINC based buffer mapping, DMA controllers, and message chain 818-2 specification compliance, hardware-based container engines. F-18/F-15 compatible interface mode available. processing, offload of frame handling including: ARINC-818 Container offload, hardware-based Object processing, V1151 | V1152 V1141 frame building/checking, CRC generation/checking, DMA Up to 12 optical (SFP+/QSFP+) capable of 25Gbs per port Quad SFP+ ports capable of Ethernet or Fibre Channel up to 5 Gbs Serial Front Panel Data Port (sFPDP) controller, and Linux software driver. Xilinx UltraScale KU095 or UltraScale+ VU3P FPGA Supports: Ethernet, Fibre Channel 8-lane PCI Express Gen 3 host interface Supports PCI Express, PCI, and XAUI host interfaces sFPDP Link Layer ARINC 818 Stream Supports: Ethernet, FC, sFPDP, ARINC-818, Aurora, Custom Streaming front-end FPGA core for quick sensor integration Designed to the ANSI/VITA 17.1-2015 specification supporting Built for FPGA-based streaming applications. ARINC VITA 42 compliant XMC form-factor Microsemi SmartFusion2 M2S150 FPGA rates of 1/2/2.5/4/5Gbs. The sFPDP core provides a complete 818-2 specification compliance, hardware-based container hardware implementation of the protocol with an easy-to- processing, offload of frame handling including: ARINC-818 integrate frame interface. Container offload, hardware-based Object processing, frame sFPDP Express building/checking, CRC generation/checking, streaming Complete FPGA design provides sFPDP interface IP to FPGA user interface. ANSI/VITA 17.1-2015 specification supporting rates of 1/2/2.5/4/5Gbs, external memory interfaces, DMA controllers, PCIe interface, and software drivers. This IP provides out-of- Additional Protocols the-box operation of an FPGA-based sFPDP interface. Easy to HOTLink II add custom features for specific applications. Complete layer 2 hardware implementation for HOTLink II. Provides easy to integrate frame interface. Supports full-rate, ½ rate, and ¼ rate operation as specified by the standard. F-18 compatible interface implementation. High Speed Data Bus (HSDB) V1142 | V1144 V1146 Complete PHY and Mac layer hardware implementation Up to 12 transformer-coupled 1394b ports per card Up to 9 transformer-coupled backplane 1394b ports per card for HSDB. Provides easy to integrate frame interface. F-22 Front-panel and back-panel IO options available VITA 20 conduction-cooled compliant form-factor We offer these IP Cores pre-loaded on compatible interface implementation. FPGA-based 1394b AS5643 PHY, Link, and Offload Engine FPGA-based 1394b AS5643 PHY, Link, and Offload Engine National Instruments High Speed Serial PXIe Cards. Microsemi SmartFusion2 M2S150 FPGA Microsemi SmartFusion2 M2S150 FPGA Contact us for more information. Supports PCI Express and PCI host interfaces Supports PCI Express and PCI host interfaces New Wave Design & Verification Tel: +1.952.224.9201 www.newwavedv.com [email protected] New Wave Design & Verification Tel: +1.952.224.9201 www.newwavedv.com [email protected] IP Cores PMC/XMC Cards Available Pre-loaded on New Wave DV Hardware or Standalone High Density XMC Interface Solutions - Pre-loaded or Standalone PRE-LOADED V1153 Overview Built for rugged FPGA-based high-speed interface and coprocessing requirements, the V1153 is a OR VITA 42 compliant XMC, meeting VITA 20 dimensions for conduction cooling, and meets the VITA STAND-ALONE 47 ECC4 ruggedization for shock, vibration, and operating temperature range of -40° C to +85° C. Capabilities Features Up to eight 25Gbs capable optical ports (or Xilinx UltraScale+ VU3P FPGA twelve 10Gbs capable optical ports) on the Xilinx UltraScale KU095 FPGA Ethernet 1394b - AS5643 front panel and sixteen high-speed links to the One bank of 16GB DDR4 SDRAM backplane. ExpressXG™ PHY 8-lane PCI Express Gen 3 host interface AS5643 PHY layer hardware implementation. Includes Available with a suite of networking IP Complete FPGA design provides Ethernet interface IP, Performs as a low-latency, high-bandwidth standard PHY-Link interface. 1/10/25Gbs Ethernet external memory interfaces, DMA controllers, PCIe interface, interface card, FPGA accelerator card, port 40/100Gbs Ethernet and software drivers. This IP provides out-of-the-box replicator/aggregator, or port mux operation of an FPGA-based Ethernet interface. Easy to add OHCI Link Layer 1/2/4/8/16Gbs Fibre Channel AS5643 OHCI Link layer hardware implementation. Includes custom features for specific applications. Variety of off-the-shelf IP cores to provide 1/2/2.5/4.25/5Gbs sFPDP NEW standard PHY-Link interface and AXI bus for PCIe or a turnkey solution or a base for your custom Aurora (1Gbs-25Gbs) FOR embedded processor interface. interface needs Custom Protocol 2020 Fibre Channel (FC) GP2Lynx Link Layer Link Layer AS5643 GP2Lynx Link layer hardware implementation. Complete layer 1/layer 2 solution for Fibre Channel. Provides Includes standard PHY-Link interface. easy-to-integrate frame interface. Supports rates of 1/2/4/8/16Gbs. Offload Engine Hardware-based full-network stack implementation of Anonymous Subscriber Messaging AS5643. Provides hardware based label lookup, DMA Hardware-based full-network stack implementation of FC- controllers, and message chain engines. F-35 compatible ASM. Provides hardware-based label lookup, DMA controllers, interface mode available. and message chain engines. F-35 compatible interface mode available. Fibre Channel Upper Layer Protocol ARINC 818 Hardware-based full-network stack implementation of ARINC 818 DMA the FC-RDMA and FC-AV protocols. Provides hardware- ARINC 818 interface to processor solution. ARINC based buffer mapping, DMA controllers, and message chain 818-2 specification compliance, hardware-based container engines. F-18/F-15 compatible interface mode available. processing, offload of frame handling including: ARINC-818 Container offload, hardware-based Object processing, V1151 | V1152 V1141 frame building/checking, CRC generation/checking, DMA Up to 12 optical (SFP+/QSFP+) capable of 25Gbs per port Quad SFP+ ports capable of Ethernet or Fibre Channel up to 5 Gbs Serial Front Panel Data Port (sFPDP) controller, and Linux software driver. Xilinx UltraScale KU095 or UltraScale+ VU3P FPGA Supports: Ethernet, Fibre Channel 8-lane PCI Express Gen 3 host interface Supports PCI Express, PCI, and XAUI host interfaces sFPDP Link Layer ARINC 818 Stream Supports: Ethernet, FC, sFPDP, ARINC-818, Aurora, Custom Streaming front-end FPGA core for quick sensor integration Designed to the ANSI/VITA 17.1-2015 specification supporting Built for FPGA-based streaming applications. ARINC VITA 42 compliant XMC form-factor Microsemi SmartFusion2 M2S150 FPGA rates of 1/2/2.5/4/5Gbs.
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