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Serial Front Panel Data Port (FPDP) Draft Standard VITA 17.1 – 199X

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Serial Front Panel Data Port (FPDP) Draft Standard VITA 17.1 – 199X Serial Front Panel Data Port (FPDP) Draft Standard VITA 17.1 – 199x Draft 0.6 January 30, 2002 This draft standard is being prepared by the VITA Standards Organization (VSO) and is unapproved. Do not specify or claim conformance to this draft standard. VSO is the Public Domain Administrator of this draft standard and guards the contents from change except by sanctioned meetings of the task group under due process. VITA Standards Organization 7825 East Gelding Drive, Suite 104 Scottsdale, AZ 85260 Ph: 602-951-8866 Fx: 602-951-0720 URL: http://www.vita.com Table of Contents Chapter 1- Introduction..........................................................................................................................5 1.1 Standard Terminology.............................................................................................................5 Chapter 2 - Scope and Purpose.............................................................................................................7 2.1 Scope ......................................................................................................................................7 2.2 Purpose ...................................................................................................................................7 2.3 References ..............................................................................................................................7 Chapter 3 ..............................................................................................................................................8 Chapter 4 - Overview ............................................................................................................................9 4.1 General....................................................................................................................................9 Chapter 5 - Background.......................................................................................................................11 5.1 Parallel FPDP Signals............................................................................................................11 5.2 Parallel FPDP Frame Structure..............................................................................................13 Chapter 6 - System Specifications.......................................................................................................15 6.1 Serial FPDP System Configurations.......................................................................................15 6.1.1 Basic Serial FPDP Configuration .....................................................................................16 6.1.2 Flow Control (Optional)....................................................................................................16 6.1.3 Bi-directional Data Flow (Optional) ..................................................................................18 6.1.4 Copy Mode (Optional)......................................................................................................19 6.1.5 Copy/Loop Mode (Optional).............................................................................................21 Chapter 7 - Link Specifications............................................................................................................23 7.1 Overview ...............................................................................................................................23 7.2 Link Bandwidth.......................................................................................................................23 7.3 Serial FPDP Transmission Frames ........................................................................................24 7.3.1 8B/10B Encoding / Decoding ...........................................................................................24 7.3.2 Serial FPDP Control Signals............................................................................................26 7.3.3 Fiber Frames...................................................................................................................27 Chapter 8 - Physical Specifications .....................................................................................................33 8.1 Link Interface .........................................................................................................................33 Appendix A - Interoperability Issues.....................................................................................................34 List of Figures Figure 4-1 Typical Parallel FPDP to Serial FPDP Application................................................................9 Figure 4-2 Serial FPDP Bi-directional Example ...................................................................................10 Figure 6-1 Basic Serial FPDP system configuration.............................................................................16 Figure 6-2 Serial FPDP with Flow Control............................................................................................16 Figure 6-3 Bi-directional Serial FPDP Link...........................................................................................18 Figure 6-4 Serial FPDP Copy Mode.....................................................................................................19 Figure 6-5 Serial FPDP Copy/Loop Mode ...........................................................................................21 Figure 7-1 Typical Serial FPDP Process ..............................................................................................23 Figure 7-2 Serial FPDP Fiber Frames ................................................................................................28 List of Tables Table 5-1 Parallel FPDP Signals .........................................................................................................12 Table 7-1 Fibre Channel to Serial FPDP Ordered Sets.........................................................................25 Table 8-1 Media Interfaces..................................................................................................................33 Do not specify or claim conformance to this draft standard Serial FPDP, VITA 17.1 – 199x/Draft 0.6 2 January 30, 2002 Abstract This standard defines “Serial FPDP”, a high-speed low-latency serial communications protocol for use in high-speed data transfer applications, typically using a fiber optic link. As the name implies, it is directly related to Standard Front Panel Data Port (FPDP), deriving its serial protocol from the defined protocol and control signals of FPDP. Serial FPDP currently supports two link speeds, 1.0625 Gbaud and 2.5 Gbaud. These two link speeds can support data transfer rates in excess of 105 MBps and 245 MBps respectively. Comments, Corrections, Additions Currently, all comments, corrections, or additions should be addressed to: Ron Taulton Systran Corporation 4126 Linden Ave. Dayton, OH 45432-3068 Ph: 937-252-5601 x231 Fax: 937-258-2729 email: [email protected] Draft History Draft Date Comments Number D0.1 July 21, 1999 Preliminary Draft. D0.2 September 22, 1999 Total Revision. D0.3 February 24, 2000 Minor modifications. Changed designation from VITA 33 to VITA 17.1. Provided to VITA web site. D0.4 November 10, 2000 Detailed Update (not Published on VITA Website). D0.5 February 26,2001 Detailed Update to include submitted comments. D0.6 January 28,2002 Inclusion of comments and changes suggested by task group. Expanded copy and copy/loop sections to include a requirement for a copy or copy/loop master mode – adding idles to allow for receive and re-transmit clock differences. Do not specify or claim conformance to this draft standard Serial FPDP, VITA 17.1 – 199x/Draft 0.6 3 January 30, 2002 Task Group Members The VITA-17.1 Task Group consists of the following members: First Last Company email address Status Tom Bohman VMETRO [email protected] Sponsor Danny Cohen Sun [email protected] Participant Richard Jaenicke Mercury Computer Systems, Inc. [email protected] Participant Jonathan Jones Interactive Circuits & Systems [email protected] Sponsor Jim Koser FCI/Berg Electronics [email protected] Participant Tony Lavely Mercury Computer Systems, Inc. [email protected] Participant Mike Macpherson MITRE [email protected] Observer Stephen Paavola SKY Computers, Inc. [email protected] Participant Elwood Parsons AMP [email protected] Observer Doug Patterson VISTA Controls Corporation [email protected] Observer Greg Rocco Mercury Computer Systems, Inc. Observer John Rynearson VITA [email protected] Participant Ron Seese Chrislin Industries, Inc. [email protected] Observer Hermann Strass Technology Consulting [email protected] Participant Ron Taulton Systran Corporation [email protected] Sponsor Larry Thompson Naval Surface Warfare Center [email protected] Observer Istvan Vadasz Force Computers [email protected] Observer Do not specify or claim conformance to this draft standard Serial FPDP, VITA 17.1 – 199x/Draft 0.6 4 January 30, 2002 Chapter 1- Introduction Serial FPDP is a high-speed low-latency data-streaming serial communications protocol for use in high- speed real-time data transfer applications. It currently is defined to operate at two distinct link speeds, 1.0625 Gbaud and 2.5 Gbaud – with sustained data rates in excess of 105 and 245 Mbytes/sec. respectively. Serial FPDP can also operate over long distances (up to 10 kilometers) using fiber optic cable. 1.1 Standard
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