ELCT 705 : Semiconductor Technology

Lecture 01: Introduction

Assoc. Prof. Dr. Mohamed Ragaa Balboul

Department of Electronic and Electrical Engineering Complementary Metal Oxide Semiconductor (CMOS) CMOS is a technology for constructing IC’s. This technology is used in microprocessors, microcontrollers, RAM, and other digital logic circuits. Microprocessor

Microcontroller

RAM Information Age

The ability of fabricate tens of millions of individual components (transistors, resistors, capacitors, etc.) on a silicon chip with an area of a few cm2 has enabled the information age. Shrinking geometries permit more devices to be placed in a given are of silicon. It is widely expected that these historical trends will continue for at least another 10-20 years, resulting in Chips that contain billions of components. Moore’s Law

Feature Size

100µm

10µm Cell dimensions

1µm

130 nm in 2002 0.1µm

10nm Transition Region

Atomic dimensions 1nm Quantum Effects Dominate

Atomic Dimensions 0.1nm 1960 1980 2000 2020 2040 Year 1 nanometre = 1×10−9 m 1 micrometre = 1×10−6 m Moore’s Law

Feature Size

100µm

10µm Cell dimensions

1µm How long can the historical trends of shrinking 130 nm in 2002 0.1µm transistors and increasing chip complexity continue???

10nm Transition Region

Atomic dimensions 1nm Quantum Effects Dominate

Atomic Dimensions 0.1nm 1960 1980 2000 2020 2040 Year 1 nanometre = 1×10−9 m 1 micrometre = 1×10−6 m Moore’s Law

While there is still disagreement about the exact answers to these questions, it is clear that quantum mechanical effects will important when device dimensions reach 10 or 20 nanometers Gate oxides in MOS devices likely cannot be shrunk below about 1 – 1.5 nm because electrons can easily tunnel through such thin insulators. At these dimensions, it is very difficult to keep the depletion regions associated with PN junction from interacting with each other. Defects during the manufacturing process (a single defect larger than some critical size usually means that the chip will not function correctly) Manufacturing IC requires low defect densities (Ultra clean facilities) Clean Rooms Historical Perspective The First Transistor from Bell Labs

Bell Laboratories in 1947 Jack Kilby’s First Integrated Circuit

Texas Instruments in 1958 Historical Perspective

A single crystal of silicon or germanium is grown which contained a thin region (P-type) of opposite doping to the main part of the crystal. Single crystals provide stable, uniform and reproducible device characteristic.

N N

P P N N

N

N P N P

N

Grown junction transistor technology of the 1950s Historical Perspective

The alloy junction technology illustrated in Figure was even simpler. A metal such as indium was placed on the S.C. (usually Ge). The structure was then heated, melting the In and allowing it to dissolve into the Ge. Indium is a P-type dopant so P regions were formed creating a PNP structure along with contacts to the P regions.

In

N N

In

P N N P

Alloy junction technology of the 1950s Historical Perspective

Part of the solution was provided by the invention of gas phase diffusion processes. Beginning with an N-type crystal, the wafer was exposed in a high temperature furnace to a gaseous source of a P-type dopant such as boron. The boron diffused into the crystal by solid state diffusion, resulting in the P-type layer. The process was then repeated with an N-type source, producing the final NPN structure.

N N P

N

P

N N P

N N P

N Double diffused mesa transistor technology of 1957 Historical Perspective

The planar process relied on the gas phase diffusion of dopants to produce N- and P-type regions, but also on the ability of SiO2 to mask these diffusions. This was a major advance and it was largely responsible for the switch from Ge to Si.

SiO2

N P

N

N

N P

N P

N

How a processor is made today? Sand 1- Sand. Made up of 25 percent silicon, is, after oxygen, the second most chemical element that’s in the earth’s crust. Sand, especially quartz, has high percentages

of silicon in the form of silicon dioxide (SiO2) and is the base ingredient for semiconductor manufacturing. Silicon 2-After separating the silicon, it is purified in multiple steps to finally reach S.C. manufacturing quality which is called electronic grade silicon (poly-crystal). The resulting purity is so great that it may only have one alien atom for every one billion silicon atoms. Silicon Wafer fabrication 3-After the purification process, the silicon enters the melting phase. A mono- crystal ingot is produced from electronic grade silicon. One ingot weighs approximately 100 kilograms (or 220 pounds) and has a silicon purity of 99.9999 percent. Single Crystal Silicon Wafer 4-The ingot is then moved onto the slicing phase where individual silicon discs, called wafers, are sliced thin. Several different diameters of ingots exist depending on the required wafer size. Today, CPUs are commonly made on 300 mm wafers. Once cut, the wafers are polished until they have flawless, mirror-smooth surfaces. Lithography 5-The blue liquid is a photo resist finish similar to those used in film for photography. The wafer spins during this step to allow an evenly-distributed coating that’s smooth and also very thin. At this stage, the photo-resistant finish is exposed to ultra violet (UV) light. The chemical reaction triggered by the UV light is similar to what happens to film material in a camera the moment you press the shutter button. etching 6-The exposure is done using masks that act like stencils. When used with UV light, masks create the various circuit patterns. This process over and over until multiple layers are stacked on top of each other. Thin film deposition 7- After being exposed to UV light, the exposed blue photo resist areas are completely dissolved by a solvent. This reveals a pattern of photo resist made by the mask. Areas that were exposed will be etched away with chemicals. Doping (ion implantation) 8- Through a process called ion implantation (doping) the exposed areas of the silicon wafer are bombarded with ions. Ions are implanted in the silicon wafer to alter the way silicon in these areas conduct electricity. Ions are propelled onto the surface of the wafer at very high velocities. How a Processor is made ? 9- The wafers are put into a copper sulphate solution at this stage. Copper ions are deposited onto the transistor through a process called electroplating. The copper ions travel from the positive terminal (anode) to the negative terminal (cathode) which is represented by the wafer. How a Processor is made ? 10-The copper ions settle as a thin layer on the wafer surface. The excess material is polished off leaving a very thin layer of copper. Multiple metal layers are created to interconnects (think wires) in between the various transistors. How a Processor is made ? 11- This fraction of a ready wafer is being put through a first functionality test. In this stage test patterns are fed into every single chip and the response from the chip monitored and compared to “the right answer.” How a Processor is made ? 12-The dies that responded with the right answer to the test pattern will be put forward for the next step (packaging). Top View of Silicon Wafer with Chips

A single integrated circuit, also known as a die, chip, and microchip Course Outline This course is basically about silicon chip fabrication, the technologies used to manufacture integrated circuit (IC).

Describe the flow of the CMOS process and its steps. Crystal growth, wafer fabrication and basic properties of silicon wafer.

Thermal oxidation and the Si/SiO2 interface. Ion implantation (doping). Etching. Thin film deposition methods. Textbook

J.D. Plummer, M.D. Deal, P.B. Griffin (2004). Silicon VLSI Technology: Fundamentals, Practice and Modeling, Prentice Hall, ISBN 0-13-085037-3. Prerequisites

ELCT 503: Semiconductors

Semiconductor Devices Intrinsic semiconductor Extrinsic Semiconductor PN diode MOS transistor Bipolar junction transistor