A Reconfigurable Smart Interface Based on IEEE 1451 and Field

Research Article

International Journal of Distributed Sensor Networks 2017, Vol. 13(2) A reconfigurable smart interface based Ó The Author(s) 2017 DOI: 10.1177/1550147717693848 on IEEE 1451 and field programmable journals.sagepub.com/home/ijdsn gate array for multiple Internet of Things devices

Shulong Wang1,2, Yibin Hou1,2,FangGao1,2 and Xinrong Ji1,2

Abstract The Internet of Things is becoming increasingly important in traffic, medical treatment, and other industry fields. With the development of the Internet of Things technology, lots of new ‘‘things’’ need to be accessed to the Internet of Things. Currently, Internet of Things applications adopt multiple methods to access the heterogeneous devices. How to provide unified access means for those ‘‘things’’ is a fundamental issue. To solve this problem, a new method is proposed in this article to design a reconfigurable smart interface for multiple Internet of Things devices. The IEEE 1451 standard is adopted for this design, and it comprehensively specifies the smart transducer design and relevant interface protocol to implement the intelligent acquisition for common sensors and actuators. Field programmable gate array is adopted for the implementation of this design to reduce consumption of resources and enable the reconfiguration of the whole system. Performance of the proposed system is evaluated, and good performance is achieved in practical application for office environment monitoring.

Keywords Internet of Things, IEEE 1451, field programmable gate array, sensor, actuator

Date received: 20 July 2016; accepted: 17 January 2017

Academic Editor: Jayavardhana Gubbi

Introduction intelligent identification, positioning, tracking, monitoring, and management.1,2 The Internet of Things (IoT) was first proposed to IoT is a major drive to support service composition study radio frequency identification (RFID) by with various applications.3 The architecture of IoT is Ashton, Professor of the MIT Auto-ID Center in 1999. illustrated in Figure 1. It consists of three layers: With the technological development, the concept is constantly updated. The well-established concept was proposed by the International Telecommunication 1Beijing Advanced Innovation Center for Future Internet Technology, Union on the ITU Internet Report, which was given as Beijing University of Technology, Beijing, China two-dimensional code reading equipment, RFID 2Beijing Engineering Research Center for IoT Software and Systems, devices, infrared sensors, global positioning system Beijing University of Technology, Beijing, China (GPS), and laser scanners, and other information sensing device, according to the agreed protocol, connect Corresponding author: Yibin Hou, Beijing Advanced Innovation Center for Future Internet to any object under the Internet for information Technology, Beijing University of Technology, Beijing 100124, China. exchange and communication, in order to achieve Email: [email protected]

Creative Commons CC-BY: This article is distributed under the terms of the Creative Commons Attribution 3.0 License (http://www.creativecommons.org/licenses/by/3.0/) which permits any use, reproduction and distribution of the work without further permission provided the original work is attributed as specified on the SAGE and Open Access pages (http://www.uk.sagepub.com/aboutus/ openaccess.htm). 2 International Journal of Distributed Sensor Networks

Figure 1. Architecture of IoT. perception layer, network layer, and application layer. cameras. According to the transmission rate, these con- For the perception layer, various sensors, actuators, nected devices are classified into low-speed and high- RFID tags, and other ‘‘things’’ are connected to the speed equipment. Typically, kinds of sensors, actuators, IoT with specific interfaces.4 Network layer is responsi- and RTC belong to the low-speed equipment, while ble to establish the communication between ‘‘things’’ hard disk and camera belong to the high-speed and humans. Currently, Ethernet and wireless local equipment. area networks (WLAN) are widely used in different To address the heterogeneity problem of device application environments of IoT, and some new com- interfaces, there are a lot of systems and interface munication technologies such as narrow band Internet equipment available on the market.6–8 However, most of Things (NB-IoT) are becoming more and more pop- of them work in a specialized environment and access ular. For application layer, various applications and limited number of devices with specialized interfaces. business functions are realized for different purposes, Furthermore, the systems or interface equipment could such as intelligent transportation, green agriculture, not be reconfigured or reused for other applications, and wise medical and smart home. which result in a serious waste of resources. To deal Compared with the Internet which has realized the with this problem and provide a unified interface, the communication between computers and smart devices, Institute of Electrical and Electronic Engineers (IEEE) IoT mainly enables the ‘‘things’’ to talk to each other. has launched IEEE 1451 Smart Transducer Interface Those ‘‘things’’ work as the antenna of the IoT huge Standards protocol. This protocol defines a series of system and form the foundation of the various intelli- specifications from sensor and actuator interface defini- gent applications.5 How to realize the unified access to tion to data acquisition, and it not only allows for the the IoT for various ‘‘things’’ is a fundamental and key development of smart sensors and actuators but also issue. leads to uniform industrial standards.9 Kumar and With the rapid development of IoT technology, a Hancke10 have presented a low-cost and energy- large number of devices and equipment join the differ- efficient prototype of a smart comfort sensing (SCS) ent application areas of IoT: intelligent transportation, system–based IEEE 1451 for the real-time monitoring green agriculture, wise medical, smart home, and so on. of thermal and air quality comforts in situ. Song and Among these devices, different interfaces are adopted Lee11 have proposed a smart transducer web services between each other. As shown in Figure 2, the univer- (STWS) prototype system based on IEEE 1451, and sal asynchronous receiver transmitter (UART), general standardized way for sensor applications to access and purpose input output (GPIO), and other point-to-point interoperate with IEEE 1451 smart transducers was dis- interfaces are usually adopted by sensors and actuators. cussed in detail. However, the devices with this protocol The controller area network (CAN), inter-integrated are still not widely deployed in real IoT environment.12 circuit (IIC), universal serial bus (USB), and other bus For these existing works, most of them could only interfaces are the common interfaces of on-board units access limited types of sensors and actuators for specific (OBU), real-time clock (RTC), and hard disk. ZigBee, domains. The main reason lies in the high resource cost Ethernet, and other kinds of net interfaces are usually and complexity for adopting the protocol. Typically, it used to connect wireless sensor nodes and digital needs to deploy two physical processors to handle the Wang et al. 3

GPS URAT

Sensors Point-to-point Actuators GPIO

Low-speed RFID Other

OBU CAN

Interfaces Devices RTC IIC Bus

Hard Disk USB

Bluetooth Bluetooth High-speed Modules Wireless Zig Bee Sensor Nodes Net

Cameras Ethernet

Figure 2. Devices and interfaces in IoT. whole system, while the present system usually only Analysis of IEEE 1451 and FPGA takes one. In addition, the protocol focuses on those In this section, the key technologies applied in the pro- low-speed devices in IoT such as sensors, actuators, posed design are analyzed and summarized in detail. and transducers, while ignoring other high-speed devices or equipment. To solve the above problem, field programmable IEEE 1451 standard gate array (FPGA) seems to be a good solution. First, compared with the micro control unit (MCU), FPGA To solve the problem that the current sensor bus inter- can be configured to be multi-core processors and faces are not compatible with each other, the IEEE deployed to process different modules in the whole sys- launched the IEEE 1451 standard to provide unified tem. Besides, FPGA can support various low-speed and sensor interfaces. The family of this standard defines a high-speed interfaces through custom-designed intellec- set of common communication interfaces to connect tual property (IP) core. With the characteristics of smart transducers to microprocessor-based systems, re-programmability, the system implemented by FPGA instruments, and networks in a network-independent can be reused and extended for other applications. environment. The main objectives of this standard are By focusing on these issues, this article designs and as follows: implements a reconfigurable smart interface for multiple IoT devices. This design adopts FPGA to imple- To enable plug and play at the transducer (sen- ment the whole system with re-programmability. With sor or actuator) level by providing a common IEEE 1451 standard, the design can support various communication interface for transducers; transducers for data acquisition and control. By taking To enable and simplify the creation of networked full advantage of IP core, this design can also support smart transducers; other devices in IoT. With this design, the system could To facilitate the support of multiple networks. access various kinds of devices such as sensors, actuators, and other high-speed devices with flexibility and The IEEE 1451 standard divides the parts of a sys- expansibility, and the hardware system including multi- tem into two general categories of devices: the network core processors and various IP cores could be imple- capable application processor (NCAP) and the trans- mented in a single chip with low power consumption. ducer interface module (TIM), which are connected by The rest of this article is organized as follows. The a transducer-independent interface (TII). NCAP, which analysis of IEEE 1451 and FPGA is presented in sec- works as a network node, performs data processing tion ‘‘Analysis of IEEE 1451 and FPGA.’’ The overall and network communication functions, whereas TIM architecture of this design is proposed in section consists of a number of sensors, actuators, and signal ‘‘Architecture overview,’’ and the detailed implementa- conditioning units. The TII defines a communication tion of hardware and software is described in section medium and a protocol for transferring the commands ‘‘Implementation.’’ Typical application of ‘‘smart and sensor information between NCAP and TIM. As office’’ is discussed in section ‘‘Application in office shown in Figure 3, the IEEE 1451 standard defines a environment monitoring.’’ Finally, we conclude our set of protocols for wired and wireless distributed work in section ‘‘Conclusion.’’ applications. The IEEE 1451.0 is the overview of the 4 International Journal of Distributed Sensor Networks

The IEEE 1451 standard defines a complete set of Analog/mixed TEDS specifications for sensors, actuators, and transducers in IEEE 1451.4 T ransducer IoT, but the devices with this protocol still have no Point-to-point attractions for customers on the market. The main rea- TEDS NCAP IEEE 1451.2 TII son is the high resource cost and complexity for adopt- T ransducer ing the protocol. Normally, it needs two physical Multi-point Bus TEDS processors for NCAP module and TIM module, as well IEEE 1451.3 BUS T ransducer as the 10-line TII interface is also difficult to be imple- Wireless 13 Wirele TEDS mented. With the continuous development of IoT IEEE IEEE IEEE 1451.5 ss T ransducer applications, the IEEE 1451 is no longer suitable to 1451.1 1451.0 Common Functions CAN open handle the novel high-speed devices, such as digital CAN TEDS Object And IEEE 1451.6 Open camera and USB devices. Taking all the above factors Model TEDS T ransducer RFID into consideration, a unified smart interface for multi- TEDS IEEE 1451.7 RFID ple IoT devices is in strong demand. T ransducer

Figure 3. IEEE 1451 family of standards. FPGA FPGA is the latest programmable product developing from programmable array logic (PAL), generic array logic (GAL), and complex programmable logic device (CPLD).14 It is implemented as semi-custom circuits in a field of application-specific integrated circuit (ASIC). As shown in Figure 4, it consists of input–output block (IOB), configurable logic block (CLB), block random access memory (BRAM), digital clock management (DCM), embedded function unit, embedded specialized core, and rich routing resources. Through FPGA, various complicated hardware systems with power comput- ing performance can be implemented just in single chip which can also be reconfigurable. Compared with CPLD which is implemented by 15 Figure 4. Internal structure of FPGA chip. combinational circuit, FPGA is composed of the lookup table (LUT). This leads to an essential differ- ence between them. For example, FPGA could inte- entire family of standard and defines a common set of grate from hundreds of thousands to millions of logical commands, an electronic data sheet format, and com- gates in a single chip, while CPLD could only reach munication protocols. IEEE 1451.1 defines the beha- tens of thousands. Also, the FPGA could be reconfi- vior of the NCAP using object-oriented model and gurable much more times than CPLD with Flash or stipulates some general modules, communication pro- electrically erasable programmable read-only memory tocol, and transducer electronic data sheet (TEDS). By (EEPROM). In terms of power utilization, the power defining the smart transducer software interface specifi- consumption of CPLD is typically higher than FPGA cation between different networks, the IEEE 1451.1 due to the technical process. can enhance the interoperability among the IEEE 1451 Compared with traditional advanced RISC machine family of standards. The different interfaces between (ARM), MCU, and digital signal processor (DSP),16,17 NCAP and TIM are defined by the IEEE 1451.2 (point FPGA can directly implement double or more cores on to point interface), IEEE 1451.3 (multi-point bus inter- single chip with limited resources for implementation face), IEEE 1451.4 (mixed interface), IEEE 1451.5 of IEEE 1451. Meanwhile, IP cores can be designed to (wireless interface), IEEE 1451.6 (CAN open interface), implement all kinds of functional units and interfaces. and IEEE 1451.7 (RFID interface). In practice, a vari- Specifically, the soft core could be used to handle TIM ety of communication technologies could be used as the module, the embedded hardcore could be used to han- specific interface. Typically, the point-to-point interface dle the NCAP module, and the TEDS could be stored of IEEE 1451.2 could be made with TII, UART, and in BRAM. Based on the above characteristics, FPGA USB, and the Wi-Fi, Bluetooth, and ZigBee could real- comes to an efficient way to implement the IEEE 1451 ize the wireless interface for IEEE 1451.5. standard. Wang et al. 5

Figure 5. Architecture of the smart interface.

Architecture overview communication. With this design, the address logic module can greatly reduce the workload of data acqui- In this section, a reconfigurable smart interface device sition for main controller, which makes the whole sys- is designed for data acquisition, processing, storage, tem more efficient and low power. and transmission. The interface device is able to access In this design, the interface device collects analog various low-speed devices such as sensors and actua- and digital signals from kinds of sensors as well as tors, as well as high-speed devices such as camera, and transmits analog and digital signals to actuators. For hard disk. It can be widely used in different areas of the this, the analog-to-digital (ADC) converter and digital- IoT environment for real-time monitoring, data acqui- to-analog (DAC) converter are implemented for signal sition, and device control. conversion between digital and analog. All the data col- On a single FPGA chip, all kinds of IP cores are lected by smart transducer interface module (STIM) designed to implement a set of sensors and actuator will be transmitted to the NCAP module via TII and interfaces according to the IEEE 1451 standard. The further published to the user terminals. Figure 5 shows interface device can automatically discover, gather, and the architecture of the smart interface device. TEDS control the connected sensors or actuators. For this, and TII are implemented according to the standard of multichannel analog signal input interfaces, digital sig- IEEE 1451, which will be illustrated in the following nal output interfaces, and digital signal duplex inter- sections. faces were designed and implemented. Besides, for those high-speed devices, the interface device adopts Implementation both IP cores and embedded hardware units as the interfaces to access them. This design adopts Zynq-7000 as the implementation For the wired and wireless communication, the net- platform. It is based on the Xilinx all programmable work module is designed and implemented. At present, system on a chip (AP SoC) architecture and integrates a the device has supported both Wi-Fi and 3/4G mod- feature-rich dual-core ARM Cortex-A9 MPCore based ules. In the future, more novel communication modules processing system (PS) and Xilinx programmable logic equipment will be continuously added to the support (PL) in a single device. The ARM Cortex-A9 MPCore list. According to the different application require- is the heart of the PS which also includes on-chip mem- ments, the interface device can adopt different trans- ory, external memory interfaces, and a rich set of I/O mission modules to access to the Internet. peripherals. Figure 6 illustrates the functional blocks of In terms of controllers, with the abundant resources the Zynq-7000 AP SoC.18 of FPGA, the design adopts soft core to implement the address logic module and takes the embedded hardcore as the main controller. The logic address module is STIM module responsible for data acquisition and control for sensors, STIM module mainly realizes the access of various sen- actuators, and transducers. It can work in parallel and sors, actuators, and transducers. It communicates with low-power mode, which greatly reduces the resource NCAP module through TII. Different types of TEDS occupancy of the whole system. The main controller are designed and implemented in this module. The focuses on high-speed devices’ access and network entire module is implemented on the PL part. 6 International Journal of Distributed Sensor Networks

Figure 6. Zynq-7000 AP SoC overview.

In the hardware design of STIM, according to the processing core communicates with the above IEEE 1451.2 standard, FPGA implements the following interfaces and transmission module through the modules: analog signal interface, digital signal interface, advanced extensible interface (AXI) bus and control module, memory module, and transmission accesses the memory module with the local module. The detailed hardware architecture of STIM is memory bus (LMB). shown in Figure 7: For the functions of software, according to the IEEE 1. For analog signal interface, a 12-bit ADC is 1451.2 standard, the STIM module should implement adopted in this design which could support up the following functions: to 17 external analog input channels. Sensors with analog signal output can access to the sys- Addressing; tem with this interface. Interface data transport; 2. For digital signal interface, this STIM adopts Transducer data; both self-designed and custom IP cores to Meta-TEDS and Channel TEDS; implement types of digital signal interfaces, Status and control. such as UART, GPIO, and IIC. Digital sensors and actuators can access to the system The STIM adopts the stand-alone system to handle with them. the whole module, and the software workflow is shown 3. In the transmission module, the link block is in Figure 8. After powered on, the system begins to designed for communication with NCAP initialize and then enters the stage of waiting for NCAP through TII. The detailed design will be illu- request. When detecting the NCAP request signal, the strated in the following section. STIM module determines the request type according to 4. The memory module is implemented by BRAM the address layout which is shown in Figure 8. For sen- which is generated by FPGA resources. It differs sor data request, the module addresses it to the specific from common RAM and can be resized accord- sensor, executes data read operation, and transmits the ing to demands. In this design, we take 64-kB result to NCAP. For TEDS data request, the module BRAM for the STIM module. addresses it to the specific TEDS and transmits the 5. Finally, the STIM adopts soft IP core as table to the NCAP. For actuator control request, the the processing core in the control module, and module addresses it to the specific actuator, executes it is completely generated by FPGA resources control operation, and feeds back the result to NCAP. with low power and high performance. The Furthermore, the self-test function for STIM is Wang et al. 7

Data management: data acquisition, transmis- Analog Signal Interfaces sion, and storage; ADC Transmission Sensors Control Module Module TII Control management: actuators and other device So IP core Link block AXI AXI control; Digital Signal Interface LMB Service publication: offer web access and sub- UART scription service. Memory Module GPIO Sensors & BRAM actuators IIC To implement the above complex functions, the

Others NCAP needs a high-performance and stable operating system. Therefore, the PetaLinux operating system becomes a good choice for this module, which could Figure 7. Hardware architecture of STIM. provide various drivers for various devices and abundant libraries for application development. Based on the operating system, the control agent is designed for implemented to check the entire module status, and the device control management, and the data agent is results will be fed back to NCAP. The software work- designed for data acquisition, transmission, and stor- flow of STIM is given in Figure 9. age. For service publication, this NCAP adopts both web access service mode and subscription service NCAP module mode. The former allows users to directly access the web pages with visual representations of the data, NCAP module mainly implements the access of various and the latter could push the subscription informa- high-speed devices and the communication with net- tion to users timely and accurately. The architecture work. And it communicates with STIM module of NCAP module and typical application scenario is through TII. The entire module is implemented as the showninFigure11. PS part. In hardware design, the NCAP mainly implements the transmission module, control module, memory TII implementation module, and communication module according to the IEEE 1451.1 standard. Besides, we design and imple- TII is the interface between the STIM and NCAP, and ment the high-speed interface to support USB devices the protocols, timing, and electrical specifications are and Ethernet devices, which realizes the access of non- defined in IEEE1451.2 standard. The 10-line design IEEE 1451 objects. The detailed architecture of STIM could support data transmission, power, triggering, is shown in Figure 10. and interrupt. But in practice, the main function of this The NCAP adopts ARM Cortex-A9 MPCore as the interface is only to implement the data transmission control module, which could handle highly complex between NCAP and STIM. Instead of a complex 10- task with high performance, reliability, and stability. line physical structure, most researchers adopt a more Considering the rich I/O peripherals on the chip, the sample design for TII in practice. For example, both NCAP directly adopts the USB, Ethernet, and other the USB and UART are common choices.15 interfaces to implement the high-speed interfaces. In this design, the UART is adopted as the interface Furthermore, with connection with Wi-Fi and 4G between NCAP and STIM. Compared with other inter- module, the NCAP can access the network through face such as USB, the simple 2-wires UART can sup- wired or wireless connection. port bidirectional data transmission more efficiently By integrating IEEE 1451.1 standard and our exten- and effectively. With this simplified design, the system sion design, the NCAP module mainly implements the could work normally while reducing unnecessary following software functions: resource consumption.

Functional address Channel address

r/w Functional code Channel code

msblsb msb lsb

Figure 8. Address layout. 8 International Journal of Distributed Sensor Networks

actuators have the ability of ‘‘plug and play’’ and self- Power on calibration. Among them, the Meta-TEDS and 19 Initialization Channel TEDS are mandatory. Therefore, a Meta- TEDS is designed for the STIM module, and multiple Wait for request Channel TEDS are designed for each sensor and actuator connected to the interface device. N NCAP request The TEDS contains fields that fully describe the Addressing type, operation, and attributes of the transducers, Y which is stored as a data sheet in BRAM. Taking the Y Read operation Read sensor? temperature Channel TEDS as an example, it contains N Data transmission the channel type, physical units, lower/upper range Addressing Y Read TEDS? limit, and so on. Part of the information is shown in Addressing Table 1. The meta-TEDS length specifies 96 bytes in Data transmission N the Channel TEDS data block excluding this field, and Y Actuator operation Control actuator? the value 1 of calibration key indicates that fixed cali- Feedback Run self-test N bration information is provided. The value 0 of channel Y STIM self-test? type key indicates that the channel transducer type is Feedback sensor, and its measurement unit is kelvin according to N the value of physical units. Also, the measurement range is limited from 273 to 323 according to the lower Figure 9. Software workflow of STIM. and upper range limit. Once requested from NCAP, the data sheet will be packed and transmitted via TII.

Transmission TII Module Coommunication Application in office environment Control Module Module LkLink bloc monitoring ARM Wired/Wireless High-speed Interface With the improvement of human living standards, the Ethernet ‘‘smart office’’ has become a new thing which combines Memory Module High-speed 20 USB devices DDR people’s daily work with IoT technologies. Compared

Others with the traditional office environment, the ‘‘smart NNetwork office’’ could provide a more secure, comfortable, and efficient work environment through a serious of high- Figure 10. Hardware architecture of NCAP. tech facilities and technologies. At present, the similar ‘‘smart office’’ systems on the market have numerous problems in practical applica- TEDS design tion. First, most of them only support a small number According to IEEE 1451.2 standard, a group of TEDS of traditional sensors and could not support digital are defined, which could make the sensors and camera, novel transducer, and other data acquisition

Figure 11. Software architecture of NCAP. Wang et al. 9

Table 1. Part of Channel TEDS for temperature sensor.

Field no. Description Type Length Value

1 Meta-TEDS length U32L 4 96 2 Calibration key U8E 1 1 8 Channel type key U8E 1 0 9 Physical units UNITS 10 0, 128, 128, 128, 128, 128, 128, 130, 128, 128 10 Lower range limit F32 4 273 11 Upper range limit F32 4 323

TEDS: transducer electronic data sheet.

Figure 12. Application scenario of the smart office. devices, which makes the office environment monitor- temperature sensor, humidity sensor, infrared sensor, ing incomplete and inaccurate. Besides, due to the PM2.5 sensor, and hazardous gas sensor for environ- absence of standard for data acquisition and process- mental information acquisition. In addition, a high- ing, the systems are not compatible and interoperable resolution digital camera is also deployed to capture with each other. To solve above problems, we design video information. Finally, all the above devices are and implement a smart office environment monitoring connected to the smart interface device of the ‘‘smart system based on the proposed smart interface architec- office’’ through specialized interfaces, and users can ture, and it has the following features: access all the information through web browsers.

1. Taking full advantage of the smart interface Software and hardware design architecture, the system supports temperature, Hardware design. The hardware system is based on the humidity, light intensity, and air quality infor- proposed smart interface, and it can well meet all the mation acquisition as well as video surveillance. requirements of office environment monitoring. In this With the cooperation of hard disk and 4G mod- application, the Xilinx ZC702 evaluation kit is adopted ule, the system implements the functions of data to implement the hardware system. storage and transmission. First, we build the SoC system on XC7Z020 chip 2. Based on IEEE 1451 standard, the system sup- based on our proposed design. As shown in Figure 13, ports various transducers within specification the SoC system contains two processors: ARM Cortex- for data acquisition. A9 and Micro Blaze, which communicate through 3. With the help of FPGA and SoC embedded UART interface (ARM UART to UART_1 IP core). development technology, the kernel module of Meanwhile, the IIC IP core, XADC IP core, MDM IP the system is implemented on a single chip, core, BRAM IP core, RESET IP core, and two GPIO which greatly reduces the hardware resources IP cores are added to the SoC system, and all of them and power consumption. are connected to the Micro Blaze through AXI bus. Second, all kinds of devices are connected to the The application scenario of the ‘‘smart office’’ is board with specified interfaces. All the devices involved shown in Figure 12. The office is deployed with all in this application with the interfaces are shown in kinds of sensors, including light intensity sensor, Table 2. 10 International Journal of Distributed Sensor Networks

Figure 13. SoC system design.

Table 2. Specific devices with interfaces. system for the STIM module and the NCAP module. It contains complete functions of real-time data acquisi- Device Type Interface tion and control for sensors and other devices. Also, the Temperature and DTH 11 GPIO_1 communication with standard data format and proto- humidity sensor cols between two modules are considered. In the stage Light intensity sensor GY-30 IIC of data distribution, a web server based on PetaLinux is Infrared sensor HC-SR501 GPIO_2 established on STIM module for user access. It is based PM2.5 sensor GP2Y1050AU0F XADC on common gateway interface (CGI) and hypertext Hazardous gas sensor MQ135 XADC Digital camera DS-2CD2512F-IS Ethernet transfer protocol (HTTP), which could realize the 4G module ZTE ME3760 USB visualization presentation of collecting data. With this, Hard disk WD 10JUCT USB user can intuitively view the detailed environmental information as shown in Figure 15.

Finally, a prototype system has been developed and Performance evaluation deployed in the office for real-time environment monitoring (Figure 14). All kinds of environmental informa- As an actual application, the smart office can perform tion in the office are continuously collected, stored, and the real-time and comprehensive monitoring for office transmitted. environment, which includes temperature, light intensity, humidity, air quality, and video information. All the data could be stored locally and presented to the Software design. Software design of the office environ- users by visual interfaces. ment monitoring system mainly includes two parts: the Taking all advantage of the proposed smart inter- data acquisition and data distribution. In the stage of face architecture, the system has good compatibility data acquisition, we have designed integrated software and expansibility for different types of sensors,

Figure 14. Prototype system. Wang et al. 11

Figure 15. Web interface.

Figure 16. Power and resource utilization of the SoC. actuators, and other devices in IoT. For specific user actuators as well as novel high-speed devices, and it is requirements, the system could be reused and expanded suitable for various kinds of applications in IoT fields. for other application environment. Taking full use of FPGA and SoC technologies, the By adopting FPGA and SoC technologies, the sys- system has powerful processing capability, good com- tem has powerful data processing capability while con- patibility, and expansibility while consuming less hard- suming less hardware resources. Figure 16 shows the ware resources and power. By taking the application of resource utilization and power consumption of this smart office as an example, we verified that the system design. The left chart shows resource utilization of has good performance and reliability in practical the SoC system. Among them, this design only takes application. 7% LUT resources and 20% BRAM resources of the Note that many interesting directions are still XC7Z020 chip. The right chart shows the power remaining for further research. For example, consider- estimation of the SoC system. The total power con- ing that the system only realized wired connection for a sumption is about 1.8 W including 0.16-W device sta- part of IoT devices, how to achieve the wireless access tic power and 1.638-W dynamic running power. for other devices is an important issue. Our future work Compared with the total available power of 5 W, this will focus on this aspect. design only takes about 36% of the available chip power. With this, the entire system runs with effi- Declaration of conflicting interests ciency and effectiveness. The author(s) declared no potential conflicts of interest with respect to the research, authorship, and/or publication of this article. Conclusion This article proposes a reconfigurable smart interface Funding for multiple IoT devices. It was designed based on This research was supported by the National Natural Science IEEE 1451 standard and FPGA technology. The pro- Foundation of China (No. 61502018 2016.1-2018.12) and posed architecture could access various sensors and Beijing innovation platform of Science and technology. 12 International Journal of Distributed Sensor Networks

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