<<

ECP2046 ORGANIZATION AND ARCHITECTURE SESSION: 2001/2002 TUTORIAL 1B SOLUTION

Chapter-1

Q1. Illustrate the Flynn’s classification of .

Flynn’s Classification SISD: single instruction stream, single stream 9 SISD: single instruction stream, single data stream • In this architecture, only one instruction is 9 MISD: multiple instruction stream, single data executed at any one time. Often, SISD is referred stream to as a serial computer. 9 SIMD: single instruction stream, multiple data stream 9 MIMD: multiple instruction stream, multiple data stream CU: PU: processing unit IS DS IS: instruction stream I/O CU PU MU MISD: multiple instruction DS: data stream

stream, single data stream Fig: SISD uniprocessor architecture

• This implies that several instructions are operating on a single piece of data. The same data flows through a linear SIMD: single instruction array of processors executing different instruction streams. This architecture is also known as for stream, multiple data stream pipelined of specific . • Not much used in practice. • In this category, a single instruction is applied to different data simultaneously. SIMD have more than one processing element (PE). • General characteristics of SIMD are: IS CUn CU1 CU2 − They distribute processing over a large amount of hardware Memory IS IS IS − They operate concurrently on many different data elements (program DS DS – They perform the same computation on the all data elements and data) PU1 PU2 PUn DS DS I/O PE1 LM1 Fig: MISD architecture (the systolic array) IS Program CU IS loaded from DS DS LM: local PEn host LMn memory Fig: SIMD architecture (with ) M IM : m u ltip le in s tru c tio n s trea m , m u ltip le d ata s trea m

These m achines have several processing units in which m u ltip le in s tru c tio n s c a n b e applied to different data simultaneously. These m achines are also called IS m u ltip ro c e s s o rs . General I/O CU1 PU1 characteristics of M IMD IS DS m achines are as follows: – They distribute processing over a num ber of independent processors I/O IS DS CUn PUn – They share resources, including IS m emory, among the component processors – Each operates independently and concurrently Fig: M IM D architecture w ith shared m em ory – Each processor runs its own program Q2. State the general characteristics of MIMD processors. Illustrate a simple MIMD architecture with shared memory system.

General characteristic of MIMD machines: „ They distribute processing over a number of independent processors „ They share resources, including memory, among the component processors „ Each processor operates independently and concurrently „ Each processor runs its own program

(The architecture : shown as in Q1)

Q3. Briefly describe the main structural of the following components: a) Computer b) (CPU) c) Control Unit

Four main structural components of computer:

· Central Processing Unit (CPU): Controls the operation of the computer and performs its data processing functions. · Main Memory: Stores and retrieves data. · I/O: Moves data between the computer and its external environment. · System Interconnection: Provides among CPU, main memory and I/O. And major structural components of CPU are:

· Control Unit: Controls the operation of the CPU. · Arithmetic and Logic Unit (ALU): Performs the computer’s data processing functions. · Registers: Provides fast storage internal to the CPU. · CPU interconnection :It provides communication among the control unit, ALU, and registers. And major structural components of control unit are: · Sequencing Logic · Control Unit Registers and Decoders · Control Memory

Central Processing Control Unit Unit Sequencing Logic Arithmetic & Main Memory Logic Unit Control Unit Computer Registers & /Output Registers Decoders

System Internal CPU Control Memory Interconnection Interconeection 4. What is the difference between RISC and CISC architecture?

RISC : Reduced Instruction Set Computer CISC : Complex Instruction Set Computer

RISC architectures have the following characteristics that distinguish them from CISC.

1) All instructions are of fixed length, one word in size (simple instruction format) 2) All instructions perform simple operation (one machine instruction per machine cycle) 3) All must be in register before being operated upon (register-to- register) 4) Addressing modes are limited to simple ones. 5) There should be a large number of general registers for arithmetic operations so that the temporary variables can be stored in registers rather than on a stack in memory

*************************************** END**************************