DOCSLIB.ORG

Fundamentals of Digital Logic and Microcontrollers

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Fundamentals of Digital Logic and Microcontrollers Fundamentals of Digital Logic and Microcontrollers Fundamentals of Digital Logic and Microcontrollers Sixth Edition M. RAFIQUZZAMAN, Ph.D. Professor California State Polytechnic University, Pomona and President Rafi Systems, Inc. Copyright © 2014 by John Wiley & Sons, Inc. All rights reserved. Published by John Wiley & Sons, Inc., Hoboken, New Jersey. Published simultaneously in Canada. No part of this publication may be reproduced, stored in a retrieval system or transmitted in any form or by any means, electronic, mechanical, photocopying, recording, scanning or otherwise, except as permitted under Section 107 or 108 of the 1976 United States Copyright Act, without either the prior written permission of the Publisher, or authorization through payment of the appropriate per-copy fee to the Copyright Clearance Center, Inc., 222 Rosewood Drive, Danvers, MA 01923, (978) 750-8400, fax (978) 646-8600, or on the web at www.copyright.com. Requests to the Publisher for permission should be addressed to the Permissions Department, John Wiley & Sons, Inc., 111 River Street, Hoboken, NJ 07030, (201) 748-6011, fax (201) 748-6008, or online at http://www.wiley.com/go/permissions. Limit of Liability/Disclaimer of Warranty: While the publisher and author have used their best efforts in preparing this book, they make no representation or warranties with respect to the accuracy or completeness of the contents of this book and specifically disclaim any implied warranties of merchantability or fitness for a particular purpose. No warranty may be created or extended by sales representatives or written sales materials. The advice and strategies contained herein may not be suitable for your situation. You should consult with a professional where appropriate. Neither the publisher nor author shall be liable for any loss of profit or any other commercial damages, including but not limited to special, incidental, consequential, or other damages. For general information on our other products and services or for technical support, please contact our Customer Care Department within the United States at (800) 762-2974, outside the U.S. at (317) 572-3993 or fax (317) 572-4002. Wiley also publishes its books in a variety of electronic formats. Some content that appears in print may not be available in electronic formats. For more information about Wiley products, visit our web site at www.wiley.com Library of Congress Cataloging-in-Publication Data: Rafiquzzaman, Mohamed. [Fundamentals of digital logic and microcomputer design] Fundamentals of digital logic and microcontrollers / M. Rafiquzzaman. – Sixth edition. pages cm Revised edition of: Fundamentals of digital logic and microcomputer design. Includes index. ISBN 978-1-118-85579-9 (cloth) 1. Logic circuits. 2. Microcomputers–Design and construction. 3. Electronic digital computers–Circuits. I. Title. TK7888.4.R34 2014 621.39ʹ5–dc23 2014017642 Printed in the United States of America. 10 9 8 7 6 5 4 3 2 1 To my wife, Kusum; son, Tito; daughter-in-law, Trina; and my grandchildren In memory of my brother Elan CONTENTS PREFACE xiii 1: INTRODUCTION TO DIGITAL SYSTEMS 1 1.1 Explanation of Terms 2 1.2 Design Levels 6 1.3 Combinational and Sequential Circuits 7 1.4 Digital Integrated Circuits 7 1.4.1 Diodes 7 1.4.2 Transistors 8 1.4.3 MOS Transistors 14 1.5 Integrated Circuits (ICs) 18 1.6 CAD (Computer-Aided Design) 19 1.7 Evolution of the Microcontroller 20 1.8 Typical Microcontroller Applications 21 1.8.1 A Simple Microcontroller Application 22 1.8.2 Embedded Controllers 23 2: NUMBER SYSTEMS AND CODES 25 2.1 Number Systems 25 2.1.1 General Number Representation 25 2.1.2 Converting Numbers from One Base to Another 28 2.2 Unsigned and Signed Binary Numbers 30 2.3 Codes 34 2.3.1 Binary-Coded-Decimal Code (8421 Code) 34 2.3.2 Alphanumeric Codes 35 2.3.3 Excess-3 Code 36 2.3.4 Gray Code 37 2.3.5 Unicode 39 2.4 Fixed-Point and Floating-Point Representations 40 2.5 Arithmetic Operations 41 2.5.1 Binary Arithmetic 41 2.5.2 BCD Arithmetic 51 2.6 Error Correction and Detection 53 Questions and Problems 55 vii viii Contents 3: BOOLEAN ALGEBRA AND DIGITAL LOGIC GATES 59 3.1 Basic Logic Operations 59 3.1.1 NOT Operation 59 3.1.2 OR operation 60 3.1.3 AND operation 62 3.2 Other Logic Operations 64 3.2.1 NOR operation 64 3.2.2 NAND operation 64 3.2.3 Exclusive-OR operation (XOR) 65 3.2.4 Exclusive-NOR Operation (XNOR) 66 3.3 IEEE Symbols for Logic Gates 67 3.4 Positive and Negative Logic 68 3.5 Boolean Algebra 69 3.5.1 Boolean Identities 70 3.5.2 Simplification Using Boolean Identities 72 3.5.3 Consensus Theorem 74 3.5.4 Complement of a Boolean Function 75 3.6 Standard Representations 76 3.7 Karnaugh Maps 80 3.7.1 Two-Variable K-map 81 3.7.2 Three-Variable K-map 82 3.7.3 Four-Variable K-map 85 3.7.4 Prime Implicants 87 3.7.5 Expressing a Boolean function in Product-of-sums (POS) form using a K-map 89 3.7.6 Don’t Care Conditions 91 3.7.7 Five-Variable K-map 95 3.8 Quine–McCluskey Method 96 3.9 Implementation of Digital Circuits with NAND, NOR, and Exclusive-OR/Exclusive-NOR Gates 97 3.9.1 NAND Gate Implementation 98 3.9.2 NOR Gate Implementation 99 3.9.3 XOR / XNOR Implementations 102 Questions and Problems 106 4: COMBINATIONAL LOGIC 109 4.1 Basic Concepts 109 4.2 Analysis of a Combinational Logic Circuit 109 4.3 Design of a Combinational Circuit 110 4.4 Multiple-Output Combinational Circuits 112 4.5 Typical Combinational Circuits 114 4.5.1 Comparators 114 4.5.2 Decoders 118 4.5.3 Encoders 122 4.5.4 Multiplexers 127 4.5.5 Demultiplexers 129 4.5.6 Binary / BCD Adders and Binary Subtractors 129 4.6 IEEE Standard Symbols 136 Contents ix 4.7 Read-Only Memories (ROMs) 138 4.8 Programmable Logic Devices (PLDs) 140 4.9 Commercially Available Field Programmable Devices (FPDs) 144 4.10 HARDWARE DESCRIPTION LANGUAGE (HDL) 146 4.11 Verilog basics 148 4.11.1 Verilog keywords 148 4.11.2 A typical Verilog Segment 148 4.11.3 Verilog operators 151 4.11.4 Verilog Constants 152 4.11.5 Modeling logical conditions in a circuit 152 4.11.6 Verilog if-else and case-endcase structures 153 4.11.7 A typical Verilog Simulator 153 4.12 Verilog modeling examples for combinational circuits 155 4.12.1 Structural modeling 155 4.12.2 Dataflow modeling 161 4.12.3 Behavioral modeling 163 Questions and Problems 168 5: SEQUENTIAL LOGIC 173 5.1 Basic Concepts 173 5.2 Latches and Flip-Flops 173 5.2.1 SR Latch 174 5.2.2 Gated SR Latch 176 5.2.3 Gated D Latch 176 5.2.4 Edge-Triggered D Flip-Flop 177 5.2.5 JK Flip-Flop 180 5.2.6 T Flip-Flop 181 5.3 Flip-flop timing parameters for edge-triggered flip-flops 181 5.4 Preset and Clear Inputs 182 5.5 Summary of the gated SR latch and the Flip-Flops 182 5.6 Analysis of Synchronous Sequential Circuits 185 5.7 Types of Synchronous Sequential Circuits 188 5.8 Minimization of States 188 5.9 Design of Synchronous Sequential Circuits 190 5.10 Design of Counters 196 5.11 Examples of Synchronous Sequential Circuits 201 5.11.1 Registers 201 5.11.2 Modulo-n Counters 203 5.11.3 Random-Access Memory (RAM) 206 5.12 Algorithmic State Machines (ASM) Chart 207 5.13 Asynchronous Sequential Circuits 214 5.14 Verilog description of typical synchronous sequential circuits 217 Questions and Problems 235 6: CPU, MEMORY, AND I/O 243 6.1 Design of the CPU 243 6.1.1 Register Design 244 6.1.2 Arithmetic Logic Unit (ALU) 244 6.1.3 ALU Design 255 x Contents 6.1.4 Control Unit Design 257 6.2 Memory Organization 280 6.2.1 Types of Main memory 283 6.2.2 READ and WRITE Timing Diagrams 285 6.2.3 Main Memory Organization 287 6.3 Input/Output (I/O) 290 6.3.1 Simple I/O Devices 292 6.3.2 Programmed I/O 293 6.3.3 Interrupt I/O 295 6.4 CPU design using Verilog 296 Questions and Problems 309 7: MICROCONTROLLER BASICS 317 7.1 Basic Blocks of a Microcontroller 317 7.1.1 System Bus 318 7.1.2 Clock Signals 319 7.2 Microcontroller Architectures 320 7.3 Basic Concept of Pipelining 321 7.4 RISC vs. CISC 323 7.5 Functional Representation of a Typical RISC Microcontroller—The PIC18F4321 324 7.6 Basics of Programming Languages 324 7.6.1 Machine Language 326 7.6.2 Assembly Language 327 7.6.3 High-Level Language 327 7.7 Choosing a Programming Language 328 7.8 Introduction to C Language 329 7.8.1 Data Types 332 7.8.2 Bit Manipulation Operators 333 7.8.3 Control Structures 334 7.8.4 The switch Construct 338 7.8.5 The while Construct 338 7.8.6 The for Construct 340 7.8.7 The do-while Construct 341 7.8.8 Structures and Unions 341 7.8.9 Functions in C 342 7.8.10 Macros 343 Questions and Problems 344 8: PIC18F HARDWARE AND INTERFACING USING C: PART 1 345 8.1 PIC18F Pins and Signals 345 8.1.1 Clock 346 8.1.2 PIC18F Reset 350 8.1.3 A Simplified Setup for the PIC18F4321 350 8.2 PIC18F4321 programmed I/O using C 351 8.2.1 PIC 18F4321 I/O ports 351 8.2.2 Interfacing LEDs (Light Emitting Diodes) and Seven-segment Displays 354 8.2.3 Microchip MPLAB C18 compiler and the PICkit3 interface 355 Contents xi 8.2.4 Configuration commands 356 8.3 PIC18F Interrupts 359 8.3.1 PIC18F Interrupt Types 359 8.3.2 PIC18F External Interrupts in Default Mode 359 8.3.3 Interrupt Registers and Priorities 361 8.3.4 Setting the Triggering Levels of INTn Pin Interrupts 362 8.3.5 Programming the PIC18 interrupts using C 363 Questions and Problems 369 9: PIC18F HARDWARE AND INTERFACING USING C: PART 2 373 9.1 PIC18F Timers 373 9.1.1 Timer0 375 9.1.2 Timer1 378 9.1.3 Timer2 382 9.1.4 Timer3 384 9.2 PIC18F Interface to an LCD (Liquid Crystal Display) 390 9.3 Analog Interface 394 9.3.1 On-chip A/D Converter 395 9.3.2 Interfacing an External D/A (Digital-to-Analog) Converter to the PIC18F4321 403 9.4 Serial
Load more

Recommended publications
  • Chapter 3: Combinational Logic Design
    Chapter 3: Combinational Logic Design 1 Introduction • We have learned all the prerequisite material: – Truth tables and Boolean expressions describe functions – Expressions can be converted into hardware circuits – Boolean algebra and K-maps help simplify expressions and circuits • Now, let us put all of these foundations to good use, to analyze and design some larger circuits 2 Introduction • Logic circuits for digital systems may be – Combinational – Sequential • A combinational circuit consists of logic gates whose outputs at any time are determined by the current input values, i.e., it has no memory elements • A sequential circuit consists of logic gates whose outputs at any time are determined by the current input values as well as the past input values, i.e., it has memory elements 3 Introduction • Each input and output variable is a binary variable • 2^n possible binary input combinations • One possible binary value at the output for each input combination • A truth table or m Boolean functions can be used to specify input-output relation 4 Design Hierarchy • A single very large-scale integrated (VLSI) processos circuit contains several tens of millions of gates! • Imagine interconnecting these gates to form the processor • No complex circuit can be designed simply by interconnecting gates one at a time • Divide and Conquer approach is used to deal with the complexity – Break up the circuit into pieces (blocks) – Define the functions and the interfaces of each block such that the circuit formed by interconnecting the blocks obeys the original circuit specification – If a block is still too large and complex to be designed as a single entity, it can be broken into smaller blocks 5 Divide and Conquer 6 Hierarchical Design due to Divide and Conquer 7 Hierarchical Design • A hierarchy reduce the complexity required to represent the schematic diagram of a circuit • In any hierarchy, the leaves consist of predefined blocks, some of which may be primitives.
    [Show full text]
  • Combinational Logic; Hierarchical Design and Analysis
    Combinational Logic; Hierarchical Design and Analysis Tom Kelliher, CS 240 Feb. 10, 2012 1 Administrivia Announcements Collect assignment. Assignment Read 3.3. From Last Time IC technology. Outline 1. Combinational logic. 2. Hierarchical design 3. Design analysis. 1 Coming Up Design example. 2 Combinational Logic 1. Definition: Logic circuits in which the output(s) depend solely upon current inputs. 2. No feedback or memory. 3. Sequential circuits: outputs depend upon current inputs and previous inputs. Memory or registers. 4. Example — BCD to 7-segment decoder: S0 D0 S1 D1 BCD - 7 Seg S2 D2 S3 D3 Decoder S4 S5 S6 3 Hierarchical Design 1. Transistor counts: 2 Processor Year Transistor Count TI SN7400 1966 16 Intel 4004 1971 2,300 Intel 8085 1976 6,500 Intel 8088 1979 29,000 Intel 80386 1985 275,000 Intel Pentium 1993 3,100,000 Intel Pentium 4 2000 42,000,000 AMD Athlon 64 2003 105,900,000 Intel Core 2 Duo 2006 291,000,000 Intel Core 2 Quad 2006 582,000,000 NVIDIA G80 2006 681,000,000 Intel Dual Core Itanium 2 2006 1,700,000,000 Intel Atom 2008 42,000,000 Six Core Xeon 7400 2008 1,900,000,000 AMD RV770 2008 956,000,000 NVIDIA GT200 2008 1,400,000,000 Eight Core Xeon Nehalem-EX 2010 2,300,000,000 10 Core Xeon Westmere-EX 2011 2,600,000,000 AMD Cayman 2010 2,640,000,000 NVIDIA GF100 2010 3,000,000,000 Altera Stratix V 2011 3,800,000,000 2. Design and conquer: CPU ⇒ Integer Unit ⇒ Adder ⇒ binary full adder ⇒ NAND gates 3.
    [Show full text]
  • The Basics of Logic Design
    C APPENDIX The Basics of Logic Design C.1 Introduction C-3 I always loved that C.2 Gates, Truth Tables, and Logic word, Boolean. Equations C-4 C.3 Combinational Logic C-9 Claude Shannon C.4 Using a Hardware Description IEEE Spectrum, April 1992 Language (Shannon’s master’s thesis showed that C-20 the algebra invented by George Boole in C.5 Constructing a Basic Arithmetic Logic the 1800s could represent the workings of Unit C-26 electrical switches.) C.6 Faster Addition: Carry Lookahead C-38 C.7 Clocks C-48 AAppendixC-9780123747501.inddppendixC-9780123747501.indd 2 226/07/116/07/11 66:28:28 PPMM C.8 Memory Elements: Flip-Flops, Latches, and Registers C-50 C.9 Memory Elements: SRAMs and DRAMs C-58 C.10 Finite-State Machines C-67 C.11 Timing Methodologies C-72 C.12 Field Programmable Devices C-78 C.13 Concluding Remarks C-79 C.14 Exercises C-80 C.1 Introduction This appendix provides a brief discussion of the basics of logic design. It does not replace a course in logic design, nor will it enable you to design signifi cant working logic systems. If you have little or no exposure to logic design, however, this appendix will provide suffi cient background to understand all the material in this book. In addition, if you are looking to understand some of the motivation behind how computers are implemented, this material will serve as a useful intro- duction. If your curiosity is aroused but not sated by this appendix, the references at the end provide several additional sources of information.
    [Show full text]
  • Combinational Logic
    MEC520 디지털 공학 Combinational Logic Jee-Hwan Ryu School of Mechanical Engineering Korea University of Technology and Education Combinational circuits Outputs are determined from the present inputs Consist of input/output variables and logic gates Binary signal to registers Binary signal from registers Sequential Circuits Outputs are determined from the present inputs and the state of the storage elements The state of the storage elements is a function of previous inputs Depends on present and past inputs Korea University of Technology and Education Analysis procedure To determine the function from a given circuit diagram Analysis procedure Make sure the circuit is combinational or sequential No Feedback and memory elements Obtain the output Boolean functions or the truth table Korea University of Technology and Education Obtain Procedure-Boolean Function Boolean function from a logic diagram Label all gate outputs with arbitrary symbols Make output functions at each level Substitute final outputs to input variables Korea University of Technology and Education Obtain Procedure-Truth Table Truth table from a logic diagram Put the input variables to binary numbers Determine the output value at each gate Obtain truth table Korea University of Technology and Education Example Korea University of Technology and Education Design Procedure Procedure to design a combinational circuit 1. Determine the required number of input and output from specification 2. Assign a symbol to each input/output 3. Derive the truth table from the
    [Show full text]
  • Chapter 6 - Combinational Logic Systems GCSE Electronics – Component 1: Discovering Electronics
    Chapter 6 - Combinational logic systems GCSE Electronics – Component 1: Discovering Electronics Combinational logic systems Learners should be able to: (a) recognise 1/0 as two-state logic levels (b) identify and use NOT gates and 2-input AND, OR, NAND and NOR gates, singly and in combination (c) produce a suitable truth table from a given system specification and for a given logic circuit (d) use truth tables to analyse a system of gates (e) use Boolean algebra to represent the output of truth tables or logic gates and use the basic Boolean identities A.B = A+B and A+B = A.B (f) design processing systems consisting of logic gates to solve problems (g) simplify logic circuits using NAND gate redundancy (h) analyse and design systems from a given truth table to solve a given problem (i) use data sheets to select a logic IC for given applications and to identify pin connections (j) design and use switches and pull-up or pull-down resistors to provide correct logic level/edge-triggered signals for logic gates and timing circuits 180 © WJEC 2017 Chapter 6 - Combinational logic systems GCSE Electronics – Component 1: Discovering Electronics Introduction In this chapter we will be concentrating on the basics of digital logic circuits which will then be extended in Component 2. We should start by ensuring that you understand the difference between a digital signal and an analogue signal. An analogue signal Voltage (V) Max This is a signal that can have any value between the zero and maximum of the power supply. Changes between values can occur slowly or rapidly depending on the system involved.
    [Show full text]
  • CS 61C: Great Ideas in Computer Architecture Combinational and Sequential Logic, Boolean Algebra
    CS 61C: Great Ideas in Computer Architecture Combinational and Sequential Logic, Boolean Algebra Instructor: Justin Hsia 7/24/2013 Summer 2013 ‐‐ Lecture #18 1 Review of Last Lecture • OpenMP as simple parallel extension to C – During parallel fork, be aware of which variables should be shared vs. private among threads – Work‐sharing accomplished with for/sections – Synchronization accomplished with critical/atomic/reduction • Hardware is made up of transistors and wires – Transistors are voltage‐controlled switches – Building blocks of all higher‐level blocks 7/24/2013 Summer 2013 ‐‐ Lecture #18 2 Great Idea #1: Levels of Representation/Interpretation temp = v[k]; Higher‐Level Language v[k] = v[k+1]; Program (e.g. C) v[k+1] = temp; Compiler lw $t0, 0($2) Assembly Language lw $t1, 4($2) Program (e.g. MIPS) sw $t1, 0($2) sw $t0, 4($2) Assembler 0000 1001 1100 0110 1010 1111 0101 1000 Machine Language 1010 1111 0101 1000 0000 1001 1100 0110 Program (MIPS) 1100 0110 1010 1111 0101 1000 0000 1001 0101 1000 0000 1001 1100 0110 1010 1111 Machine Interpretation We are here Hardware Architecture Description (e.g. block diagrams) Architecture Implementation Logic Circuit Description (Circuit Schematic Diagrams) 7/24/2013 Summer 2013 ‐‐ Lecture #18 3 Synchronous Digital Systems Hardware of a processor, such as the MIPS, is an example of a Synchronous Digital System Synchronous: •All operations coordinated by a central clock ‒ “Heartbeat” of the system! Digital: • Represent all values with two discrete values •Electrical signals are treated as 1’s
    [Show full text]
  • LECTURE 4 Logic Design LOGIC DESIGN
    LECTURE 4 Logic Design LOGIC DESIGN The language of the machine is binary – that is, sequences of 1’s and 0’s. But why? • At the hardware level, computers are streams of signals. These signals only have two states of interest, high voltage and low voltage. • Binary is merely a natural abstraction for the underlying signals. • Rather than talking about voltage levels, we talk about logically true signals (having a value 1) and logically false signals (having a value 0). • We might also say that logically true signals are asserted, while logically false signals are de-asserted. LOGIC BLOCKS Logic Blocks are programmable logic components which take some input and produce some output according to a set of logical rules. • Combinational Logic Blocks – depend only on a set of inputs. Any given input will always result in the same output. • Sequential Logic Blocks – maintain an internal state, which may affect the output obtained for a given set of input values. TRUTH TABLES Defining a combinational logic block is as simple as defining the output values for all of the possible sets of input values. Because our input takes only one of two values – 0 or 1 – for � inputs, there are 2# possible input combinations. As long as we can define the output for each of these combinations, our combinational logic block is fully defined. TRUTH TABLES • Consider a logic function with three inputs, A, B, and C, and three outputs, D, E, and F. • D is true if at least one input is true, • E is true if exactly two inputs are true, and • F is true only if all three inputs are true.
    [Show full text]
  • Combinational Logic Circuits
    CHAPTER 4 COMBINATIONAL LOGIC CIRCUITS ■ OUTLINE 4-1 Sum-of-Products Form 4-10 Troubleshooting Digital 4-2 Simplifying Logic Circuits Systems 4-3 Algebraic Simplification 4-11 Internal Digital IC Faults 4-4 Designing Combinational 4-12 External Faults Logic Circuits 4-13 Troubleshooting Prototyped 4-5 Karnaugh Map Method Circuits 4-6 Exclusive-OR and 4-14 Programmable Logic Devices Exclusive-NOR Circuits 4-15 Representing Data in HDL 4-7 Parity Generator and Checker 4-16 Truth Tables Using HDL 4-8 Enable/Disable Circuits 4-17 Decision Control Structures 4-9 Basic Characteristics of in HDL Digital ICs M04_WIDM0130_12_SE_C04.indd 136 1/8/16 8:38 PM ■ CHAPTER OUTCOMES Upon completion of this chapter, you will be able to: ■■ Convert a logic expression into a sum-of-products expression. ■■ Perform the necessary steps to reduce a sum-of-products expression to its simplest form. ■■ Use Boolean algebra and the Karnaugh map as tools to simplify and design logic circuits. ■■ Explain the operation of both exclusive-OR and exclusive-NOR circuits. ■■ Design simple logic circuits without the help of a truth table. ■■ Describe how to implement enable circuits. ■■ Cite the basic characteristics of TTL and CMOS digital ICs. ■■ Use the basic troubleshooting rules of digital systems. ■■ Deduce from observed results the faults of malfunctioning combina- tional logic circuits. ■■ Describe the fundamental idea of programmable logic devices (PLDs). ■■ Describe the steps involved in programming a PLD to perform a simple combinational logic function. ■■ Describe hierarchical design methods. ■■ Identify proper data types for single-bit, bit array, and numeric value variables.
    [Show full text]
  • Tutorial on Adder and Subtractor Logic Circuits Digital Adder: 1. Half Adder 2. Full Adder. Half Adder- Full Adder
    Tutorial on Adder and Subtractor Logic Circuits Digital Adder: In digital electronics an adder is a logic circuit that implements addition of numbers. In many computers and other types of processors, adders are used to calculate addresses, similar operations and table indices in the arithmetic logic unit (ALU) and also in other parts of the processors. These can be built for many numerical representations like binary coded decimal or excess-3. Adders are classified into two types: 1. Half adder 2. Full adder. Half Adder- The half adder circuit is required to add two input digits (for Ex. A and B) and generate a carry and sum. The half adder adds two binary digits called as augend and addend and produces two outputs as sum and carry (XOR is applied to both inputs to produce sum and AND gate is applied to both inputs to produce carry). It means half adder circuits can add only two digits in other words if we need to add more than 2 digits it will not work, so, it the limitation of an half adder electronic circuits. To resolve this problem a full adder circuit is required. Application- The ALU of a computer uses half adder to compute the binary addition operation on two bits. Half adder is used to make full adder as a full adder requires 3 inputs, the third input being an input carry i.e. we will be able to cascade the carry bit from one adder to the other. Ripple carry adder is possible to create a logical circuit using multiple full adders to add N- bit numbers.
    [Show full text]
  • Sequential Logic – Each Circuit Element Used at Most Once Sequential Circuits
    Review of Combinational Circuits Combinational circuits. Basic abstraction = switch. In principle, can build TOY computer with a combinational circuit. – 255 16 = 4,080 inputs 24080 rows in truth table! – no simple pattern Sequential Logic – each circuit element used at most once Sequential circuits. Reuse circuit elements Introduction to Computer by storing bits in "memory." ALU Yung-Yu Chuang combinational with slides by Sedgewick & Wayne (introcs.cs.princeton.edu), Nisan & Schocken Memory state (www.nand2tetris.org) and Harris & Harris (DDCA) 2 Combinational vs. Sequential Circuits Flip-Flop Combinational circuits. Flip-flop Output determined solely by inputs. A small and useful sequential circuit Can draw with no loops. Abstraction that remembers one bit Ex: majority, adder, ALU. Basis of important computer components for – register – memory Sequential circuits. – counter Output determined by inputs and There are several flavors previous outputs. Ex: memory, program counter, CPU. 3 4 S-R flip flop Relay-based flip-flop RSQ 00 Ex. Simplest feedback loop. Two relays A and B, both connected 01 to power, each blocked by the other. 10 State determined by whichever switches first. The state is latched. 11 Stable. Q=S+RQ output1 input2 input1 output2 5 6 SR Flip Flop Flip-Flop SR flip flop. Two cross-coupled NOR gates. Flip-flop. A way to control the feedback loop. Q=R(S+Q) Abstraction that "remembers" one bit. R S Basic building block for memory and registers. RSQ Q 00 01 10 11 Caveat. Need to deal with switching delay. 7 8 Truth Table and Timing Diagram Clock SR Flip Flop Truth Table Truth table.
    [Show full text]
  • Lab 1: Combinational Arithmetic Circuits CEG 360/560 - EE 451/651
    CEG 360/560 – EE 451/651 Lab 1 Dr. Doom Lab 1: Combinational Arithmetic Circuits CEG 360/560 - EE 451/651 PURPOSE The purpose of this introductory laboratory project is to familiarize students with the digital de- sign and simulation software available in the laboratory while reviewing important prerequisite concepts. In this lab, we will design a purely combinational device: a 4-bit arithmetic logic unit (ALU). This device will be used in the datapath of the simple computer we implement in Lab 4. This is a two-week project. PRELAB (WEEK ONE): Combinational Arithmetic Devices (10 pts.) The goal of the first week is to review digital arithmetic and design very simple ALU- like circuit. 1) Review prerequisite course material in the text. Pay particular attention to the material on number systems and binary arithmetic, the implementation of combinational devices to per- form such operations, and the interpretation of standard symbols for combinational logic. 2) Construct a truth-table for a combinational circuit Lab1comp with a one 1-bit enable EN, a 2- bit input A (A[1:0]), a 2-bit input B (B[1:0]), and one 2-bit output Z (Z[1:0]). The inputs A and B represent 2-bit binary numbers. When disabled (EN = 0), Z = x0 (binary 00). When enabled, the value of the output Z depends upon the values of A and B, as shown below: Condition Z (Hex) Z (Binary) A < B x1 01 A > B x2 10 A = B x3 11 3) Design a combinational circuit that realizes the functionality of Lab1comp using a 2-bit 4-to- 1 line multiplexer and a minimal number of logic gates.
    [Show full text]
  • UNIT 3 COMBINATIONAL LOGIC Introduction to Combinational Circuits
    UNIT 3 COMBINATIONAL LOGIC Introduction to combinational circuits: A combinational circuit is the digital logic circuit in which the output depends on the combination of inputs at that point of time with total disregard to the past state of the inputs. The digital logic gate is the building block of combinational circuits. The function implemented by combinational circuit is depend upon the Boolean expressions. On the other hand, sequential logic circuits, consists of both logic gates and memory elements such as flip-flops. Figure below shows the combinational circuit having n inputs and and m outputs. The n number of inputs shows that there are 2^n possible combinations of bits at the input. Therefore, the output is expressed in terms m Boolean expressions. Analysis Procedure To obtain the output Boolean functions from a logic diagram, proceed as follows: 1. Label all gate outputs that are a function of input variables with arbitrary symbols. Determine the Boolean functions for each gate output. 2. Label the gates that are a function of input variables and previously labeled gates with other arbitrary symbols. Find the Boolean functions for these gates. 3. Repeat the process outlined in step 2 until the outputs of the circuit are obtained. 4. By repeated substitution of previously defined functions, obtain the output Boolean functions in terms of input variables. Example: F2 = AB + AC + BC; T1 = A + B + C; T2 = ABC; T3 = F2’T1; F1 = T3 + T2 F1 = T3 + T2 = F2’T1 + ABC = A’BC’ + A’B’C + AB’C’ + ABC Derive truth table from logic diagram : We can derive the truth table in Table 4-1 by using the circuit of Fig.4-2.
    [Show full text]