Picojava-II™ Programmer's Reference Manual

picoJava-II™ Programmer’s Reference Manual Sun Microsystems, Inc. 901 San Antonio Road Palo Alto, CA 94303 USA 650 960-1300 Part No.: 805-2800-06 March 1999 Copyright 1999 Sun Microsystems, Inc. 901 San Antonio Road, Palo Alto, California 94303 U.S.A. All rights reserved. The contents of this document are subject to the current version of the Sun Community Source License, picoJava Core (“the License”). You may not use this document except in compliance with the License. You may obtain a copy of the License by searching for “Sun Community Source License” on the World Wide Web at http://www.sun.com. See the License for the rights, obligations, and limitations governing use of the contents of this document. Sun, Sun Microsystems, the Sun logo and all Sun-based trademarks and logos, Java, picoJava, and all Java-based trademarks and logos are trademarks, registered trademarks, or service marks of Sun Microsystems, Inc. in the U.S. and other countries. All SPARC trademarks are used under license and are trademarks or registered trademarks of SPARC International, Inc. in the U.S. and other countries. Products bearing SPARC trademarks are based upon an architecture developed by Sun Microsystems, Inc. DOCUMENTATION IS PROVIDED “AS IS” AND ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON- INFRINGEMENT, ARE DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD TO BE LEGALLY INVALID. THIS PUBLICATION COULD INCLUDE TECHNICAL INACCURACIES OR TYPOGRAPHICAL ERRORS. CHANGES ARE PERIODICALLY ADDED TO THE INFORMATION HEREIN; THESE CHANGES WILL BE INCORPORATED IN NEW EDITIONS OF THE PUBLICATION. SUN MICROSYSTEMS, INC. MAY MAKE IMPROVEMENTS AND/OR CHANGES IN THE PRODUCT(S) AND/OR THE PROGRAM(S) DESCRIBED IN THIS PUBLICATION AT ANY TIME. Please Recycle Contents Preface xvii Part I. Understanding the picoJava-II Architecture 1. Overview 3 1.1 Purpose 3 1.2 Relationship to the Java Virtual Machine 4 1.3 Key Elements of the Core 4 2. Registers 5 2.1 Program Counter Register (PC)5 2.2 Stack Management Registers 6 2.2.1 Local Variable Pointer Register (VARS)6 2.2.2 FRAME Pointer Register (FRAME)7 2.2.3 Top-of-Stack Pointer Register (OPTOP)7 2.2.4 Minimum Value of Top-of-Stack Register (OPLIM)8 2.2.5 Address of Deepest Stack Cache Entry Register (SC_BOTTOM)8 2.3 Constant Pool Base Pointer Register (CONST_POOL)9 2.4 Memory Protection Registers (USERRANGE1 and USERRANGE2)10 2.5 Processor Status Register (PSR)10 2.6 Trap Handler Address Register (TRAPBASE)12 2.7 Monitor-Caching Registers 12 Contents iii 2.7.1 Lock Count Registers (LOCKCOUNT[0..1]) 13 2.7.2 Lock Address Registers (LOCKADDR[0..1]) 13 2.8 Garbage Collection Register (GC_CONFIG)14 2.9 Breakpoint Registers 15 2.10 Implementation Registers 17 2.10.1 Version ID Register (VERSIONID)17 2.10.2 Hardware Configuration Register (HCR)18 2.11 Global Registers (GLOBAL[0..3]) 20 3. Memory System and Caches 21 3.1 Architecture of the Memory System 21 3.1.1 Address Space 22 3.1.2 Alignment 22 3.1.3 Cacheable and Noncacheable Memory Regions 23 3.1.4 Endianness 23 3.1.5 Erroneous Memory Transactions 26 3.2 Memory Protection 27 3.2.1 The Address-Checking Process 27 3.2.2 Memory Regions 28 3.2.3 Limits for Stack Growth 29 3.3 Cache Coherency 30 3.3.1 Coherency for Stack and Data Accesses 30 3.3.2 Coherency for Instruction Accesses 32 3.4 Instruction Cache 33 3.4.1 Configuration 33 3.4.2 Initialization 34 3.4.3 Operations 34 3.4.4 Modification of Instruction Space 35 3.5 Data Cache 36 3.5.1 Configuration 36 iv picoJava-II Programmer’s Reference Manual - March 1999 3.5.2 Initialization 37 3.5.3 Operations 37 3.6 Stack Cache 39 3.6.1 Configuration 39 3.6.2 Initialization 40 3.6.3 Dribbling 41 3.6.4 Flushing 44 4. Traps and Interrupts 45 4.1 Traps 45 4.1.1 Trap Table 46 4.1.2 The Process of Taking a Trap 46 4.1.3 Trap Types and Priorities 50 4.2 Instruction Emulation 54 4.3 Exceptions 54 4.4 Interrupts 56 4.4.1 Interrupt Control 57 4.4.2 Interrupt Latency 57 4.5 Context Switch 58 5. Data Types and Runtime Data Structures 61 5.1 Primitive Data Types 61 5.1.1 Integral Data Types 62 5.1.2 Floating-Point Data Types 62 5.2 Reference Types and Values 62 5.2.1 References and Headers 63 5.2.2 Object Storage 64 5.2.3 Array Storage 65 5.2.4 Layout of Array Data Structures 67 5.3 Essential Runtime Data Structures 71 Contents v 5.3.1 Method Vector and Runtime Class Info Structure 71 5.3.2 Method Structure 72 5.3.3 Class Structure 73 5.3.4 Constant Pool 73 6. Instruction Set 75 Part II. Programming the picoJava-II Core 7. Java Method Invocation and Return 385 7.1 Allocating a New Frame 385 7.1.1 Incoming Arguments 386 7.1.2 Local Variables 387 7.1.3 Invoker’s Method Context 387 7.1.4 Operand Stack 387 7.2 Invoking a Method 388 7.2.1 Resolving a Method Reference 388 7.2.2 Accessing a Method Structure 388 7.2.3 Allocating a New Method Frame 389 7.2.4 Saving the Invoker’s Method Context 391 7.2.5 Passing Control to the Invoked Method 391 7.3 Invoking a Synchronized Method 391 7.4 Returning from a Method 393 8. Monitors 395 8.1 Structures 396 8.2 Hardware Synchronization 396 8.3 Software Support 397 8.3.1 LockCountOverflow Handler 397 8.3.2 LockEnterMiss Handler 397 8.3.3 LockRelease Handler 398 8.3.4 LockExitMiss Handler 399 vi picoJava-II Programmer’s Reference Manual - March 1999 8.3.5 Context Switch Support 400 9. Support of the C Programming Language 401 9.1 Register Conventions 402 9.2 Runtime Stack Architecture 402 9.2.1 Calling Convention for C-to-C Calls 404 9.2.2 Rules for Passing Arguments 404 9.2.3 Function Return Values 405 9.2.4 Function Prologue and Epilogue 405 9.2.5 Functions with Simple Parameters and Locals 406 9.2.6 Functions with Complex Parameters and Locals 408 9.2.7 Functions That Return Aggregate Values 412 9.2.8 Functions with Variable Number of Arguments 415 9.3 Calling Conventions for Java-to-C Calls 420 9.4 Optimizations 421 9.5 Function Tables 422 9.5.1 Structure 422 9.5.2 Properties 423 9.5.3 Provisions in the Operating System 423 9.5.4 _init and _fini 424 9.5.5 OSGetNArgs Algorithm 424 9.5.6 Extensions to Support .so (.dll) Files 425 9.6 Handling of Argument Mismatches 425 9.7 Object File Formats 426 10. Stack Chunking 429 10.1 Overview 429 10.2 oplim_trap Handler 430 10.3 Manual Updates of the VARS Register 431 10.4 Returns to Previously Saved Program States 432 10.5 Possible Write-After-Write Hazards 432 Contents vii 11. Support for Garbage Collection 433 11.1 Hardware Support 433 11.1.1 Support for Handles 434 11.1.2 Reserved Bits in References and Headers 434 11.2 Write Barriers 434 11.2.1 Instructions Subject to Write-Barrier Checks 436 11.2.2 Page-Based Write Barrier 436 11.2.3 Reference-Based Write Barrier 439 11.3 Examples 439 11.3.1 Train Algorithm-Based Collectors 440 11.3.2 Remembered Set-Based Generational Collector 440 11.4 References 441 12. System Management and Debugging 443 12.1 Power Management 443 12.2 Reset Management 444 12.2.1 Machine State After Reset 444 12.2.2 Enabling the Stack Cache 446 12.2.3 Enabling the Instruction and Data Caches 447 12.3 Breakpoints 450 12.3.1 Data Breakpoints 451 12.3.2 Instruction Breakpoints 451 12.3.3 Breakpoint Registers 451 12.3.4 Breakpoint Address Matching 454 12.3.5 Breakpoints and Halt Mode 454 12.4 Other Debug and Trace Features 454 Part III. Appendixes A. Opcodes 457 Index 477 viii picoJava-II Programmer’s Reference Manual - March 1999 Figures FIGURE 2-1 Program Counter Register (PC) 6 FIGURE 2-2 Local Variable Pointer Register (VARS) 6 FIGURE 2-3 FRAME Pointer Register (FRAME) 7 FIGURE 2-4 Top-of-Stack Pointer Register (OPTOP) 7 FIGURE 2-5 Minimum Value of Top of Stack Register (OPLIM) 8 FIGURE 2-6 Address of Deepest Stack Cache Entry Register (SC_BOTTOM) 9 FIGURE 2-7 Constant Pool Base Pointer Register (CONST_POOL) 9 FIGURE 2-8 USERRANGE Registers 10 FIGURE 2-9 Processor Status Register (PSR) 12 FIGURE 2-10 Trap Handler Address Register (TRAPBASE) 12 FIGURE 2-11 Lock Count Registers (LOCKCOUNT0 and LOCKCOUNT1) 13 FIGURE 2-12 Lock Address Registers (LOCKADDR0 and LOCKADDR1) 14 FIGURE 2-13 Garbage Collection Register (GC_CONFIG) 15 FIGURE 2-14 Breakpoint Register (BRK1A) 15 FIGURE 2-15 Breakpoint Register (BRK2A) 15 FIGURE 2-16 Breakpoint Control Register (BRK12C) 17 FIGURE 2-17 Version ID Register (VERSIONID) 18 FIGURE 2-18 Hardware Configuration Register (HCR) 19 FIGURE 2-19 Global (GLOBAL[0..3]) Registers 20 Figures ix FIGURE 3-1 The Cacheable and Noncacheable Memory Regions 23 FIGURE 3-2 How a Range of Accessible Memory Is Formed from USERRANGE Register Values 29 FIGURE 3-3 Caching Operations During Instruction Execution 30 FIGURE 3-4 How the Stack Cache Caches Part of the Stack 40 FIGURE 4-1 Data Structure of the Trap Table 46 FIGURE 4-2 Invocation of a Trap 48 FIGURE 4-3 Return from a Trap 49 FIGURE 4-4 Interrupt Control Mechanism 57 FIGURE 5-1 Object or Array Reference Format 63 FIGURE 5-2 Object or Array Header Field with Reserved Bits 64 FIGURE 5-3 Object Format with Handle Bit Clear 64 FIGURE 5-4 Object Format with Handle Bit Set 65 FIGURE 5-5 Array Format with Handle Bit Clear 66 FIGURE 5-6 Array Format with Handle Bit Set 66 FIGURE 5-7 Array of Longs Structure 67 FIGURE 5-8 Array of Doubles Structure 67 FIGURE 5-9 Array of Objects Structure 68 FIGURE 5-10 Array of Arrays Structure 68 FIGURE 5-11 Array of Integers Structure 69 FIGURE 5-12 Array of Floats Structure 69 FIGURE 5-13 Array of Chars Structure 69 FIGURE 5-14 Array of Shorts Structure 70 FIGURE 5-15 Array of Bytes Structure 70 FIGURE 5-16 Array of

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