Power Macintosh 5400 Computer Developer Note
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Developer Note Power Macintosh 5400 Computer Developer Note 4/12/96 Developer Press © Apple Computer, Inc. 1995 Apple Computer, Inc. ITC Zapf Dingbats is a registered LIMITED WARRANTY ON MEDIA AND © 1996 Apple Computer, Inc. trademark of International Typeface REPLACEMENT All rights reserved. Corporation. If you discover physical defects in the No part of this publication may be Motorola is a registered trademark of manual or in the media on which a software reproduced, stored in a retrieval Motorola Corporation. product is distributed, APDA will replace system, or transmitted, in any form or NuBus is a trademark of Texas the media or manual at no charge to you by any means, mechanical, electronic, Instruments. provided you return the item to be replaced photocopying, recording, or otherwise, PowerPC is a trademark of with proof of purchase to APDA. without prior written permission of International Business Machines ALL IMPLIED WARRANTIES ON THIS Apple Computer, Inc. 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Contents Figures and Tables vii Preface About This Note ix Contents of This Note ix Supplemental Reference Documents x For More Information x Conventions and Abbreviations xi Typographical Conventions xi Standard Abbreviations xii Chapter 1 Introduction 1 Summary of Features 2 Comparison With Power Macintosh 5200 Computer 3 External Features 4 Front View 4 Back View 5 Access to the Logic Board 6 Front Panel Push Buttons 6 Power On and Off 6 Optional Features 7 TV Tuner 7 Video Input 8 Video Display Mirror Out 9 Communications 9 Compatibility Issues 10 Microprocessor Differences 10 POWER-Clean Code 10 Completion Serialized Instructions 10 Split Cache 11 Data Alignment 11 Communications Slot 11 DAV Slot 11 Expansion Slot 12 RAM Expansion 12 RAM DIMM Dimensions 12 Cache Expansion 12 ATA (IDE) Hard Disk 13 iii Chapter 2 Architecture 15 Block Diagram and Main ICs 16 PowerPC 603e Microprocessor 16 Memory Subsystem 16 ROM 16 Second Level Cache (Optional) 16 System RAM 18 Custom ICs 18 PSX IC 18 O’Hare IC 18 AWACS Sound IC 19 Cuda IC 19 Valkyrie-AR IC 20 Display RAM 20 Chapter 3 I/O Features 23 Serial I/O Ports 24 ADB Port 25 Disk Drives 26 Floppy Disk Drive 26 ATA (IDE) Hard Disk 27 Hard Disk Specifications 27 Hard Disk Connectors 29 Pin Assignments 29 ATA (IDE) Signal Descriptions 30 CD-ROM Drive 30 SCSI Bus 31 SCSI Connectors 31 SCSI Bus Termination 32 Sound 32 Sound Output 33 Sound Input 33 Sound Input Specifications 33 Routing of the Sound Signals 33 Digitizing Sound 34 Sound Modes 34 Keyboard 34 Built-in Video 35 Optional Video Display Mirror Output Feature 35 External Video Monitors 36 Video Timing Parameters 37 iv Chapter 4 Expansion Features 41 RAM DIMMs 42 RAM DIMM Connectors 43 RAM Address Multiplexing 46 RAM Devices 47 RAM Refresh 47 RAM DIMM Dimensions 47 Level-2 Cache DIMM 49 PCI Expansion Slot 52 The DAV Connector 53 Pin Assignments 55 Signal Descriptions 56 Using the YUV Bus 56 Video Data Format 57 The PCI-Bus Communications Slot 58 PCI-Bus Communications Slot Connector 58 Universal Serial Modem Card 60 Chapter 5 Software Features 65 ROM Software 66 Machine Identification 66 System Software 66 New Features 67 Large Volume Support 67 64-Bit Volume Addresses 67 System-Level Software 67 Application-Level Software 68 Limitations 68 Drive Setup 69 Open Transport 69 New Features of Open Transport 70 Compatibility 70 Open Firmware Startup 71 Monitors & Sound Control Panel 72 Energy Saver Software 73 Features of the New Energy Saver Application 73 Performance Enhancements 74 Dynamic Recompilation Emulator 74 Resource Manager in Native Code 75 Math Library 75 New BlockMove Extensions 75 Hardware Support Features 77 PCI Bus Support 77 Removal of Slot Manager Dependencies 77 v PCI Compatibility 78 POWER-Clean Native Code 78 POWER Emulation 79 POWER-Clean Code 79 Limitations of PowerPC 601 Compatibility 79 Emulation and Exception Handling 80 Code Fragments and Cache Coherency 80 Display Manager 81 Support of Native Drivers 81 Chapter 6 Large Volume Support 83 Overview of the Large Volume File System 84 API Changes 84 Allocation Block Size 84 File Size Limits 85 Compatibility Requirements 85 The API Modifications 85 Chapter 7 Software for the ATA (IDE) Hard Disk 93 Introduction to ATA Software 94 ATA Disk Driver 95 ATA Manager 96 ATA Disk Driver Reference 96 High-Level Device Manager Routines 97 ATA Manager Reference 110 The ATA Parameter Block 110 Setting Data Transfer Timing 116 Setting Up PIO Data Transfers 117 Setting Up Multiword and Singleword DMA Data Transfers 117 Functions 117 Result Code Summary 144 Index 147 vi Figures and Tables Chapter 1 Introduction 1 Figure 1-1 Front view of the computer 5 Figure 1-2 Back view of the computer 6 Table 1-1 Comparison with the Power Macintosh 5200 series computer 3 Chapter 2 Architecture 15 Figure 2-1 System block diagram 17 Chapter 3 I/O Features 23 Figure 3-1 Serial port sockets 24 Figure 3-2 Maximum dimensions of the hard disk 28 Figure 3-3 Video timing diagram 38 Table 3-1 Serial port signals 24 Table 3-2 ADB connector pin assignments 25 Table 3-3 Pin assignments on the floppy disk connector 26 Table 3-4 Pin assignments on the ATA (IDE) hard disk connector 29 Table 3-5 Signals on the ATA (IDE) hard disk connector 30 Table 3-6 Specifications of the AppleCD 600i CD-ROM drive 31 Table 3-7 Pin assignments for the SCSI connectors 31 Table 3-8 Reset and NMI key combinations 35 Table 3-9 Video mirror connector pin assignments 35 Table 3-10 Maximum pixel depths for video monitors 37 Table 3-11 Monitors supported 37 Table 3-12 Video timing parameters for smaller monitors 39 Table 3-13 Video timing parameters for larger monitors 40 Chapter 4 Expansion Features 41 Figure 4-1 Dimensions of the RAM DIMM 48 Figure 4-2 Location of the DAV connector 54 Figure 4-3 Orientation of the DAV connector 54 Figure 4-4 Video data timing 57 Figure 4-5 Universal modem card for communications slot 61 Table 4-1 Memory sizes and configurations 42 Table 4-2 Pin assignments on the RAM DIMM connectors 43 Table 4-3 RAM DIMM signals 46 Table 4-4 Address multiplexing modes for various DRAM devices 46 Table 4-5 Address multiplexing in noninterleaved banks 47 vii Table 4-6 Pin and signal assignments for level-2 cache DIMM connector 49 Table 4-7 Signal descriptions for level-2 cache DIMM connector 50 Table 4-8 PCI signals 52 Table 4-9 Pin assignments on the DAV connector 55 Table 4-10 Descriptions of the signals on the DAV connector 56 Table 4-11 Pin assignments for the PCI-bus communications slot connector 58 Table 4-12 Pin assignments for a universal serial modem card 62 Chapter