Investigation on Hybrid Energy Storage Systems and Their Application in Green Energy Systems

electronics

Article Investigation on Hybrid Energy Storage Systems and Their Application in Green Energy Systems

Chao-Tsung Ma 1,* and Chin-Lung Hsieh 2 1 Department of Electrical Engineering, National United University, Miaoli 36063, Taiwan 2 Institute of Nuclear Energy Research (INER), Atomic Energy Council, Taoyuan 325207, Taiwan; [email protected] * Correspondence: [email protected]

Received: 23 October 2020; Accepted: 11 November 2020; Published: 13 November 2020

Abstract: Power systems all over the world have been under development towards microgrids integrated with renewable energy-based distributed generation. Due to the intrinsic nature of output power fluctuations in renewable energy-based power generation, the use of proper energy storage systems and integrated real-time power and energy control schemes is an important basis of sustainable development of renewable energy-based distributed systems and microgrids. The aim of this paper is to investigate the characteristics and application features of an integrated compound energy storage system via simulation and a small-scale hardware system implementation. This paper first discusses the main components, working principles and operating modes of the proposed compound energy storage system. Then, a detailed design example composed of supercapacitors, batteries, and various controllers used in two typical application scenarios, peak demand shaving and power generation smoothing, of a grid-connected microgrid is systematically presented. Finally, an experimental setup with proper power converters and control schemes are implemented for the verification of the proposed control scheme. Both simulation and implementation results prove that the proposed scheme can effectively realize desired control objectives with the proposed coordinated control of the two energy storage devices.

Keywords: microgrid (MG); renewable energy (RE); distributed generation (DG); energy storage system (ESS); compound energy storage system (CESS)

1. Introduction In recent years, with the increase of the global population and rapid economic development, human demand for energy is rapidly increasing and the global warming eﬀects caused mostly by conventional power generation has become a major issue that countries all over the world must face together [1,2]. In addition, the use of conventional fossil fuels will soon yield problems, such as the rapid reduction in reserves and the unaﬀordable cost for the emission of greenhouse gases, which highlights the importance of developing alternative energy sources. Therefore, low-carbon energy technologies, such as nuclear energy and renewable energy (RE), have become the development goals of countries all over the world. Relatively mature RE power generation technologies include wind turbine (WT), solar photovoltaic (PV), hydropower, biomass energy, and geothermal energy generation, among which WT generation and solar PV generation are the mainstream of development. The projection in International Energy Outlook 2019 shows that, by 2050, the proportion of global RE power generation will increase to nearly 50%, as shown in Figure1, and the proportion of WT and solar PV together in RE power generation will increase to over 70%, as shown in Figure2[ 2]. The advantages of RE include: (1) Inexhaustible and widely distributed; and (2) no fuel and extremely environmentally friendly. However, the grid connected with a large number of such unstable generation systems will have a

Electronics 2020, 9, 1907; doi:10.3390/electronics9111907 www.mdpi.com/journal/electronics Electronics 2020, 9, 1907 2 of 20

ElectronicsElectronics 20202020,, 99,, xx FORFOR PEERPEER REVIEWREVIEW 22 ofof 2121 negative impact on the supply power quality (PQ) and reliability of existing power systems. Therefore, numbernumber ofof suchsuch unstableunstable generationgeneration systemssystems wiwillll havehave aa negativenegative impactimpact onon thethe supplysupply powerpower in order to reduce the unavoidable impact caused by the ﬂuctuation of RE generation, such generation qualityquality (PQ)(PQ) andand reliabilityreliability ofof existingexisting powerpower systems.systems. Therefore,Therefore, inin orderorder toto reducereduce thethe unavoidableunavoidable systems are often combined with energy storage systems (ESSs), forming a hybrid generation system impactimpact causedcaused byby thethe fluctuationfluctuation ofof RERE generatigeneration,on, suchsuch generationgeneration systemssystems areare oftenoften combinedcombined in which ESSs absorb the ﬂuctuation of power generation, achieving power smoothing and optimal withwith energyenergy storagestorage systemssystems (ESSs),(ESSs), formingforming aa hybridhybrid generationgeneration systemsystem inin whichwhich ESSsESSs absorbabsorb thethe energy management [3]. fluctuationfluctuation ofof powerpower generation,generation, achievingachieving powepowerr smoothingsmoothing andand optimaloptimal energyenergy managementmanagement [3].[3].

Figure 1. Record and projection of world electricity generation and shares by source [2].

FigureFigure 2.2. RecordRecord andand projectionprojection ofof worldworld RERE electricityelectricity generationgeneration andand sharessharesby bysource source [ 2[2].].

ThereThereThere are areare two twotwo types typestypes of ofof ESS, ESS,ESS, i.e., i.e.,i.e., power-type power-typepower-type energy enerenergygy storage storagestorage (PTES) (PTES)(PTES) units, units,units, such suchsuch asasas SC, SC,SC, flywheel, flywheel,flywheel, andandand superconducting superconductingsuperconducting magnetic magneticmagnetic energy energyenergy storage, storage,storage, and andand energy-type energy-typeenergy-type energy energyenergy storage storagestora (ETES)ge (ETES)(ETES) units, units,units, such suchsuch as variousasas variousvarious types typestypes of batteries. ofof batteries.batteries. Since SinceSince these thesethese two twotwo ESSs ESSsESSs have hahaveve their theirtheir own ownown characteristics. characteristics.characteristics. If IfIf proper properproper function functionfunction allocationallocationallocation can cancan be bebe carried carriedcarried out outout according accordingaccording to certain toto certaicertai criteriann criteriacriteria to form toto aformform compound aa compoundcompound energy storageenergyenergy systemstoragestorage (CESS),systemsystem (CESS), the(CESS), greatest thethe greatestgreatest overall overall benefitoverall benefitbenefit can be cancan obtained bebe obtainedobtained [4]. Take [4].[4]. Take theTake power-smoothing thethe power-smoothingpower-smoothing control controlcontrol in RE inin basedRERE basedbased power powerpower generation generationgeneration and energy andand energyenergy balancing balancingbalancing optimization optimizationoptimization control incontrolcontrol an MG inin as anan an MGMG example, asas anan applyingexample,example, CESSapplyingapplying can bringCESSCESS greatcancan bringbring benefits: greatgreat the bebe PTESnefits:nefits: unit thethe PTES canPTES be unitunit used cancan to smoothbebe usedused powertoto smoothsmooth fluctuations powerpower fluctuationsfluctuations with large amplitudewithwith largelarge and amplitudeamplitude high frequency andand highhigh in frequencyfrequency the active distributioninin thethe activeactive network distributiondistribution of the networknetwork MG, which ofof thethe fully MG,MG, demonstrates whichwhich fullyfully itsdemonstratesdemonstrates advantages ofitsits large advantagesadvantages power outputofof largelarge density, powerpower high outputoutput response density,density, speed, highhigh and responseresponse considerable speed,speed, numberandand considerableconsiderable of cycles; thenumbernumber ETES unitofof cycles;cycles; can be thethe used ETESETES to smooth unitunit cancan low-frequency bebe usedused toto powersmoothsmooth fluctuation low-frequencylow-frequency and perform powerpower real-timefluctuationfluctuation power andand balanceperformperform and real-timereal-time dispatch, powerpower which balancebalance fully demonstratesandand dispatch,dispatch, itswhichwhich advantages fullyfully demonstratesdemonstrates of large capacity itsits advantagesadvanta [5]. Furthermore,ges ofof largelarge thecapacitycapacity abovementioned [5].[5]. Furthermore,Furthermore, CESS the canthe abovementionedabovementioned effectively reduce CECE theSSSS number cancan effectivelyeffectively of times reducereduce of charging thethe numbernumber/discharging ofof timestimes and ofof charging/dischargingcharging/discharging andand depthdepth ofof dischargedischarge (DoD)(DoD) ofof PTESPTES toto extendextend itsits life.life. InIn addition,addition, thethe optimizedoptimized configurationconfiguration ofof CESSCESS cancan bringbring moremore economicaleconomical andand reliablereliable activeactive distributiondistribution networknetwork operation.operation. Electronics 2020, 9, 1907 3 of 20

Electronics 2020, 9, x FOR PEER REVIEW 3 of 21 depth of discharge (DoD) of PTES to extend its life. In addition, the optimized configuration of CESS At present, most of the small and medium-capacity RE power generation systems are can bring more economical and reliable active distribution network operation. equipped with various energy storage devices (ESD) and can be divided into standalone and At present, most of the small and medium-capacity RE power generation systems are equipped grid-connected architectures. Although general hybrid RE power generation systems can be easily with various energy storage devices (ESD) and can be divided into standalone and grid-connected combined with CESSs to deal with the problem of power generation fluctuations and serve as an architectures. Although general hybrid RE power generation systems can be easily combined with interface for power management, real-time power optimization and integrated management and CESSs to deal with the problem of power generation fluctuations and serve as an interface for power power coordination between subsystems still pose considerable challenges. Therefore, how to management, real-time power optimization and integrated management and power coordination design RE-based power generation systems considering both stability and high efficiency with between subsystems still pose considerable challenges. Therefore, how to design RE-based power integrated CESS topologies and control schemes has become a popular research topic. Reasonable generation systems considering both stability and high efficiency with integrated CESS topologies and configuration of CESS and capacity planning is a problem related to customization and system control schemes has become a popular research topic. Reasonable configuration of CESS and capacity optimization. The usual method is to find the best solution through an algorithm after establishing planning is a problem related to customization and system optimization. The usual method is to find relevant mathematical models. the best solution through an algorithm after establishing relevant mathematical models. In theory, there are a number of possible power interface configurations for HESS. The In theory, there are a number of possible power interface configurations for HESS. The dual- dual-converter configuration is considered the most flexible and robust one regarding control converter configuration is considered the most flexible and robust one regarding control independency, independency, CTES life, DC bus voltage stability and HESS utilization. This configuration is CTES life, DC bus voltage stability and HESS utilization. This configuration is adopted as the interface adopted as the interface topology of the proposed integrated CESS (ICESS) investigated in this topology of the proposed integrated CESS (ICESS) investigated in this paper, as shown in Figure3. paper, as shown in Figure 3.

DC Bus AC Bus

PV Modules Grid

WTG

BESS

RS232

DSP PC

Figure 3. Figure 3.A A dual-converterdual-converterinterfaced interfaced CESSCESS andand thetheMG MG system. system. In the past decade, a lot of papers discussing the development and application of CESS have In the past decade, a lot of papers discussing the development and application of CESS have been published in the literature [6]. In [6], a comprehensive review on recently published papers been published in the literature [6]. In [6], a comprehensive review on recently published papers investigating feasible topologies, usable voltage ranges, capacity utilization factors, and application investigating feasible topologies, usable voltage ranges, capacity utilization factors, and application cases of CESS is presented with brief comments. In the aspect of connecting the CESS with the DC cases of CESS is presented with brief comments. In the aspect of connecting the CESS with the DC bus, passive connection of both battery and supercapacitor to the system is the simplest topology [7]. bus, passive connection of both battery and supercapacitor to the system is the simplest topology It has been proved that this simple topology can effectively suppress transient load current induced by [7]. It has been proved that this simple topology can effectively suppress transient load current pulse load conditions with a relatively low cost; however, the system current will be drawn from or induced by pulse load conditions with a relatively low cost; however, the system current will be feed into the two storage units based on their respective internal impedances. This significantly limits drawn from or feed into the two storage units based on their respective internal impedances. This the transient power handing capability of the supercapacitor unit. To improve the abovementioned significantly limits the transient power handing capability of the supercapacitor unit. To improve shortcoming of passive connection and make better use of the storage units in a passive connected the abovementioned shortcoming of passive connection and make better use of the storage units in CESS, power electronic converters can be used to allow the real-time power flow to be actively a passive connected CESS, power electronic converters can be used to allow the real-time power controlled. To balance the complexity of controlling two converters and system cost, in a semi-active flow to be actively controlled. To balance the complexity of controlling two converters and system cost, in a semi-active CESS topology, only one of the two ESS elements is actively controlled [8]. In a semi-active CESS topology, only one of the storage units in CESS (either battery unit [9] or

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CESS topology, only one of the two ESS elements is actively controlled [8]. In a semi-active CESS topology, only one of the storage units in CESS (either battery unit [9] or supercapacitor unit [10]) is interfaced to the DC bus via a bidirectional DC/DC converter. To further improve the overall system performance and enhance the operating flexibility of the CESS a full active CESS topology was proposed [11]. In a full active CESS topology, both the power flow of battery and supercapacitor can be actively controlled via properly designed DC/DC converters. It should be noted that the performance of a full active CESS system is extremely dependent on the performance of power flow control systems designed for the DC/DC converters [12,13]. In regard to CESS applications, Hajiaghasi et al. [14] reviewed on CESSs for MG applications regarding power dispatch, RE power smoothing, PQ improvement, and ancillary service. Chen et al. [15] proposed model predictive control-based multi-time-scale optimal dispatch for a flexible traction power supply system based on a back-to-back converter, a battery-SC CESS, and PV generation. In [16], a novel adaptive fuzzy logic controller algorithm was proposed for the power management of a standalone DC MG integrated with solar PV generation and a CESS based on a battery and multiple SCs. It was pointed out that conventional fuzzy logic controllers for MG power sharing might cause over- or under-utilization of the CESS in a standalone MG because it only considered one ESD at a time. A leaderless consensus protocol was utilized in [17] for distributed cooperative control of multiple battery-SC CESSs in a DC MG with multiple PV generators. Nakka and Mishra [18] used droop and virtual inductance control for the power sharing among inverters as well as frequency regulation in an islanded hybrid AC/DC MG with PV generation and a battery-SC CESS. In [19], the fluctuation of grid-connected WT generation output was dealt with a battery-SC CESS and an adaptive SoC range control based on the concept of virtual capacity. Rain flow counting-based capacity planning and optimization of a battery-SC CESS for PV-WT generation smoothing in a complex grid-connected regional integrated power system based on wavelet packet decomposition was studied in [20]. Kumar et al. [21] studied the design, operation, and control of a vast islanded DC MG integrated with solar PV-WT generation, battery-SC CESS, step changing DC loads, and single-phase linear, nonlinear, and three-phase inductive AC loads. In [22], a nonlinear integral backstepping control was proposed for a DC MG with solar PV-WT generation and battery-SC CESS. Only local information was required for the control. Simulation results showed that the proposed control outperformed adaptive sliding mode control. A hybrid AC/DC MG with solar PV-WT generation and battery-SC CESS is controlled with a comprehensive inertial control strategy [23]. Local inertia support and cross-grid inertia support both utilized the rotational kinetic energy of the WT generators (WTGs), yielding satisfactory performance in different operating scenarios regarding load changes. Armghan et al. [24] considered the application of a battery-SC HESS for a grid-connected hybrid AC/DC MG with WT and FC generation for both grid-connected mode and islanding mode. In the above reviewed papers, software simulation has been commonly used as the investigation method. The schematic design methods of the required controllers for the most powerful full active CESS topology using two actively controlled converters still call for investigation. This paper aims to explore how to appropriately design the required controllers and apply them to different types of ESSs in the CESS for achieving reliable and flexible control requirements. Detailed design procedure of controllers along with both simulation studies and hardware tests are carried out in this paper, in which two typical application scenarios, peak demand shaving and power generation smoothing, of a CESS in a grid-connected microgrid are presented. The complete MG system architecture used includes WT and solar PV power generation units, CESS unit, grid-tie inverter, AC and DC loads, and grid as shown in Figure3. In the following sections of this paper, the ICESS functions and typical application modes are firstly described in Section2. The third section presents the controller design of the required power converters. The performance of the designed control system is verified using simulation analyses and hardware implementation tests respectively presented in Sections4 and5. Finally, this paper is concluded in Section6. Electronics 2020, 9, 1907 5 of 20

2. Functional Planning and Hardware Design of ICESS

2.1. Functional Arrangement In this paper, a small-scale grid-connected MG including WT and solar PV power generation systems is used as an example for the analysis and demonstration of two advanced ICESS operation modes (Mode 1 and Mode 2). In the following subsections, the two operating modes and the related control schemes used for the real-time energy management of MG will be brieﬂy described.

2.1.1. Operation Mode 1: Peak Demand Shaving The power demand of general loads varies between peaks and valleys depending on conditions such as day and night and seasons. Therefore, power companies tend to set timely power rates based on different power supply costs, which is called the time price. In terms of user benefits, shifting the electricity consumption during peak hours to off-peak hours according to the time price can greatly save electricity costs; from the perspective of power companies, peak demands can be decreased, reducing the demand in constructing new power plants and supply costs. However, even if the electricity consumption habits can be adjusted, users cannot completely avoid electricity consumption during peak hours. If there are other electricity sources, the more expensive utility power during peak hours can be better avoided. The primary condition for the operation of this operating mode is that the ETES has sufficient power, and the solar PV/WT power generation conditions exist at the same time slot. In this case, the power demand of the loads can be supplied first by solar PV/WT power generation, and the excess power is used to charge the battery; when the power generation is insufficient, the battery will make up for it. In this way, users can avoid using utility power at peak hours and achieve the goal of zero peak power demand.

2.1.2. Operation Mode 2: RE Power Generation Smoothing Under the change of external power generation conditions, if solar PV/WT power generation is operated in MPPT mode, the output power will inevitably change drastically. The purpose of this control function is to reduce the impact of solar PV/WT power generation on the connected grid and improve the stability and PQ of the MG, which is achieved by fast charging/discharging of the ICESS. In this case, the bidirectional DC-DC converter performs charge and discharge control according to the power smoothing command within the safety SoC range of the ICESS; the grid-tie inverter is responsible for maintaining DC bus voltage at 200 V. In this way, the active power at both ends can be automatically and bidirectionally balanced, achieving the goal of solar PV/WT output power smoothing.

2.2. System Architecture Figure4 shows the proposed ICESS hardware system architecture discussed in this paper. The blue blocks are the ICESS units designed and demonstrated. To build an experimental system, a 96 V/14 Ah battery bank, a 117.6 V/14.28F SC bank, a 1 kVA bidirectional single-phase grid-tie inverter, and two 1-kW bidirectional DC-DC buck-boost battery/SC charging/discharging converters are practically constructed with switching frequency of 100 kHz. The solar PV/WT generation with maximum power point tracking (MPPT) functions is emulated using a programmable DC power supply. Related system parameters and speciﬁcations are listed in Table1. Electronics 2020, 9, 1907 6 of 20 Electronics 2020, 9, x FOR PEER REVIEW 6 of 21

ETES PTES Battery bank SC bank 12 V * 8 2.8 V * 42 +- +-

Solar PV/WT Buck-boost Buck-boost generation DC-DC DC-DC emulator converter converter 200V DC bus Single-phase DC load grid-tie inverter AC bus

110V AC load Grid

Figure 4. Proposed ICESS hardware architecture. Figure 4. Proposed ICESS hardware architecture. Table 1. Specifications of proposed ICESS and related equipment. Table 1. Specifications of proposed ICESS and related equipment. Item Specification Item Specification DC bus voltage Vbus 200 V DC bus voltage Vbus 200 V Grid voltage Vs 110 Vrms/60 Hz MaximumGrid power voltage output Vs 110 Vrms/60 1 kVA Hz MaximumBattery power bank output 96 1 V kVA/14 Ah (8 batteriesBattery in series)bank (1296 V/ 14V/14 Ah Ah each) SC bank 117.6 V/14.28 F (8(42 batteries SCs in series) in series) (12(2.8 V/14 V/600 Ah F each)each) Battery chargingSC bank current Ib 117.6Up V/14.28 to 10 A F (42 SCs in series) PV:(2.8 up toV/600 600 WF /each)35~40 V PV/WTG emulator WTG: up to 300 W (ProgrammableBattery charging DC power current supply) Ib Up to 10 A PV: up(with to 600 MPPT) W/35~40 V Single-phasePV/WTG full-bridge emulator 1 kVA/100 kHz WTG: up to 300 W (Programmablegrid-tie inverter DC power supply) (110 Vrms/up to 10 Arms) Bidirectional DC-DC buck-boost (with MPPT) 1 kW/100 kHz Single-phasebattery converter full-bridge 1 kVA/100 kHz Bidirectional DC-DC buck-boost grid-tie inverter (110 Vrms/up1 kW/100 to kHz 10 Arms) SC converter Bidirectional DC-DC buck-boost Voltage regulation error < 2% Inverter output voltage requirements 1 kW/100 kHz battery converter THD < 3% (full load, resistive) Bidirectional DC-DC buck-boost Inverter: >92% (resistive load) Converter efficiencies 1 kW/100 kHz SC converter DC-DC converters: >92% Voltage regulation error < 2% Inverter output voltage requirements 3. Controller Design of ICESS Converters THD < 3% (full load, resistive) Inverter: >92% (resistive load) 3.1. Single-Phase Full-BridgeConverter Grid-Tie efficiencies Inverter DC-DC converters: >92% Single-phase grid-tie inverters generally adopt half-bridge or full-bridge architecture. The full- bridge3. Controller architecture Design is of adopted ICESS inConverters this paper, as shown in Figure5, including four power switches (Q1~Q4), an LC low-pass filter (LPF, L, and Cac), and a DC bus capacitor (Cdc). Sinusoidal pulse width3.1. Single-Phase modulation Full-Brid (SPWM)ge Grid-Tie is used toInverter control the power switches. Dual-loop control architecture is chosen.Single-phase Symbols first grid-tie appearing inverters in Figure generally4 include adop thet following: half-bridgeIL denotesor full-bridge inductor architecture. current; kv1 , Thekv2, andfull-bridgeks denote architecture the sensing is scales adopted of AC in voltage,this pape DCr, voltage,as shown and in AC Figure current, 5, including respectively; fourv buspowerand vswitchesbus* denote (Q1~Q4), the feedback an LC andlow-pass command filter signals (LPF, L, of and DC busCac), voltage, and a DC respectively; bus capacitoriL and (CidcL).* denoteSinusoidal the pulse width modulation (SPWM) is used to control the power switches. Dual-loop control

Electronics 2020, 9, x FOR PEER REVIEW 7 of 21 architecture is chosen. Symbols first appearing in Figure 4 include the following: IL denotes inductor Electronics 2020, 9, 1907 7 of 20 current; kv1, kv2, and ks denote the sensing scales of AC voltage, DC voltage, and AC current, respectively; vbus and vbus* denote the feedback and command signals of DC bus voltage, * respectively;feedback and i commandL and iL denote signals the of inductorfeedback current,and command respectively; signalsvsin( ofω inductort) denotes current, the synchronization respectively; vsin(ωt) denotes the synchronization signal provided by the phase lock loop (PLL) using grid signal provided by the phase lock loop (PLL) using grid voltage; vcon and vcon denote SPWM control voltage; vcon and –vcon denote SPWM control signals; RL denotes DC −equivalent load. Detailed signals; RL denotes DC equivalent load. Detailed speciﬁcations of this circuit including scaling factors specificationsfor current and of voltage this circuit sensors, including the carrier scaling amplitude factors set for for current SPWM andand device voltage values sensors, of output the carrier ﬁlters amplitudeare listed in set Table for 2SPWM. and device values of output filters are listed in Table 2.

IL DCBus Full bridge L

Q Q ks + 1 3 DCLoad Grid Cdc Cac R V A V L bus B s − Q2 Q4

kv2 kv1 Trigging Signals

− vcon vcon iL

* iL

vsin(ωt )

vbus

vbus * Figure 5. Figure 5. ControlControl architecture architecture of single-phase full-bridge grid-tie inverter. Table 2. Speciﬁcations of single-phase grid-tie inverter. Table 2. Specifications of single-phase grid-tie inverter. Item Value Item Value Carrier amplitude vt 5 V Carrier amplitude vt 5 V AC voltage sensing scale kv1 0.0062 V/V v1 ACDC voltage sensingsensing scale scalekv 2k 0.00620.012 V/V V/V DCAC voltage current sensing scale scaleks kv2 0.0120.05 V/V V/A DCAC bus current voltage sensing variation scale limit ks 0.05 V/A 5% µ DC busDC voltage bus capacitor variationCdc limit 663 5%F/300~400 V Filter capacitor Cac 10 µF/165~220 Vrms DCFilter bus inductorcapacitorL Cdc 663 μF/300~40097 µH V Filter capacitor Cac 10 μF/165~220 Vrms Filter inductor L 97 μH 3.1.1. Inductor Current Controller

3.1.1.In Inductor Figure5 Current, both switching Controller legs are controlled using PWM technique. Letting kpwm = Vbus/vt, we can express the voltage across the inductor as follows: In Figure 5, both switching legs are controlled using PWM technique. Letting kpwm = Vbus/vt, we can express the voltage across the inductordI Las follows: L = kpwmvcon Vs (1) dt −

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dI L = − L k pwmvcon Vs (1) Electronics 2020, 9, x FOR PEER REVIEW dt 8 of 21 According to Equation (1), the grid-tie inverter inductor current control loop can be drawn, as shown in Figure 6, where e denotes controldI error,L = vfb denotes− feedback control signal, vff denotes grid L k pwmvcon Vs (1) Electronicsvoltage feedforward2020, 9, 1907 control signal, Gi adoptsdt a proportional (P) controller, whose proportional8 gain of 20 is k1. According to Equation (1), the grid-tie inverter inductor current control loop can be drawn, as shownAccording in Figure to 6, Equation where e (1), denotes the grid-tie control inverter error, inductorvfb denotes current feedback control control loopcan signal, be drawn, vff denotes as shown grid involtage Figure feedforward6, where e denotes control controlsignal, error,Gi adoptsvfb denotes a proportional feedback (P) control controller, signal, whosevff denotes proportional grid voltage gain 1 feedforwardis k1. control signal, Gi adopts a proportional (P) controller, whose proportional gain is k1. kv1 Vs kkpwm v1

v ff 1 v k V * e fb vcon v1 s 1 i G kkpwm v1 k I L i pwm sL L v ff iL

e v fb v k 1 i * G con k s H I L i pwm i sL L

iL Figure 6. Grid-tie inverter inductor current control loop. k s H According to Figure 5, we can obtain the following: i k k k k k k Figure 6. Grid-tie1 s inverter pwm inductor1 s currentpwm control loop. iL = sL = L = ui ∗ , (2) According toto FigureFigure5 5,, we wei can can obtain obtaink1k the sthek pwm following: following:k1 ksk pwm s + u L 1+ s + i sL L k1kskspwmk pwm k1kk1skpwmsk pwm iL sL L ui where ui denotes the bandwidthiL =of the inductorsL = loop, whLich is= designedui, at one fifth of the switching (2) i = k1kskpwm = k1kskpwm s=+ u , L∗∗ 1 + s + i (2) frequency here, and thus we cani obtaink 1theksLsk Ppwm controller:k1 kL sk pwm s + u L 1+ s + i where u denotes the bandwidth of the inductorsL 1 loop, whichL is designed at one ﬁfth of the switching i ×100k × 2π ×100μ frequency here, and thus we can obtainu × theL P controller: where ui denotes the bandwidthk = of thei inductor= 5 loop, which is designed≅ 6.28 at. one fifth of the switching(3) 1 k × k 0.05× 40 frequency here, and thus we can obtains pwmthe P 1controller: ui L 5 100k 2π 100µ k1 = × = 1× × × 6.28. (3) ks kpwm × 0.05× 40π × μ × × 100k ×2 100 3.1.2. DC Bus Voltage Controller= ui L = 5 ≅ (3) k1 6.28 . 3.1.2. DC Bus Voltage Controller k × k 0.05× 40 Considering the unity power factor,s pwm we can obtain the equivalent circuit of the grid-tie inverter with Consideringthe AC power the mapped unity power onto factor, the DC we side, can obtain as shown the equivalent in Figure circuit7, where of theIr denotes grid-tie load inverter current, with theI3.1.2.c denotes AC DC power Bus capacitor Voltage mapped current, Controller onto the Ibus DC denotes side, as DC shown bus incurrent, Figure v7s, whereand is denoteIr denotes grid load voltage current, andIc current,denotes capacitorrespectively. current, Ibus denotes DC bus current, vs and is denote grid voltage and current, respectively. Considering the unity power factor, we can obtain the equivalent circuit of the grid-tie inverter with the AC power mapped onto the DC side, as shown in Figure 7, where Ir denotes load current, Ir Ibus Ic denotes capacitor current, Ibus denotes DC bus current, vs and is denote grid voltage and current, ^ Ic = ω respectively. vts () Vs sin( t ) RL Cdc Vbus ^ = ω I I its () Is sin( t ) r bus ^ Figure 7. Equivalent circuit of grid-tie Ic inverter with AC = powerω mapped onto the DC side. vts () Vs sin( t ) RL Cdc Vbus ^ In Figure6: = ω In Figure 6: its () Is sin( t ) kdc kdc V C C bus = dc = dc . (4) Figure 7. Equivalent circuit of grid-tie inverter1 with AC power mapped onto the DC side. ∧ s + s + a IS RLCdc

AccordingIn Figure 6: to Equation (4), the grid-tie inverter DC bus voltage control loop can be drawn, as shown in Figure8, where is* denotes grid current feedback, and Gv adopts a type II controller. Here, it is assumed that ui is much greater than the voltage loop bandwidth (uv).

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Electronics 2020, 9, x FOR PEER REVIEW 9 of 21 kdc kdc Vbus Cdc Cdc . ∧ = = (4) kdc1 sk+dca s + VI S C C bus = RdcLCdc = dc . ∧ + (4) + 1 s a According to Equation (4), the gridI-Stie inverters DC bus voltage control loop can be drawn, as RLCdc shown in Figure 8, where is* denotes grid current feedback, and Gv adopts a type II controller. Here, it is assumedAccording that to u Equationi is much (4),greater the thangrid-tie the invertervoltage loopDC bus bandwidth voltage (controluv). loop can be drawn, as * Electronicsshown in2020 Figure, 9, 1907 8, where is denotes grid current feedback, and Gv adopts a type II controller. Here,9 of 20 it is assumed that ui is much greater than the voltage loop bandwidth (uv). ksz( + ) * 1 k * + e 2 is I s dc 1 v Vbus bus ss( + p) k C sa+ ksz()+ * 1s kdc * - e 2 is I s dc 1 v G Vbus bus vbus +v H s()sp ks Cv dc s + a G v v kv2 H bus v

kv2 Figure 8. Grid-tie inverter DC bus voltage control loop.

In Figure 7, the transferFigureFigure function 8.8. Grid-tie of the inverter plant DC can busbus be voltagevoltageexpressed controlcontrol as follows:loop.loop.

In Figure7, the transfer function of the plant cank bev2 expressedkdc as follows: In Figure 7, the transfer function ofH thev ( splant) = can be expressed. as follows: (5) ksCdc (s + a) kvk2k k H (s) == vdc2 dc . (5) Hvv (s) . (5) Considering the influence of the secondaryk rippleskCdcC(s +of(sa the+) a )DC bus voltage on the stability of the controller, the gain crossover frequency of the voltages dc control loop is set to 16 Hz, and the pole and Considering the inﬂuence of the secondary ripple of the DC bus voltage on the stability of the zero Consideringof the controller the areinfluence set at 180of the rad/s secondary and 30 rad/s,ripple respectively, of the DC bus yielding voltage the on transfer the stability function of the of controller, the gain crossover frequency of the voltage control loop is set to 16 Hz, and the pole and thecontroller, type II conthe troller:gain crossover frequency of the voltage control loop is set to 16 Hz, and the pole and zero of the controller are set at 180 rad/s and 30 rad/s, respectively, yielding the transfer function of the zero of the controller are set at 180 rad/s and 30 rad/s, respectively, yielding the transfer function of type II controller: k2 (s + z) 154.1(s + 30) the type II controller: Gv (s) = = . (6) k2(ss(s++z)p) 154.1s((ss++18030)) Gv(s) = + = + . (6) s(ks2+(sp) z) 154s(s +.1(180s )30) Figure 9 shows the open-loopG Bode(s) =plot of the DC= bus voltage control. loop. The phase margin(6) v s(s + p) s(s +180) is 65°Figure. 9 shows the open-loop Bode plot of the DC bus voltage control loop. The phase margin is 65 ◦. Figure 9 shows the open-loop Bode plot of the DC bus voltage control loop. The phase margin Bode Diagram is 65°. 100 Hv Gv Bode Diagram 10050 Hv*Gv Hv Gv 500 Hv*Gv System: Hv*Gv Frequency (rad/s): 99.6 Magnitude (dB) Magnitude -500 Magnitude (dB): 0.0827 System: Hv*Gv Frequency (rad/s): 99.6 Magnitude (dB) Magnitude -100 Magnitude (dB): 0.0827 -500

-100-45 0

-90 -45 Phase (deg) -135 System: Hv*Gv -90 Frequency (rad/s): 99.6 Phase (deg): -115

Phase(deg) -180 -135 -1 0 System: Hv*Gv1 2 3 4 5 10 10 Frequency10 (rad/s): 99.610 10 10 10 Phase (deg): -115Frequency (rad/s) -180 -1 0 1 2 3 4 5 10 10 10 10 10 10 10 Figure 9. Open-loop Bode plot of grid-tie inverter DC bus voltage control loop. Frequency (rad/s) 3.2. DC-DC Buck-Boost Converter The control interfaces for real-time bidirectional charging/discharging required by the battery and SC banks are identical, adopting the configuration of two-switch buck-boost converter, as shown in Figure 10, including two power switches (Q1,Q2), a low-voltage LC filter (L and CLV) and a high-voltage capacitor (CHV). This converter uses single-loop control architecture to control the inductor current. In Figure 10, the symbols appearing for the first time are as follows: Vb denotes ESD voltage, Ib denotes ESD current (equals to inductor current of the converter), ib and ib* denote feedback and command Electronics 2020, 9, x FOR PEER REVIEW 10 of 21

Figure 9. Open-loop Bode plot of grid-tie inverter DC bus voltage control loop.

3.2. DC-DC Buck-Boost Converter The control interfaces for real-time bidirectional charging/discharging required by the battery and SC banks are identical, adopting the configuration of two-switch buck-boost converter, as shown in Figure 10, including two power switches (Q1、Q2), a low-voltage LC filter (L and CLV) and a high-voltage capacitor (CHV). This converter uses single-loop control architecture to control the Electronics 2020, 9, 1907 10 of 20 inductor current. In Figure 10, the symbols appearing for the first time are as follows: Vb denotes ESD voltage, Ib denotes ESD current (equals to inductor current of the converter), ib and ib* denote feedbacksignals of and ESD current,command respectively. signals of The ESD control current command, respectively. can be determined The control according command to the can SoC be of determinedthe ESDs and according system operation to the SoC strategy of the for ESDs real-time and system control. operation Detailed systemstrategy speciﬁcations for real-time including control. Detailedthe maximum system and specifications minimum duty including cycles the respectively maximum set and for minimum the boost andduty buck cycles operating respectively modes set of forICESS the converters,boost and buck output operating current ripplemodes limitation of ICESS andconverters, ﬁlter parameters output current are listed ripple in Table limitation3. and filter parameters are listed in Table 3.

D I 2 Power circuit b + DCBus L ks CHV Q CLV Vbus 2 D V Q 1 b 1 −

Trigging Signals

vcon ib

ib * FigureFigure 10. 10. ControlControl architecture architecture of of buck-boost buck-boost battery/SC battery/SC converter. converter.

Table 3. Table 3. SpecificationsSpeciﬁcations of of buck-boost buck-boost battery/SC battery/SC converter. converter.

ItemItem Value Value MaximumMaximum dutyduty cycle, cycle,D D(boost (boost mode) mode) 0.85 0.85 MinimumMinimum dutyduty cycle, cycle,D D(buck (buck mode) mode) 0.15 0.15 Current output current ripple limitation 10% Current output current ripple limitation 10% High-voltage capacitor CHV 463 µF/300~400 V High-voltage capacitor CHV 463 μF/300~400 V Low-voltage capacitor CLV 8.63 µF/250 Vrms Low-voltageFilter inductor capacitorL CLV 8.63 μF/250200 µH Vrms Filter inductor L 200 μH When operating in buck mode, the small-signal model of the buck-boost converter including the When operating in buck mode, the small-signal model of the buck-boost converter including perturbance (the symbols with hats) can be expressed as follows: the perturbance (the symbols with hats) can be expressed as follows:

∧∧ ∧∧ ∧∧ ∧ sLib(s) ==Dvbus(s) ++Vbusd(s) −v∧b(s).(7) (7) sLib (s) Dvbus (s) Vbus d(s)− vb (s) .

ElectronicsAccordingAccording 2020, 9, xto toFOR Equation Equation PEER REVIEW (7), (7), the the small small signal signal model model can can be be visualized, visualized, as as shown shown in in Figure Figure 11:1111: of 21

^ ^ is() Vds() b sL bus −+ + + VsL ()− ^ 1 ^ R vs() Dvbus () s sC L b LV −

Figure 11. Small-signal model of battery/SC converter inductor current. Figure 11. Small-signal model of battery/SC converter inductor current. Assuming that there is no perturbance on the DC bus, we can obtain the following: 1 ∧ s + + ib (s) = Vbus = Vbus (1 sCLV RL ) = Vbus ⋅ RLCLV . ∧ (8) R sL(1+ sC R ) + R L 2 1 1 d(s) [sL + L ] LV L L s + s + + 1 sCLV RL RLCLV LCLV

The inductor current control loop drawn according to Equation (8) is shown in Figure 12, where type II controller is adopted, and K-factor is used for quantification design.

H Gi i + e ks()+ z v * 1 con k d G I ib ()+ PWM id b − s sp Power circuit ib

Figure 12. Battery/SC converter inductor current control loop.

In Figure 12, the transfer function of the plant can be expressed as follows: ∧ 1 i (s) H (s) = k ⋅G ⋅ k = × b × k i PWM id s v ∧ s t d (s) 1 . s + (9) ⋅ + × 8 = k s Vbus ⋅ RLCLV = 10000 s 1.302 10 2 4 8 v ⋅ L 2 1 1 + × + × t s + s + s 1.302 10 s 5 10 RLCLV LC LV The crossover frequency is set at one tenth of the switching frequency, which is roughly 62,832 rad/s, and thus the gain and phase at crossover frequency can be obtained: ()ω = ∠ H i ci Gain H Angle H i i . (10) = 0.1811∠ − 88.36 The required phase boost at crossover frequency is as follows: = − −  Phase Boost Phase Margin AngleH 90 i . (11) = 60 − (−88.36) − 90 = 58.36 yielding the K-factor:

Electronics 2020, 9, x FOR PEER REVIEW 11 of 21

^ ^ is() Vds() b sL bus −+ + + VsL ()− ^ 1 ^ R vs() Dvbus () s sC L b LV −

Electronics 2020, 9, 1907Figure 11. Small-signal model of battery/SC converter inductor current. 11 of 20

Assuming that there is no perturbance on the DC bus, we can obtain the following: Assuming that there is no perturbance on the DC bus, we can obtain the following: 1 ∧ s + ∧i (s) V V (1+ sC R ) V s + R 1C ib(bs) = Vbusbus = Vbusbus(1 + sCLVLVRLL) = Vbus ⋅ RLLCLVLV . ∧ = = = . (8)(8) RLRL sLsL(1(+1+sCsC RR) +) +RR L · 2 + 1 + 1 1 ∧d(s) [[sLsL++ + ] ] LVLV L L LL ss + R C s s +LC d(s) 1 +sCLVRL L LV LV 1 sCLV RL RLCLV LCLV The inductor current control loop drawn according to Equation (8) is shown in Figure 12, The inductor current control loop drawn according to Equation (8) is shown in Figure 12, where type II controller is adopted, and K-factor is used for quantiﬁcation design. where type II controller is adopted, and K-factor is used for quantification design.

H Gi i + e ks()+ z v * 1 con k d G I ib ()+ PWM id b − s sp Power circuit ib

FigureFigure 12.12. BatteryBattery/SC/SC converterconverter inductorinductor currentcurrent controlcontrol loop.loop.

InIn FigureFigure 1212,, thethe transfertransfer functionfunction ofof thethe plantplant cancan bebe expressedexpressed asas follows: follows: ∧ ∧ i (s) 1 ib(s) Hi(s) = k1PWM bG ks = ks H (s) = k ⋅G ⋅ k = × id × k vt i PWM id s ∧· · s × ∧d(s) × vt 1 (9) s+ 8 ks Vbus dR(LsCLV) 10000s+1.302 10 = · = × vt L s2+ 1 s+ 1 s2+1.302 104s+5 108 · · RLCLV1 LCLV × × . s + (9) ⋅ + × 8 The crossover frequency= k s Vbus is set⋅ at one tenthRLC ofLV the switching= 10000 frequency,s 1. which302 10 is roughly 62,832 2 4 8 rad/s, and thus the gain andv phase⋅ L at2 crossover1 frequency1 can be obtained:+ × + × t s + s + s 1.302 10 s 5 10 RLCLV LC LV H (ω ) = Gain ∠Angle i ci Hi Hi (10) The crossover frequency is set at one tenth= 0.1811of the∠ switching88.36 frequency, which is roughly 62,832 − ◦ rad/s, and thus the gain and phase at crossover frequency can be obtained: The required phase boost at crossover frequency is as follows: ()ω = ∠ H i ci Gain H Angle H i i .  (10) Phase Boost = Phase= Margin0.1811∠ − 88Angle.36 H 90 − i − ◦ (11) = 60 ( 88.36) 90 = 58.36 The required phase boost at crossover frequency◦ − − is as− follows:◦ ◦ yielding the K-factor: Phase Boost = Phase Margin − Angle − 90 Hi ! . (11) Phase Boost=  − − 58.36− ◦  =  K = tan +6045◦ =( tan88.36) 90+ 4558◦ .=363.5291. (12) f actor 2 2 yielding the K-factor: Thus, we can obtain the zero and pole of the type II controller:

ωci 62, 832 z = = 17, 804 rad/s; (13) K f actor 3.5291

p = ω K = 62, 832 3.5291 221, 740 rad/s. (14) ci · f actor × Required gain compensation at crossover frequency is as follows:

p 221, 740 6 k1 = = = 1.2244 10 . (15) GainHi 0.1811 ×

Bode Diagram 100 Hi Gi 50 Hi*Gi

0 System: Hi*Gi Frequency (rad/s): 6.29e+04 Magnitude (dB) Magnitude -50 Magnitude (dB): 0.0038

-100 90

-45

Electronics 2020, 9, 1907 Phase (deg) -90 12 of 20

-135 System: Hi*Gi Frequency (rad/s): 6.29e+04 -180 As a result, the transfer2 functionPhase of3 the (deg): designed -1204 controller can5 be obtained:6 7 10 10 10 10 10 10 Frequency (rad/s)6 k1(s + z) 1.2244 10 (s + 17, 804) Gi(s) = = × . (16) Figure 13. Open-loop Bodes(s +plotp) of battery/SCs(s +converter221, 740 inductor) current control loop. Commented [M1]: Please confirm if the scientific notation

Figure 13 shows the open-loop Bode plot of the inductor current control loop. As can be seen in in figures need to be revised. Figure 13, the phase margin is 60◦.

Bode Diagram 100 Hi Gi 50 Hi*Gi

System:Hi*Gi Magnitude (dB) -50 Freqency(rad/s):6.29e+04 Mganitude(dB):0.0038

-100 45

-45

-90

Phase (deg) System:Hi*Gi -135 Freqency(rad/s):6.29e+04 Phase(deg):-120 -180 1 2 3 4 5 6 7 10 10 10 10 10 10 10 Frequency (rad/s) )

Figure 13. Open-loop Bode plot of battery/SC converter inductor current control loop. Figure 13 . Open-loop Bode plot of battery/SC converter inductor current control loop. 4. Case Simulation This section investigates the performance of the proposed ICESS in implementing various advanced system-wide functional operations and power charging/discharging control through the planning and simulation of application cases based on grid-connected solar PV/WT generation systems and the power control of MG.

4.1. Case 1: Peak Demand Shaving (Operation Mode 1) In this mode, the DC load power demand is set to 300 W. The system calculates the charging/discharging command of the battery in real time according to solar PV and WT generation to achieve peak demand shaving requirements. The goal of this case is to realize the ideal zero power demand from the grid, that is, no electricity from the grid is used during peak hours. Figure 14 shows related power variation scenarios. Figures 15 and 16 show the simulation results without and with peak power shaving function, respectively. It can be known from the results that, if the solar PV/WT generation is less than 300 W, the system can discharge the ICESS battery to help supply the load demand; when solar PV/WT generates more than 300 W, the battery can absorb the excess power, and users can completely avoid using the utility power. Electronics 2020, 9, x FOR PEER REVIEW 13 of 21

In this mode, the DC load power demand is set to 300 W. The system calculates the charging/discharging command of the battery in real time according to solar PV and WT generation to achieve peak demand shaving requirements. The goal of this case is to realize the ideal zero Electronics 2020, 9, x FOR PEER REVIEW 13 of 21 power demand from the grid, that is, no electricity from the grid is used during peak hours. Figure 14 showsIn this related mode, power the variationDC load scenarios. power demand is set to 300 W. The system calculates the charging/discharging command of the battery in real time according to solar PV and WT generation to achieve peak demand shaving requirements. The goal of this case is to realize the ideal zero

Electronicspower demand2020, 9, 1907 from the grid, that is, no electricity from the grid is used during peak hours. Figure13 of 20 14 shows related power variation scenarios.

t t t t t t 0 1 2 3 4 5 t0 t1 t2 t3 t4 t5

(a) (b)

t t t t t t 0 1 2 3 4 5 t0 t1 t2 t3 t4 t5

(a) (b)

t0 t1 t2 t3 t4 t5 t0 t1 t2 t3 t4 t5 (c) (d)

Figure 14. Power change scenarios of case 1: (a) Solar PV/WT generation; (b) load power; (c) ICESS power; (d) grid power. t0 t1 t2 t3 t4 t5 t0 t1 t2 t3 t4 t5 Figures 15 and 16 show the(c) simulation results without and with(d )peak power shaving function, respectively. It can be known from the results that, if the solar PV/WT generation is less than 300 W, Figure 14. Power change scenarios of case 1: (a) Solar PV/WT generation; (b) load power; (c) ICESS Figure 14. Power change scenarios of case 1: (a) Solar PV/WT generation; (b) load power; (c) ICESS power; the systempower; (cand) grid discharge power. the ICESS battery to help supply the load demand; when solar PV/WT generates(d) grid more power. than 300 W, the battery can absorb the excess power, and users can completely avoidFigures using the 15 andutility 16 power.show the simulation results without and with peak power shaving function, respectively. It can be known from the results that, if the solar PV/WT generation is less than 300 W, the system can discharge the ICESS battery to help supply the load demand; when solar PV/WT generates more than 300 W, the battery can absorb the excess power, and users can completely avoid using the utility power.

(a) (b)

Figure 15. Simulation results without peak demand shaving: (a) Grid AC voltage and current/DC

bus voltage/DC bus current/battery current/SC current; (b) feedback and command signals of grid AC current/DC bus voltage/battery current/SC current. (a) (b)

Electronics 2020, 9, x FOR PEER REVIEW 14 of 21 Electronics 2020, 9, x FOR PEER REVIEW 14 of 21 Figure 15. Simulation results without peak demand shaving: (a) Grid AC voltage and current/DC Figure 15. Simulation results without peak demand shaving: (a) Grid AC voltage and current/DC Electronicsbus2020 voltage/DC, 9, 1907 bus current/battery current/SC current; (b) feedback and command signals of grid 14 of 20 bus voltage/DC bus current/battery current/SC current; (b) feedback and command signals of grid AC current/DC bus voltage/battery current/SC current. AC current/DC bus voltage/battery current/SC current.

(a) (b) (a) (b) Figure 16. Simulation results with peak demand shaving: (a) Grid AC voltage and current/DC bus FigureFigure 16. 16.Simulation Simulation results results with with peak peak demanddemand shaving:shaving: ( (aa)) Grid Grid AC AC voltage voltage and and current/DC current/DC bus bus voltage/DC bus current/battery current/SC current; (b) feedback and command signals of grid AC voltage/DC bus current/battery current/SC current; (b) feedback and command signals of grid AC voltage/DCcurrent/DC bus bus current/battery voltage/battery current/SC current.current; (b) feedback and command signals of grid AC currentcurrent/DC/DC bus bus voltage voltage/ba/batteryttery current current/SC/SC current. current. 4.2. Case 2: RE Power Generation Smoothing (Operation Mode 2) 4.2.4.2. Case Case 2: 2: RE RE Power Power Generation Generation Smoothing Smoothing (Operation(Operation Mode 2) 2) In this mode, the AC power injected to the grid is fixed at 200 W. Figures 17 and 18 show the InsimulationIn this this mode, mode, results the the without ACAC powerpower and injected injectedwith RE togenerati to the the grid gridon issmoothing isfixed ﬁxed at 200 atfunction, 200W. Figures W. respectively. Figures 17 and 17 18Fromand show 18the showthe thesimulation simulationsimulation results resultsresults, without it without can be andknown and with with that RE REif thegenerati generation solar PV/WTon smoothing smoothing generation function, function, is less than respectively. respectively. 200 W, the Fromcontrol From the the simulationsimulationsystem results, can results, instantly it it can can make be be known knownup the thatpower thatif if thefedthe to solarsolar the grid PVPV/WT/WT by discharging generation generation theis is less lessICESS than than battery; 200 200 W, W,the the theexcess control control systemsystempower can can instantlygenerated instantly make bymake solar up up the PV/WTthe power power can fedfed be to toabsorbed thethe gridgrid by by dischargingthe battery tothe the achieve ICESS ICESS battery;the battery; purpose the the excess of excess powerpowersmoothing generated generated the by power solarby solar fed PV to/ WTPV/WT the cangrid. becan absorbed be absorbed by the by battery the battery to achieve to achieve the purpose the ofpurpose smoothing of thesmoothing power fed the to thepower grid. fed to the grid.

(a) (b)

Figure 17. Simulation results without RE generation smoothing: (a) Grid AC voltage and current/DC bus voltage/DC bus current/battery current/SC current; (b) feedback and command signals of grid AC current/DC bus voltage/battery current/SC current. Electronics 2020, 9, x FOR PEER REVIEW 15 of 21

Figure 17. Simulation results without RE generation smoothing: (a) Grid AC voltage and Electronics 2020, 9, 1907 15 of 20 current/DC bus voltage/DC bus current/battery current/SC current; (b) feedback and command signals of grid AC current/DC bus voltage/battery current/SC current.

(a) (b)

FigureFigure 18.18. SimulationSimulation resultsresults withwith RERE generationgeneration smoothing:smoothing: (a)) GridGrid ACAC voltagevoltage andand currentcurrent/DC/DC busbus voltagevoltage/DC/DC bus bus current current/b/batteryattery current current/SC/SC current; current; (b )( feedbackb) feedback and and command command signals signals of grid of grid AC currentAC current/DC/DC bus voltagebus voltage//batterybattery current current/SC/SC current. current.

5.5. HardwareHardware ImplementationImplementation FollowingFollowing thethe simulationsimulation of of two two typical typical application application scenarios scenarios of of the the proposed proposed ICESS ICESS presented presented in thein the previous previous section, section, considering considering the hardware the hardware circuit circuit speciﬁcations specifications and the and test the conditions test conditions of current of laboratorycurrent laboratory equipment, equipment, a 1kVA a ICESS 1kVA hardware ICESS hardwa experimentalre experimental system system has been has developed. been developed. A Texas A InstrumentsTexas Instruments (TI) digital (TI) signal digital processor signal processor (DSP) is used (DSP) to realizeis used fully to realize digital fully integration digital andintegration coordinated and controlcoordinated of power control converters of power in converters ICESS. The in overallICESS. performanceThe overall performance of the ICESS of system the ICESS is veriﬁed system by is experimentalverified by experimental test results withtest theresults same with system the sa parametersme system and parameters operating and conditions operating presented conditions in simulationpresentedElectronics 2020 cases.in, 9simulation, x FOR Figure PEER 19 REVIEWcases. shows Figure a photo 19 of show the completes a photo hardware of the complete experiment hardware environment. experiment16 of 21 environment.

Figure 19. Photo of complete hardware setup and experiment environment. Figure 19. Photo of complete hardware setup and experiment environment.

5.1. Case 1: Peak Demand Shaving (Operation Mode 1) The condition of this case is the same as that of the simulation in Section 4.1, and the experimental results are used to analyze and compare with the simulation results. Figures 20–22 show the measuring results of the implementation. As can be seen from the measured waveforms, the same performance of peak demand shaving control as that of simulation is observed. In Figure 21, with the function of peak demand shaving being activated the control goal of this control case, realizing an ideal zero power demand (Ch2) from the grid, is perfectly achieved. As shown in Figure 22, both the output currents of the battery (Ch3) and supercapacitor (Ch4) banks are stably regulated as commanded.

Figure 20. Implementation results without peak demand shaving: Grid AC voltage and current/DC bus voltage/DC bus current.

Electronics 2020, 9, x FOR PEER REVIEW 16 of 21

Electronics 2020, 9, 1907Figure 19. Photo of complete hardware setup and experiment environment. 16 of 20

5.1. Case 1: Peak Demand Shaving (Operation Mode 1) 5.1. Case 1: Peak Demand Shaving (Operation Mode 1) The condition of this case is the same as that of the simulation in Section 4.1, and the The condition of this case is the same as that of the simulation in Section 4.1, and the experimental experimental results are used to analyze and compare with the simulation results. Figures 20–22 results are used to analyze and compare with the simulation results. Figures 20–22 show the measuring show the measuring results of the implementation. As can be seen from the measured waveforms, results of the implementation. As can be seen from the measured waveforms, the same performance of the same performance of peak demand shaving control as that of simulation is observed. In Figure peak demand shaving control as that of simulation is observed. In Figure 21, with the function of peak 21, with the function of peak demand shaving being activated the control goal of this control case, demand shaving being activated the control goal of this control case, realizing an ideal zero power realizing an ideal zero power demand (Ch2) from the grid, is perfectly achieved. As shown in demand (Ch2) from the grid, is perfectly achieved. As shown in Figure 22, both the output currents of Figure 22, both the output currents of the battery (Ch3) and supercapacitor (Ch4) banks are stably the battery (Ch3) and supercapacitor (Ch4) banks are stably regulated as commanded. regulated as commanded.

FigureFigure 20. 20. ImplementationImplementation results results withou withoutt peak peak demand demand shaving: shaving: Grid Grid AC AC voltage voltage and and current/DC current/DC Electronicsbusbus voltage/DC2020 voltage, 9, x/ DCFOR busbus PEER current. current. REVIEW 17 of 21

FigureFigure 21. 21. ImplementationImplementation results results with with peak peak demand demand sh shaving:aving: Grid Grid AC AC voltage voltage and and current/DC current/DC bus bus voltage/DCvoltage/DC bus bus current. current.

Figure 22. Implementation results with peak demand shaving: Grid AC voltage and current/battery current/SC current.

5.2. Case 2: RE Generation Smoothing (Operation Mode 2) For comparison purposes, the system parameters and operating condition of this case are the same as that of the simulation case presented in Section 4.2, and the experimental results are used to check with the simulation results. Figures 23–26 shows the measured results of the implementation. As can be seen in 23–26, the same result of effective RE generation smoothing is observed. Figure 23 shows the waveforms of disturbed grid AC voltage and fluctuating current, DC bus voltage, and current injected to DC bus without smoothing control. The corresponding set of waveforms with the power smoothing control function being activated are shown in Figure 25. As can be seen in Figure 25, the waveforms of the AC voltage and current are perfectly stable and the designed real-time tracking control of the currents of the battery (Ch3) and supercapacitor (Ch4) banks in ICESS shown in Figure 26 is achieved.

Electronics 2020, 9, x FOR PEER REVIEW 17 of 21

ElectronicsFigure2020 21., 9 ,Implementation 1907 results with peak demand shaving: Grid AC voltage and current/DC bus17 of 20 voltage/DC bus current.

FigureFigure 22. 22. ImplementationImplementation results results with with pe peakak demand demand shaving: shaving: Grid Grid AC AC voltage voltage and and current/battery current/battery current/SCcurrent/SC current. current.

5.2.5.2. Case Case 2: 2: RE RE Generation Generation Smoothing Smoothing (Operation (Operation Mode Mode 2) 2) ForFor comparison purposes,purposes, the the system system parameters parameters and and operating operating condition condition of this of this case case are the are same the sameas that as of that the of simulation the simulation case presentedcase presented in Section in Section 4.2, and 4.2, the and experimental the experimental results results are used are toused check to checkwith the with simulation the simulation results. results. Figures Figures 23–26 shows23–26 shows the measured the measured results results of the implementation.of the implementation. As can Asbe seencan be in seen 23–26, in the23–26, same the result same of result eﬀective of effective RE generation RE generation smoothing smoothing is observed. is observed. Figure 23 showsFigure the23 showswaveforms the waveforms of disturbed of grid disturbed AC voltage grid andAC ﬂuctuatingvoltage and current, fluctuating DC bus current, voltage, DC and bus current voltage, injected and currentto DC bus injected without to smoothingDC bus without control. smoothing The corresponding control. The set of corresponding waveforms with set the of powerwaveforms smoothing with thecontrol power function smoothing being control activated function are shown being in Figureactivat ed25 .are As shown can be seenin Figure in Figure 25. As25, can the waveformsbe seen in Figureof the AC25, voltagethe waveforms and current of the are perfectlyAC voltage stable and and current the designed are perfectly real-time stable tracking and the control designed of the currents of the battery (Ch3) and supercapacitor (Ch4) banks in ICESS shown in Figure 26 is achieved. Electronicsreal-time 2020 tracking, 9, x FOR control PEER REVIEW of the currents of the battery (Ch3) and supercapacitor (Ch4) banks18 of in21 ICESS shown in Figure 26 is achieved.

FigureFigure 23.23. ImplementationImplementation results results without without RE generationRE generation smoothing: smoothing: Grid AC Grid voltage AC and voltage current and/DC current/DCbus voltage /busDC voltage/DC bus current. bus current.

Figure 24. Implementation results without RE generation smoothing: Grid AC voltage and current/battery current/SC current.

Electronics 2020, 9, x FOR PEER REVIEW 18 of 21

Electronics 2020 9 Figure, , 190723. Implementation results without RE generation smoothing: Grid AC voltage and 18 of 20 current/DC bus voltage/DC bus current.

FigureFigure 24. 24.Implementation Implementation resultsresults without RE RE gene generationration smoothing: smoothing: Grid Grid AC ACvoltage voltage and and Electronicscurrentcurrent/battery/ battery2020, 9, x currentFOR current/SC PEER/SC REVIEW current. current. 19 of 21

FigureFigure 25. Implementation25. Implementation results results with with RERE generation smoothing: smoothing: Grid Grid AC ACvoltage voltage and current/DC and current /DC bus voltagebus voltage/DC/DC bus bus current. current.

FigureFigure 26. Implementation26. Implementation results results with REwith generation RE genera smoothing:tion smoothing: Grid AC Grid voltage AC andvoltage current and/battery currentcurrent/battery/SC current. current/SC current.

6. Conclusions This paper has briefly introduced the importance of ESDs in new power systems and focused on the relevant system characteristics, applications, and power control technologies of CESS. According to the operating conditions of the system, the advanced power control functions and application scenarios of the proposed ICESS have also been introduced. To fill the gap of lacking detailed design examples, especially with hardware verification of CESS systems, a review of the connecting topology and potential application of CESS, system modeling of converters, and systematic design method for controllers of various ESD converters have been presented in this paper. The overall system performance of the proposed SC-battery-based ICESS with the proposed control schemes has been simulated and analyzed with computer software through two typical control cases, peak demand shaving and power generation smoothing, of a grid-connected microgrid. In this paper, the control chip, TMS320F28335, is used as the control kernel to cooperate with the laboratory equipment to carry out the 1-kVA ICESS small-capacity experimental hardware verification. The simulation and implementation results of two typical control cases can prove that

Electronics 2020, 9, 1907 19 of 20

6. Conclusions This paper has briefly introduced the importance of ESDs in new power systems and focused on the relevant system characteristics, applications, and power control technologies of CESS. According to the operating conditions of the system, the advanced power control functions and application scenarios of the proposed ICESS have also been introduced. To fill the gap of lacking detailed design examples, especially with hardware verification of CESS systems, a review of the connecting topology and potential application of CESS, system modeling of converters, and systematic design method for controllers of various ESD converters have been presented in this paper. The overall system performance of the proposed SC-battery-based ICESS with the proposed control schemes has been simulated and analyzed with computer software through two typical control cases, peak demand shaving and power generation smoothing, of a grid-connected microgrid. In this paper, the control chip, TMS320F28335, is used as the control kernel to cooperate with the laboratory equipment to carry out the 1-kVA ICESS small-capacity experimental hardware verification. The simulation and implementation results of two typical control cases can prove that the proposed ICESS operation mode and designed digital controllers are feasible and effective. Evaluated from the application aspect, the proposed ICESS is very suitable for small and medium-sized DG systems, especially for optimal real-time control of power flow and energy efficiency. Further investigation on applying intelligent controllers with learning capability and capable of taking into account the states of charge of battery and supercapacitor banks to CESS is a potential future research direction on this topic.

Author Contributions: The corresponding author, C.-T.M. conducted the research work, proposed the ICESS concept and design methods, verified the results, wrote the manuscript draft and polished the final manuscript. C.-L.H. provided administration support from INER. All authors have read and agreed to the published version of the manuscript. Funding: This research was funded by the Institute of Nuclear Energy Research (INER), Atomic Energy Council, Taiwan, with grant number NL1070422 and NL1090529. Acknowledgments: The authors would like to thank the Institute of Nuclear Energy Research (INER), Atomic Energy Council, Taiwan, for financially support the energy-related research regarding key technologies and the design of advanced energy storage systems. Conflicts of Interest: The authors declare no conflict of interest.

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