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The MIPS

The use of has been become an essential part of human life over the past few decades, especially with the proliferation of smartphones. Almost every person on earth commands a computer to perform a task dozens of times per day. Despite this, most people have virtually no understanding of what occurs within those tiny chips and circuits inside their phones and laptops that allow them to send an email or post on Twitter.

What is a Processor?

By definition, every computer contains a , commonly abbreviated to CPU. At its most basic level, the CPU is an that is capable of interpreting and executing instructions on behalf of the computer. These instructions reach the CPU in the form of machine language, which consists of binary code. This binary code is a sequence of 1’s and 0’s, which has been translated by the computer from a “higher” programming language, meaning closer in nature to the languages of humans, which may or may not have been translated in turn from a simple user input such as a click of a mouse or use of a touch screen.

The manner in which the circuits of the CPU are designed and arranged to instructions is known as the instruction set architecture, or ISA, and throughout recent history of the computing industry it has been economically advantageous to mass-produce processors that adhere to a standardized ISA. The MIPS ISA, originally an acronym for without Interlocked Stages, was introduced in 1981 by MIPS Computer Systems Inc. and was an extremely prevalent and popular ISA for a span before more innovative and efficient processors widely replaced it.

To understand how a MIPS processor interprets and executes instructions, one must first understand the nature of these instructions. A single instruction in MIPS architecture is represented as a 32-bit string of binary code. Each bit is numbered 31-0, from left to right. Each specific bit represents a different component of the instruction, depending on the instruction type. MIPS allows for three different instruction types: R-type, I-type and J-type.

The Instruction Types

The diagram below (Figure 1) breaks each instruction type into fields of differing bit sizes, with each field representing a different component of the instruction. The following section will address each instruction type individually; it will explain what specific instructions are carried out by each types, what each field represents, and how each field is handled by the individual components of the processor.

Figure 1

R-type

R-type instructions typically involve performing on operation on two operands that are stored in registers, which are tiny banks of memory inside the processor. As such, the “R” stands for “register.” An example of such an operation would be simple addition, in which case the two operands would be the numbers that are added together. In an R-type instruction, the leftmost six bits represent the operation code, or . This code works together with the rightmost six bits, or function code, to identify specifically what operation will be carried out. For example, a certain opcode may signal that arithmetic is being performed, and the function code would specify further that addition is the desired operation. Bit fields 25-21 and 20-16 identify the registers in which the two operands are stored, and bits 15-11 specify the register where the result is to be stored. This leaves only bits 10-6, which serve as the “shift amount”. The reason for this field stems from the fact that in binary arithmetic, multiplication by powers of two can be accomplished by shifting the digits of a number left or right, just as multiplication by powers of 10 occurs when the decimal point of a number is moved in the decimal number system most people are used to. Therefore, this field represents the number of positions to shift by, should an operation call for such a multiplication.

I-type

I-type, or “immediate-type,’ instructions are used whenever the CPU needs to perform an operation similar to those carried out by the R-types, except only one of the operands is stored in a register, not both. The second operand is a constant immediately represented in the instruction. For example, while an R-type might add two previously stored numbers together and store the result, an I-type may add one previously stored number to an arbitrary constant, such as 6, and store the result. Another use for the I-type is to store data from an instruction into the computer’s memory, or load data from memory that is needed to complete an instruction. Just like an R-type instruction, the opcode is contained in the leftmost six bits and serves the exact same purpose. The next two fields of five bits each indicate the single source register and the destination register, respectively. The right half of an I-type instruction (bits 15-0), is all considered as one field, and it contains one of two things: any constant that is used in the operation, or the target address in memory where data will be stored or retrieved.

J-type

J-type instructions are utilized less often than the other two, and a basic background in computer programming is needed to thoroughly understand their necessity. However, a simplified explanation is that a series of instructions is always executed in the order that they are given, but sometimes it is desirable to repeat a set of instructions until a certain condition is met. In this case, it is necessary to tell the processor to “jump” back to the beginning, middle, or any other arbitrary point of the instruction list if the condition is not met. This action is accomplished with a J-type instruction, which consists of the same opcode as the R-type and I-type, and utilizes bits 25-0 to represent the target address of the point to which the CPU must “jump.”

The Path of the Data

The following is a symbolic representation of the MIPS processor, along with a description of each component and the role it plays in completing an instruction. Note that the diagram is not a literal physical image of the circuit, but rather a conventional schematic that makes visualization easier.

1. Instruction Fetch Components

The starting point of a MIPS instruction in the Instruction Memory. This component is, simply put, an ordered list of instructions to be executed. In the physical world, it likely will come from a storage device such as a CD or flash drive. The small box to the left of the Instruction Memory is labeled PC for Program , and this component keeps track of the “address” of the current instruction, or the position in the list of instructions that the processor is currently reading. The trapezoid above the Instruction Memory represents an , which increments the address marked by the after each instruction is executed so that the processor cycles through the instructions in the proper order. These components together make up the Instruction Fetch stage of the processor.

2. Registers

Immediately to the right of the Instruction Memory is a box labeled Registers, which represents a set of memory banks used by the processor itself. Read registers 1 and 2 receive the rs and rt fields of an R-type instruction (the operands of an operation), and the Write register receives the rd field (the result). The Read data and Write data registers temporarily store information that is loaded into or retrieved from the computer’s memory.

3. Multiplexors and Sign Extend

The small components labeled “Mux” represent data control elements called multiplexors. Essentially, they receive two inputs and allow only one of these to be output at a time, as indicated by the arrows entering and leaving them on the diagram. The Sign Extend component is a measure for simplicity; it receives the 16 bit address/immediate field of an I-type instruction, and extends it to a 32-bit number of the same value.

4. ALU and Memory

The trapezoidal symbol labeled “ALU” indicates the Arithmetic and Logic Unit, which does the bulk of the processor’s work. This component is responsible for performing many of the operations commanded by R-type instructions, such as addition and shifts (multiplication). The box labeled “Data Memory” represents the allotted storage space of the computer, which the processor must frequently access to store and retrieve information when an instruction calls for such action.