DOCSLIB.ORG

A CMOS Automatic Gain Control Design Based on Piece-Wise Linear Circuits

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
A CMOS Automatic Gain Control Design Based on Piece-Wise Linear Circuits A CMOS Automatic Gain Control design based on Piece-wise Linear circuits By David Moro Frías A Dissertation Submitted to the Program in Electronics Science, Electronics Department in partial fulfillment of the requirements for the degree of PhD. IN ELECTRONICS SCIENCE at the National Institute for Astrophysics, Optics and Electronics June 2013 Tonantzintla, Puebla Advisors: Dra. Ma. Teresa Sanz Pascual, INAOE Dr. Carlos A. de la Cruz Blas, UPNA Abstract In many electronic systems, a circuit capable of reducing the dynamic range of a signal is needed. An Automatic Gain Control (AGC) system is a complex circuit that maintains its output signal amplitude relatively constant, independently of the input variations. The time response of the AGC must also be constant, in order to maximize the system bandwidth and to reduce acquisition times. In this thesis a novel method to design and implement an AGC loop is presented, based on piece-wise linear (PWL) circuits. This PWL technique is used to design an exponential and logarithmic pre-distortion circuits which are implemented inside the AGC loop in order to have a linear-in-dB system and, as a consequence, to obtain a constant settling time AGC response. Also, two exponential variable gain amplifiers (VGA) and a peak detector were designed using the PWL pre- distortion circuits mentioned before. Thus, a complete AGC loop is implemented and tested at the laboratory to probe the validity of the proposed blocks. In Chapter 1 a brief introduction is presented, describing the principal AGC blocks, its basic operation, types of AGCs and finally AGC applications are mentioned. In Chapter 2 a PWL exponential pre-distortion circuit was pro- posed, based on current mirrors and a Winner-Take-All circuit. This approach is technology-independent, as it does not rely on the quadratic behavior of MOS transistors in strong inversion, and remains therefore valid for deep submicron CMOS processes, as opposed to former exponential approximations found in lit- erature. Moreover, the proposed exponential pre-distortion circuit is not limited to a certain range of validity. In other words, the range of validity can be extended by adding segments to the implementation, at a cost of area and power consumption. The proposed approach was validated with experimental results from a 6-segment i ii prototype, which showed a very wide linear-in-dB range of 41.97dB with 2.55dB maximum error. Besides the PWL exponential proposal, two WTA circuits were proposed in order to improve time response to abrupt changes of input signals. Both proposals, WTA I and WTA II, preserve the main characteristics of Lazzaro’s cell, such as compactness and area and power consumption optimization, whereas improving time response. The WTA II showed the fastest time response to abrupt input changes and was therefore used as a main block of the exponential pre-distortion circuit. In Chapter 3, the proposed PWL construction method was expanded to im- plement a logarithmic circuit based on current mirrors and a LTA. A 6-segment prototype was fabricated and tested, showing an input range of almost 28dB with 1.59dB maximum error. Additionally, the peak detector to be used within the AGC was designed with a WTA based full wave rectifier and an external capa- citor. One of the main blocks of an AGC is the variable gain amplifier. In order to take full advantage of the proposed PWL exponential block, two VGAs with wide gain control range were designed, the first one based on the Gilbert cell (VGA I) and the second based on a I-V converter (VGA II). Both VGAs were characterized considering their amplification core and the pre-distortion block as unity. VGA I was designed in 0 .35 µm technology, with a gain variation range and power consumption of 33dB and 5.1mW, respectively. On the other hand, VGA II was designed and implemented in 0 .13 µm technology, and experimental results showed a wider gain variation range (41.94dB) and a lower power consumption (3.1mW). Because of this, the VGA II was used in the final AGC design. PWL implementation shows a not limited exponential range validity, so the gain vari- ation range of the VGA depends practically on the amplifier design itself. So, a careful VGA core design must be taken into account for a wide gain range VGA circuit. Finally, employing all the proposed circuits, an AGC circuit was integrated and tested, as shown in Chapter 4. Experimental results shown almost constant time response around of a few microsecons and a compression factor equal to 3.55. iii The circuits designed in this thesis were fabricated in 0 .13 µm CMOS techno- logy from STMicroelectronics. Simulation and experimental results were presen- ted in order to validate the fulfillment of the objectives proposed in Chapter 1. iv Resumen En muchos sistemas electr´onicos es necesario un circuito que sea capaz de reducir el rango din´amico de la se˜nal a procesar. Un lazo de control autom´atico de ganancia (AGC) es un circuito que mantiene la amplitud de su se˜nal de salida relativamente constante, independientemente de las variaciones de la se˜nal de entrada. El tiempo de respuesta de un AGC debe ser constante, con el objetivo de maximizar el ancho de banda del sistema donde se encuentra el AGC. En esta tesis se presenta un m´etodo novedoso para dise˜nar e implementar un lazo AGC basado en circuitos Piecewise-Linear (PWL). La t´ecnica PWL es utilizada para dise˜nar un circuito de predistorsi´on exponencial y logar´ıtmico, los cuales son implementados dentro del lazo AGC para poder obtener un sistema lineal en dB y, como consecuencia, obtener un AGC con tiempo de establecimiento constante. Adem´as, se dise˜naron dos amplificadores de ganancia variable exponenciales (VGA) y un detector de picos utilizando los circuitos de predistorsi´on PWL mencionados anteriormente. As´ı, se implement´oun lazo AGC completo, el cual fue medido en el laboratorio para comprobar la validez de los bloques propuestos. En el cap´ıtlo 1 se presenta una breve introducci´on, describiendo los bloques principales del AGC, su operaci´on b´asica, tipos de AGC y, finalmente, las distintas aplicaciones de estos lazos. En el cap´ıtulo 2 se propone un circuito de predistorsi´on exponencial PWL, basado en espejos de corriente y en un circuito Winner-Take-All (WTA). Esta propuesta es independiente de la tecnolog´ıa de dise˜no debido a que no depende del comportamiento cuadr´atico de los transistores MOS en inversi´on fuerte y, por lo tanto, esta propuesta se mantiene v´alida para procesos CMOS submicrom´etricos, contrario a las aproximaciones exponenciales encontradas en la literuatura. M´as a´un, el circuito de predistorsi´on exponencial propuesto no v vi est´alimitado a un rango de validez dado, es decir, el rango de validez puede ser extendido aumentando el n´umero de segmentos a la implementaci´on, con un costo de ´area y consumo de potencia. Esta propuesta fue validada con resultados experimentales con un prototipo de seis segmentos, el cual mostr´oun amplio rango lineal en dB de casi 42dB con un error m´aximo de 2.55dB. Adem´as del circuito exponencial PWL, se proponen dos circuitos WTA que buscan mejorar el tiempo de respuesta a cambios abruptos en las se˜nales de en- trada. Ambas propuestas, WTA I y WTA II, conservan las caracter´ısticas prin- cipales de las celdas de Lazzaro, tal como su dise˜no compacto y bajo consumo de ´area y potencia, mientras que mejoran el tiempo de respuesta. El WTA II mostr´o el tiempo de respuesta m´as r´apido a cambios abruptos en las entradas y fue, por lo tanto, utilizado como bloque principal en el circuito exponencial PWL propuesto. En el cap´ıtulo 3, el m´etodo de dise˜no basado en la t´ecnica PWL fue expandido para implementar un circuito logar´ıtmico basado en espejos de corriente y un circuito Loser-Tale-All (LTA). Se fabric´oy midi´oun prototipo de seis segmentos, mostrando un rango de entrada de casi 28dB con un error m´aximo menor de 1.6dB. Adem´as, se dise˜n´oel detector de picos utilizando un WTA de dos entradas, como rectificador de onda completa, y un capacitor externo al chip. Uno de los bloques principales del lazo AGC es el VGA. Con el objetivo de obtener la m´axima ventaja del circuito exponencial propuesto, se dise˜naron dos VGAs con amplio rango de control de ganancia, el primero basado en la celda de Gilbert (VGA I) y el segundo basado en un convertidor corriente-voltaje (VGA II). Ambos VGAs fueron caracterizados considerando el amplificador de ganancia variable y el bloque de predistorsi´on exponencial como una unidad. El VGA I fue dise˜nado en tecnolog´ıa de 0 .35 µm , obteniendo un rango de variaci´on de ganancia de 33dB con un consumo de potencia igual a 5.1mW. Por otro lado, el VGA II fue dise˜nado e implementado en tecnolog´ıa de 0 .13 µm , obteniendo como resultados experimentales un mayor rango de variaci´on de ganancia (casi 42dB) y un menor consumo de pontencia (3.1mW), comparado con el VGA I, por lo que el VGA II fue utilizado en el dise˜no final del AGC. Debido a que la implementaci´on exponencial PWL propuesta no tiene un rango de validez espec´ıfico, la variaci´on de ganancia del VGA depende pr´acticamente del propio dise˜no del amplificador. As´ı, se debe vii prestar especial atenci´on al dise˜no del VGA para poder obtener un amplificador de amplio rango de variaci´on de ganancia.
Load more

Recommended publications
  • Wideband Automatic Gain Control Design in 130 Nm CMOS Process for Wireless Receiver Applications
    Wideband Automatic Gain Control Design in 130 nm CMOS Process for Wireless Receiver Applications A thesis submitted in partial fulfillment of the requirements for the degree of Master of Science in Engineering By Joseph Benito Strzelecki, B.S. Wright State University, 2013 2015 Wright State University WRIGHT STATE UNIVERSITY GRADUATE SCHOOL _August 19, 2015_______ I HEREBY RECOMMEND THAT THE THESIS PREPARED UNDER MY SUPERVISION BY Joseph Benito Strzelecki ENTITLED Wideband Automatic Gain Control Design in 130 nm CMOS Process for Wireless Receiver Applications BE ACCEPTED IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF Master of Science in Engineering. ___________________________________ Saiyu Ren, Ph.D. Thesis Director ___________________________________ Brian D. Rigling, Ph.D. Department Chair Committee on Final Examination ________________________________ Saiyu Ren, Ph.D. ________________________________ Raymond E. Siferd, Ph.D. ________________________________ John M. Emmert, Ph.D. ________________________________ Arnab K. Shaw, Ph.D. ________________________________ Robert E. W. Fyffe, Ph.D. Vice President for Research and Dean of the Graduate School Abstract Strzelecki, Joseph Benito, M.S.Egr, Department of Electrical Engineering, Wright State University, 2015. “Wideband Automatic Gain Control Design in 130 nm CMOS Process for Wireless Receiver Applications” An analog automatic gain control circuit (AGC) and mixer were implemented in 130 nm CMOS technology. The proposed AGC was intended for implementation into a wireless receiver chain. Design specifications required a 60 dB tuning range on the output of the AGC, a settling time within several microseconds, and minimum circuit complexity to reduce area usage and power consumption. Desired AGC functionality was achieved through the use of four nonlinear variable gain amplifiers (VGAs) and a single LC filter in the forward path of the circuit and a control loop containing an RMS power detector, a multistage comparator, and a charging capacitor.
    [Show full text]
  • A Wide Range and High Speed Automatic Gain Control
    11111,.o 0 c_ SSCL-Preprint-407 = May 1993 "_ Distribution Category: 400 ' E. Tacconi rar_ t.. ' _ C Christiansen or3 ._ A Wide Range and High Speed Automatic Gain Control Superconductl "n g Super Collider Laboratory DISTRIIBLITION OF THIS DOCUMENT IS UNLIMITEi_ Disclaimer Notice This reportwas preparedas an account of work sponsoredby an agency of the UnitedStates Government. Neither the United States Governmentor any agency thereof, nor any of their employees,makesany warranty,expressor implied,or assumesanylegal liabilityor responsibility for the accuracy,completeness,or usefulnessof any information,apparatus,product,or process disclosed,or representsthat its usewouldnotinfringeprivatelyowned rights.Reference hereinto any specificcommercial product,process,or serviceby trade name, trademark, manufacturer,or otherwise, does notnecessarilyconstituteor implyits endorsement,recommendation,or favoring by the United States Government or any agency thereof. The views and opinionsof authors expressed herein donot necessadlystate or reflectthose ofthe UnitedStates Governmentor any agency thereof. Superconducting Super Collider Laboratory is an equal opportunity employer. SSCL-Preprint-407 A Wide Range and High Speed Automatic Gain Control* E. Tacconi and C. Christiansen Superconducting Super Collider Laboratory t 2550 Beckleymeade Ave. Dallas, TX 75237 May 1993 _ _' -12 -. _" *Presented at the 1993 IEEE Particle Accelerator Conference on May 17-20, Washington, D.C. *Operated by the Universities Research Association, Inc., for the U.S. Department of Energy under Contract No. DE-AC35-89ER40486. 131STRIBUI'ION OF THIS DOCUMENT IS UNLIMIT i=-O A Wide Range and High Speed Automatic Gain Control Eugenio J. Tacconit and Carlos F. Christiansen t Superconducting Super Collider Laboratory* 2550 Beckleymeade Avenue Dallas, Texas 75237 Abstract maximum loop gain, and a poor dynamic behavior is obtained Automatic gain control (AGC) techniques have been largely for low-gain operating points.
    [Show full text]
  • An Empirical Characterization of Concrete Channel and Modulation Schemes with Piezoelectric Transducers Based Transceivers
    AN EMPIRICAL CHARACTERIZATION OF CONCRETE CHANNEL AND MODULATION SCHEMES WITH PIEZO ELECTRIC TRANSDUCERS BASED TRANSCEIVERS A Thesis Presented to the Faculty of the Department of Electrical and Computer Engineering University of Houston In Partial Fulfillment of the Requirements for the Degree of Master of Science in Electrical Engineering by Sai Shiva Kailaswar August 2012 AN EMPIRICAL CHARACTERIZATION OF CONCRETE CHANNEL AND MODULATION SCHEMES WITH PIEZOELECTRIC TRANSDUCERS BASED TRANSCEIVERS _______________________________________ Sai Shiva Kailaswar Approved: ______________________________ Chair of the Committee Dr. Rong Zheng, Associate Professor Electrical and Computer Engineering Committee Members: ______________________________ Dr. Zhu Han, Associate Professor Electrical and Computer Engineering ______________________________ Dr. Yuhua Chen, Associate Professor Electrical and Computer Engineering ______________________________ ______________________________ Dr. Suresh Khator, Dr. Badri Roysam, Associate Dean Professor and Chairman Cullen College of Engineering Electrical and Computer Engineering ACKNOWLEDGEMENTS This research would not have been possible without the support of God Almighty and all praise to him. I owe my deepest gratitude to Dr. Rong Zheng for giving me an opportunity to pursue my Master’s thesis under her esteemed guidance. Without her support and assistance, this project would not have been possible. Her timely support, encouragement, and logical thinking have greatly inspired me to keep my spirits high throughout the research. I would like to thank Dr. Zhu Han and Dr. Yuhua Chen for accepting my invitation to serve on my thesis committee. It gives me pleasure to thank all the members of the Wireless System Research Group, especially Mr. Guanbo Zheng. I would like to dedicate my work to my beloved parents, brother, Mr. Kishore Potta, and sister-in-law Mrs.
    [Show full text]
  • Replacing the Automatic Gain Control Loop in a Mobile, Digital TV Broadcast Receiver by a Software Based Solution
    Replacing the automatic gain control loop in a mobile, digital TV broadcast receiver by a software based solution diploma thesis Patrick Boettcher Technische Fachhochschule Wildau Fachbereich Betriebswirtschaft/Wirtschaftsinformatik Date: 09.03.2008 Erstbetreuer: Prof. Dr. Christian Müller Zweitbetreuer: Prof. Dr. Bernd Eylert ii A part of this diploma thesis is not available until April 2010, because it is protected by a lock flag. The complete work can and will be made available by that time. The parts affected are – Chapter 4, – Chapter 5, – Appendix C and – Appendix D. If by that time you cannot find the complete work anywhere, please contact the author. iii Danksagung An dieser Stelle möchte ich all jenen danken, die durch ihre fachliche und persönliche Unterstützung zum Gelingen dieser Diplomarbeit beigetragen haben. Besonderer Dank gebührt meiner Lebenspartnerin Ariane und meinen Eltern, die mir dieses Studium durch ihre Unterstützung ermöglicht haben und mir fortwährend Vorbild und Ansporn waren. Weiterhin bedanke ich mich bei Professor Dr. Christian Müller und Professor Dr. Bernd Eylert für die Betreuung dieser Diplomarbeit. Großer Dank gilt ebenfalls meinen Kollegen bei DiBcom S.A., die mir die Möglichkeit gaben, diese Arbeit zu verfassen und mich technich sehr stark unterstützten. Vor allem möchte ich mich in diesem Zusammenhang bei Jean-Philippe Sibers bedanken, der mir immer mit einer Inspriration zur Seite stand. Gleiches gilt für das „Physical Layer Software Team“: Luc Banda, Frédéric Tarral und Vincent Recrosio. Acknowledgment I want to use this opportunity to thank everyone who supported me personally and professionally to create this diploma thesis. Special thanks appertain to my partner Ariane and my parents, who supported me during my studies and who continuously guided and motivated me.
    [Show full text]
  • A Wide Range and High Speed Automatic Gain Control Eugenio J
    © 1993 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. A Wide Range and High Speed Automatic Gain Control Eugenio J. Tacconit and Carlos F. Christiansen~ Superconducting Super Collider Laboratory* 2550 Beckleymeade Avenue, MS 4004 Dallas, Texas 75237 Abstract The gain of the controlled amplifier is a function of the Automatic gain control (AGC) techniques have been control voltage x(t). Thus, the control system is non linear largely used since the beginning of electronics but in most of and gain loop and stability are usually dependent on the the applications the dynamic responseis slow compared with operating point. The system has to be designed in order to be the carrier frequency. The problem of developing an stable for the maximum loop gain and a poor dynamic automatic gain control having simultaneously high dynamic behavior is obtained for low gain operating points. The effect response‘and wide control range is analyzed in this work. An of the gain control law on the loop gain variation range is ideal gain control law, having the property that the total loop analyzed in the next section. gain remains constant independent of the carrier amplitude, is obtained. The resulting AGC behavior is compared, by It. GAINCONTROL LAW computer simulations, with a linear multiplier AGC. The ideal gain control law can be approximated by using a The output of the variable gain amplifier is given by: transconductanceamplifier.
    [Show full text]
  • Automatic Gain Control and Multi-Style Training for Robust Small-Footprint Keyword Spotting with Deep Neural Networks
    AUTOMATIC GAIN CONTROL AND MULTI-STYLE TRAINING FOR ROBUST SMALL-FOOTPRINT KEYWORD SPOTTING WITH DEEP NEURAL NETWORKS Rohit Prabhavalkar1, Raziel Alvarez1, Carolina Parada1, Preetum Nakkiran2∗, Tara N. Sainath1 1Google Inc., Mountain View, USA; 2University of California, Berkeley, Department of EECS, USA fprabhavalkar, raziel, carolinap, [email protected] [email protected] ABSTRACT We explore techniques to improve the robustness of small-footprint keyword spotting models based on deep neural networks (DNNs) in the presence of background noise and in far-field conditions. We find that system performance can be improved significantly, with rel- ative improvements up to 75% in far-field conditions, by employing a combination of multi-style training and a proposed novel formula- tion of automatic gain control (AGC) that estimates the levels of both Fig. 1: Block diagram of DNN-based KWS system proposed in [2]. speech and background noise. Further, we find that these techniques allow us to achieve competitive performance, even when applied to method was shown to significantly outperform a baseline keyword- DNNs with an order of magnitude fewer parameters than our base- filler system. This system is appealing for our task because it can line. be implemented very efficiently to run in real-time on devices, and Index Terms— keyword spotting, automatic gain control, memory and power consumption can be easily adjusted by chang- multi-style training, small-footprint models ing the number of parameters in the DNN. Although the proposed system works extremely well in clean conditions, performance de- grades significantly when speech is corrupted by noise, or when the 1. INTRODUCTION distance between the speaker and the microphone increases (i.e., in far-field conditions).
    [Show full text]
  • Application of AGC Technology in Software Radio
    International Journal of Advanced Network, Monitoring and Controls Volume 03, No.04, 2018 Application of AGC Technology in Software Radio Wu Hejing East University of Heilongjiang 150086 e-mail: [email protected] Abstract—The characteristics of software radio are flexibility, (2) openness. Software radio adopts a standardized and openness, scalability. The hardware platform of software radio modular structure. Its hardware can be updated or expanded should be a general platform. This paper discusses automatic with the development of devices and technologies. gain control(AGC) technology in software radio receiver and (3) scalability. Software radio can be upgraded by introduces an AGC algorithm applicable for DSP implement. loading new software. This algorithm is tested in matlab and simulation results are III. ARCHITECTURE OF SOFTWARE RADIO provided. Software radio architecture is the concrete design Keywords-Software Radio; Characteristics; AGC; Matlab structure torealize the concept of software radio. It includes hardware, software and interface protocol. The design I. INTRODUCTION content must take into account the current situation and At present, software radio technology is widely used in long-term development of wireless communication wireless communication, its basic idea is to use hardware as technology. Really unifies each standard. The structure of the basic platform of wireless communication. The A/D ideal software radio is mainly composed of antenna, RF front sampling data of signals are processed by various algorithms, end, broadband A/D-D/A soft converter, General and special and various communication functions are realized by means digital signal processors and various software components. of software. This paper discusses the automatic gain control The antenna of software radio generally covers a wide (AGC) algorithm in software radio.
    [Show full text]
  • Stri-C 9, His Attorney
    April 24, 1956 R. L. SNK 2,743,355 AUTOMATIC GAIN CONTROL CIRCUITS FOR PULSE RECEIVERS Filed April 21, 1948 2. Sheets-Sheet lb :-------? la 2. Fiidb. stri-cR -- 9, 2 PUSE TRANSMER PostON COntrol SYNChroniz NG CRCUS ANDrACKNG RANGE - circuits FS GATED video DYNERECEIVER FUSE h Anof1 r 7 NdICAOR CATHODe CONTRO rAY CRCU NOICATOr 76 VOAGEoutput 67 Error SGNAul OUT put InVentor : hrobert L. Simk, His attorney. April 24, 1956 R, L, SINK 2,743,355 AUTOMATIC GAIN CONTROL CIRCUITS FOR PULSE RECEIVERS Filed April 21, 1948 2 Sheets-Sheet 2 CYCLE OF 8Ob Fig3A.-- is 3. u CYCLE kD 79 OF 8Oc d - 2 O an -63a - -- - - -<1. 83b a Fe3C, "Ali. f N / N N M M Pyte N M N / O Fig3D." s al : r Sa er O N1 --> In Wentor: hrobert L. Sink, His attorney. 2,743,355 United States Patent Office Patented Apr. 24, 1956 and also to the appended claims in which the features 2,743,355 pointedof the inventionout. believed to be novel are particularly In the drawings: AUTOMATIC GAIN CONTROL CIRCUITS FOR Fig. 1 is a simplified block diagram of automatic radar PULSE RECEIVERS tracking system in which my invention is suitably em Robert L. Sink, Altadena, Calif., assignor to General Elec bodied; tric Company, a corporation of New York Fig. 2 is a schematic circuit diagram of an automatic gain control and error signal system which may be em Application April 21, 1948, Serial No. 22,421 0. ployed in the radar system of Fig. 1; 6 Claims. (C.
    [Show full text]
  • Laboratory Exercise #7
    ECEN4002/5002 Digital Signal Processing Laboratory Spring 2002 Laboratory Exercise #7 Nonlinear and Adaptive Processing Introduction An important area of real time DSP involves nonlinear and adaptive algorithms. Nonlinear systems include modulation/demodulation in communications, automatic gain control, noise and interference suppression, and various types of pulse forming and wave shaping schemes. In this experiment you will investigate a few processing tasks with data-dependent behavior, and systems in which signals are multiplied together. While for linear systems we have a great deal of analytical muscle in the form of transforms and decompositions based on the superposition property, for nonlinear systems we often must use “linearizing” assumptions like small signal models and perturbation analysis. Dynamic Range Compression There are a variety of situations in which it is desirable to modify the level of a signal using some sort of automatic adjustment. For example, we may have a detection algorithm that works best if its input signal is maintained at a relatively constant amplitude even if the signal itself varies greatly with time. Another example is compensation for channel characteristics. We may find that the dynamic range of a signal is too great to fit within the dynamic range of a channel due to the presence of low-level noise or high-level distortion. In this case we would like to adjust automatically the level of the input signal so that it stays within the allowable dynamic range. This sort of automatic level adjustment is known as an automatic gain control (AGC), a dynamic range compressor/expander, or as a signal limiter.
    [Show full text]
  • A New AM Demodulation Scheme with a Blind Carrier Recovery Method
    Proceedings of the International MultiConference of Engineers and Computer Scientists 2015 Vol II, IMECS 2015, March 18 - 20, 2015, Hong Kong A New AM Demodulation Scheme with a Blind Carrier Recovery Method S. Sukkharak, K. Jeerasuda, and W. Paramote period of a baseband signal (1 fcmRC 1 f ) . In Abstract—In this paper, the proposed large carrier AM addition, the Costas loop [1] is one of the powerful demodulation scheme implemented based on the proposed demodulation techniques because of its ability to sinusoidal automatic gain control scheme (SAGC) is presented. A Multiplier, a LPF and 2 sets of SAGC are combined to demodulate AM, FM and PSK signals without the need for accomplish the new AM demodulation scheme. The prominent mode switching. Still its carrier recovery method relies on benefit of the proposed AM demodulation scheme is having the the knowledge of the modulated frequency and a false the blind carrier recovery method. For any ranges of the carrier lock phenomenon [6-7] relies on accumulated delay in the frequencies and wide range of the modulation indexes, the long loop. According to these conditions, the large carrier proposed AM demodulation scheme has the ability to recover AM demodulation scheme with a non-data aided carrier the baseband signal. With a very simple mathematical analysis, the proposed SAGC provides unity magnitude and 90-shifted recovery method is proposed. It is based on a new phase output for all input’s frequency components. By using sinusoidal automatic gain control scheme (SAGC) which is the computer simulation, the proposed SAGC and AM also proposed in this paper.
    [Show full text]
  • ON Semiconductor Is
    ON Semiconductor Is Now To learn more about onsemi™, please visit our website at www.onsemi.com onsemi and and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others.
    [Show full text]
  • Automatic Gain Control (AGC) As an Interference Assessment Tool Frédéric Bastide, Dennis Akos, Christophe Macabiau, Benoit Roturier
    Automatic gain control (AGC) as an interference assessment tool Frédéric Bastide, Dennis Akos, Christophe Macabiau, Benoit Roturier To cite this version: Frédéric Bastide, Dennis Akos, Christophe Macabiau, Benoit Roturier. Automatic gain control (AGC) as an interference assessment tool. ION GPS/GNSS 2003, 16th International Technical Meeting of the Satellite Division of The Institute of Navigation, Sep 2003, Portland, United States. pp 2042 - 2053. hal-01021721 HAL Id: hal-01021721 https://hal-enac.archives-ouvertes.fr/hal-01021721 Submitted on 30 Oct 2014 HAL is a multi-disciplinary open access L’archive ouverte pluridisciplinaire HAL, est archive for the deposit and dissemination of sci- destinée au dépôt et à la diffusion de documents entific research documents, whether they are pub- scientifiques de niveau recherche, publiés ou non, lished or not. The documents may come from émanant des établissements d’enseignement et de teaching and research institutions in France or recherche français ou étrangers, des laboratoires abroad, or from public or private research centers. publics ou privés. Automatic Gain Control (AGC) as an Interference Assessment Tool Frederic Bastide, ENAC/STNA, France Dennis Akos, Stanford University Christophe Macabiau, ENAC, France Benoit Roturier, STNA, France BIOGRAPHIES aviation applications based on GPS/ABAS, EGNOS and Galileo. Frederic Bastide graduated as an electronics engineers at the ENAC, the French university of civil aviation, in ABSTRACT 2001, Toulouse. He is now a Ph.D student at the ENAC. His researches focus on the study of dual frequencies Automatic Gain Control (AGC) is a very important receivers for civil aviation use. Currently he is working on component in a Global Navigation Satellite System DME/TACAN signals impact on GNSS receivers.
    [Show full text]