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16 IO Techniques TOC.Pdf CSC414 I/O Techniques Computer Input/Output Techniques for communicating data and commands CPU System Techniques Programmed I/O Fundamentals - CPU initiates communication with Command external device Memory Interrupt Driven I/O - External input initiates communication Digital Forensics Center with CPU THINK BIG WE DO I HaveDataData Data! Department of Computer Science and Statics Direct Memory Access (DMA) Device Controller - Method for transferring data between U R I main memory and a device that http://www.forensics.cs.uri.edu bypasses the CPU Programmed I/O Interrupts Programmed I/O Devices need a mechanism to Current Program get the CPU's attention - Direct CPU controlled I/O Memory Data Instruction Register Register - Device has completed a request Fetch - Integrated into the Fetch/Execute cycle - Disk buffer is full and ready to transfer - CPU Instruction contains device address and CPU Execute command I/OData Data I/OI/O ControlInterface I/O Address - Notify that an external event occurred Register Register Register - MDR contains data to transfer - Real-time or time-sensitive - Can transfer one register of data per cycle - Allocate CPU time (System Clock) Interrupt? - Multitasking, Mulitprocessing - One word - 16-bit, 32-bit, 64-bit Device Buffer - Indicate abnormal event - Suitable only for slow devices and Device Controller individual word transfers - illegal operation, hardware error - CPU originates for notification and recovery) - Keyboards - User Programs (Software Interruption!) Interrupts Interrupts - Hardware Interrupt Current Program Operating System Implementing Interrupts Operating System - Signal causing the CPU to alter its - Interrupt lines (hardware) (INT) normal flow of instruction Fetch Save Current Save Current Program Context - One or more special control lines to the CPU Program Context execution - I/O Advanced Programmable Interrupt Controller - Frees CPU from waiting for events Yes Yes Execute Determine which (IOAPIC) receives Interrupt Request from device Determine which Provides control for external I/O device caused device caused - - Device needing attention sends Interrupt Request initiation interrupt interrupt (IRQ) No Interrupt? Interrupt? - "Interrupt ID" of the device (16 bits) Execute Interrupt Execute Interrupt Handler for Handler for device INT device IOAPIC 0000IRQ 1110 Memory I/O Controller Device Controller Unit Hub Restore Program Controller Restore Program Context (Northbridge) (Southbridge) Context Interrupts Interrupts Implementing Interrupts Operating System Implementing Interrupts Operating System IRQ Standard device Assignment - Saving Current Program Context - Vectored interrupt 0 System Time Save Current Save Current 1 Keyboard - Saved registers of a program before control is Program Context - Address of interrupting device is included in the Program Context interrupt 2 Cascade to IRQ9. Can't be used transferred to the interrupt handler 3 COM ports 2 and 4 Yes Yes - Requires additional hardware to implement 4 COM ports 1 and 3 - Allows program to resume exactly where it left off Determine which Determine which 5 Parallel Port LPT2. (Sound cards) when control returns to interrupted program device caused device caused - Polling 6 Floppy drive controller interrupt interrupt - Program Counter (PC) is important! - Identifies interrupting device by polling each device 7 Parallel Port, LPT1 Interrupt? 8 Interrupt?Real Time Clock - General interrupt is shared by all devices 9 Unassigned (Also redirected from IRQ2) Execute Interrupt Execute Interrupt Handler for 10 Available Handler for INT device INT 11 Available - Usually fordevice SCSI adapter IOAPIC 0000IRQ 1110 IOAPIC 0000IRQ 1110 12 Mouse or touch pads 13 Math co-processor Memory I/O Controller Device Memory I/O Controller Device 14 Primary hard-disk IDE controller Controller Unit Hub Restore Program Controller Unit Hub Restore Program Controller Controller15 Secondary hard-disk controller (Northbridge) (Southbridge) Context (Northbridge) (Southbridge) Context Interrupts Direct Memory Access Implementing Interrupts Operating System Transferring large blocks of data can - Interrupt handlers (OS Dependent) tie up CPU Save Current - Program that services the interrupt IRQ InterruptProgram Handler ContextAddress - During transfer CPU is not interacting with 0 0x00A000 user - Also known as an interrupt routine 1 Yes0x00B000 2 0x00C000Determine which - Part of device driver code 3 0x00D000 device caused - IRQ is used as a reference into a table 4 0x00D800 interrupt that stores the interrupt handler Interrupt? locations Execute Interrupt Memory For time sharing or Handler for INT device multiprocessing,IOAPIC the interruptIRQ handler restores the context Memory I/O Controller Device Memory I/O Controller Device of the next program that is Send It! I HaveData Data! Controller Unit Hub Restore Program Send It! Controller Unit Hub Data 0000 1110 schedule for the CPU. Controller Controller (Northbridge) (Southbridge) Context CPU (Northbridge) (Southbridge) Direct Memory Access Direct Memory Access (DMA) is solution CPU sends - CPU initiates transfer (Programmed I/O) To implement DMA: • location of data on I/O device system needs a DMA Input/Output - Device directly transfers data to or from memory •the starting location in • controller for memory - CPU not actively involved in transfer itself memory • each device needs a DMA • the size of the block - Device sends interrupt to notify CPU of completion enabled controller Techniques • read/write Memory Digital Forensics Center Department of Computer Science and Statics THINK BIG WE DO Memory Memory I/O Controller Send It Controller Unit Device To Memory Controller Unit Hub II'm HaveData Datadone! Data! U R I with DMA Controller CPU (Northbridge)Controller (Southbridge) http://www.forensics.cs.uri.edu.
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