OPF Supervessel
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What is Supervessel, and how to build your own accelerated OpenStack cloud with OpenPOWER Yong Hua Lin, Fei K Chen, IBM China Research Laboratory H. Peter Hofstee, IBM Austin Research Laboratory & TU Delft © 2016 OpenPOWER Foundation SuperVessel: The OpenPOWER Cloud for Developers and Ecosystem www.ptopenlab.com OpenPOWER • Open CPU • Big data service technology • Accelerator service • Machine learning & deep Open + High performance => learning Accelerate Innovation SPARK OpenStack • Cloud Data Service • Open Big • Open Cloud • IoT application Data Technology Technology SuperVessel Cloud development platform • POWER open source migration service • Science computation Docker, KVM • Open platform virtualization technology POWER/OpenPower Heterogeneous Computation: GPU,FPGA High performance I/O:CAPI,RDMA 2 © 2016 OpenPOWER Foundation Growth of SuperVessel in 2015/2016 Beijing Site Community Region (Nov. 2014) Collaboration with OpenPOWER Partners US Site (Nov.2015) Beijing Site Enterprise Region (Nov. 2015) • Zoomnet • Neu Cloud Oriental • Chuanghe Hangzhou Site (Aug. 2015) • Nvidia • Xilinx • Semptian • Redflag Linux • RedHadoop • Transwarp • iSoft • ~ 80 POWER/OpenPOWER servers, ~ 50 GPUs, ~ 15 FPGAs • ~ 3000 instances daily active, and ~75% are containers >15 partners/companies >50 universities >30 countries • Global first public cloud provide virtualized FPGA service, normally running for 18 months at two data centers. • Support more than 10,000 user times of FPGA service. • Support more than 200 FPGA accelerator developers. • Support IBM OpenPower Dev Challenge, IBM-Xilinx Heterogeneous Computing Competition and other global events. 3 © 2016 OpenPOWER Foundation OpenPOWER Developer Challenge (supported by Supervessel) • Supervessel is the cloud platform to support all teams/developers • Supervessel provided the leading technologies on GPU and FPGA (e.g. AccDNN), to let developers easily make innovation on heterogeneous computation cloud. URL to participate challenge: http://openpower.devpost.com/https://www.youtube.com/watch?v=C08bfOHt3kw 4 © 2016 OpenPOWER Foundation IBM and XueTangX announced the collaboration on MOOC cloud • On Sep.16 2016, IBM and xuetangX.com jointly announced the collaboration on online education. • XuetangX (www.xuetangx.com) is a leading MOOC platform in China, founded by Tsinghua University. Today, XuetangX has more than 1 million subscribers 5 5 © 2016 OpenPOWER Foundation Acceleration Service in SuperVessel Cloud Accelerator developers : Application developers : Easily develop and deploy accelerator Easily use accelerator for application on cloud Accelerator Development Accelerator Deployment • Upload accelerator • Create VM environment with • Create accelerator FPGA acceleration • FPGA virtualization with POWER KVM HEAT orchestrator • CAPI virtualization with Docker • GPU virtualization with Docker Compute Network Storage FPGA/GPU • RDMA-based remote FPGA&GPU acceleration POWER8/PowerKVM/Docker • OpenStack-based accelerator service management Acceleration Hardware FPGA FPGA Nvidia GPU RDMA Card 6 © 2016 OpenPOWER Foundation 7 FPGA Accelerated Applications Accelerated FPGA E En g En ● ● Engi n hard pipeline Optimized Parallelism Engi ne Engi e1 ngi 2E gine FPGA En ne3 Engi ne4 ngi 5 gine ine6 ne7E e8n 9g i n e 5 0 Memory(Coherent) FPGA card accelerator with inside FPGA IBM CAPI POWER8 ProcessorPOWER8 IBM Supplied CAPP PCIe FPGA AFU PSL OS POWER8 Core App © © 2016 OpenPOWER Foundation FPGA Virtualization Stack KVM-based Compute Node Virtual Utilities Guest Process Machine Virtual HW Docker-basedMach inComputee Node Bitfile Modules APIs Library Openstack Applications Openstack Guest Agent Agent Virtual Guest Guest Control APIs FPGA OS Module Driver Utilities Driver Utilities Driver Library APIs Images Library APIs Images Hypervisor Host Control Module Host Driver Kernel Control Module / Driver …… Hardware DRAM Service Logic FPGA Hardware C A P I FPGA Openstack-based Cloud Compute Tenant Node FPGA CPU Memory Service Logic High Bandwidth I /O Control Node Registers C D Job Queue A Compute Node Reconfig Job Scheduler Scheduler B Controller Tenant DMA Engine FPGA chip Context Controller Eth Switch DRAM Security Controller A B r C ye A B C D la r Enhanced OpenStack D b e y u a S l User Sublayer : Shared FPGA resource e b c u i S rv e rm Service Sublayer : Job Queue , Switch, S o tf la Platform Sublayer : DRAM, PCIe, ICAP, P 8 © 2016 OpenPOWER Foundation Complicated FPGA Development Matrix Project Management Local Github Opencore … Program Language VHDL C/C++ Verilog OpenCL Compile Environment Compiler Compiler Compiler FPGA Target Board Operation Server 9 © 2016 OpenPOWER Foundation Requirement for Fast Development Cycle Code Target Board Code HW & Runtime Accelerated App./solution Management Selection Development Setup Publish VHDL/Verilog High Level Language Environment setup become bottleneck e.g. OpenCL FPGA DevOps on SuperVessel + SDAccel cloud FPGA Accelerator Development Cycle 10 © 2016 OpenPOWER Foundation Accelerator DevOps Architecture UI Source Code Manager Compile and Optimize Operation Environment Infrastructure • Hybrid resource scheduling in cloud. Source SDAccel App SDAccel • Low latency data synchronization Code Compiler Data Runtime between object storage and different Docker Docker VM. Object Storage POWER8 • Job queue design over heterogeneous FPGA cloud environment. • Unoriginal cloud design of third-party tool chain. Compute Node • Run-time status detection on Compute Node transparent VM. FPGA OpenStack FPGAFPGA Control Node FPGA Scheduler Job Queue SuperVessel Cloud 11 © 2016 OpenPOWER Foundation Acceleration-Enabled Spark https://devpost.com/software/scaling-up-and-out-a-bioinformatics-algorithm T. Voicu, e.a. 12 © 2016 OpenPOWER Foundation Notices and Disclaimers Copyright © 2016 by International Business Machines Corporation (IBM). No part of this document may be reproduced or transmitted in any form without written permission from IBM. U.S. Government Users Restricted Rights - Use, duplication or disclosure restricted by GSA ADP Schedule Contract with IBM. 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