Over-Current Protection Scheme for Sic Power MOSFET DC Circuit Breaker

UC Berkeley Building Efficiency and Sustainability in the Tropics (SinBerBEST)

Title Over-Current Protection Scheme for SiC Power MOSFET DC Circuit Breaker

Permalink https://escholarship.org/uc/item/6bs9x3v7

Authors Zhang, Yuan Liang, Yung C.

Publication Date 2015-02-23

eScholarship.org Powered by the California Digital Library University of California Over-Current Protection Scheme for SiC Power MOSFET DC Circuit Breaker

Yuan Zhang, Student Member,IEEE and Yung C. Liang*, Senior Member,IEEE Department of Electrical and Computer Engineering, National University of Singapore, Singapore *Contact Author E-mail: [email protected]

Abstract—The electronic circuit breaker used in DC by joint overheating [6] if the fault current is not cleared in microgrids are required to work within their safe operating time. In serious conditions like short-circuit faults, the areas bounded by temperature, voltage and current limits. electromagnetic force induced by large fault current cracks Traditional approach managed to protect these switches the bond wires of electronic switches and causes physical through rapid current cut-off operations at over-load or fault damage to the semiconductor dies[7]. situations, but failing to avoid the disturbance induced by transient current surges or noises which are not harmful to the grid operations. Aiming to increase the quality of circuit Several schemes had been proposed to protect SiC breaker operations and furthermore improve its reliability, devices from thermal and mechanical damage [8-10]. In [8], this paper proposed a SiC MOSFET based DC circuit breaker it came out with a method to collect temperature information based on the variable time-delay protection scheme. The cut- by thermal coupler in order to prevent the SiC devices from off operations only take place after proper delay time, which overheating damage. However, the use of thermal coupler is are precisely catered according to the transient thermal not welcomed since it increases the cost and complexity of properties of SiC devices and the properties of DC loads. The the control circuit. Some achieved rapid fault isolation proposed scheme has been implemented with hardware function for SiC devices based on technique of micro- prototype and experimentally verified under different fault controllers [9]. The fault current can be interrupted within a situations. few micro-seconds. Such a rapid interruption scheme may I. INTRODUCTION result in premature current interrupt on transient surge or noise. In practice, in moderate fault situations with relatively DC microgrids are used in modern buildings, vessels and low fault current level, SiC devices will not be burned out vehicles as efficient delivery interconnects between DC immediately until a few milliseconds later. This indicates energy sources and loads. Similar to AC grids, circuit that smaller fault current can be cut off after an allowable breakers in DC microgrids carry the function on grid delay time, in order to avoid the false alarm on current surge protection. Therefore, these breakers not only do endure grid or noise. normal operations and but also be capable of cutting off currents under various fault levels. Solid-state DC circuit In this paper, a solid-state circuit breaker based on SiC breakers made of the modern wide bandgap power power MOSFET with variable time-delayed protection semiconductor devices, such as silicon carbide (SiC) and scheme for DC microgrids is developed. The turn-off delay gallium nitride (GaN) MOSFETs can largely enhance the time varies according to the transient thermal property of the switching performance much better than the mechanical SiC power MOSFET device, as well as the load protection counterparts [1,2]. These wide bandgap power devices have delay time according to user’s preset requirements. The higher voltage sustainability, higher temperature tolerance introduction of variable delay time ensures the circuit and faster switching speed with simple driving requirements breaker function with high reliability under various [3]. For the voltage level of 400V for the DC microgrids, the overcurrent transient situations. use of SiC power devices is a prominent choice for the circuit breaker due to their remarkable performance merits II. VARIABLE TUNR-OFF DELAY TIMES FOR PROTECTION [4,5]. A. Three Different Fault Conditions Besides protecting loads, electronic circuit breakers also Large current caused by overloading or faults in DC need to protect themselves from large fault current. The microgrids will need to be interrupted and isolated in order to possible risks faced are in two conditions. In moderate fault preserve the grid integrity. If fault current ID exceeds the load situation, the breaker may suffer from thermal stress caused current limitation ILD, load may suffer and break down. If ID

978-1-4799-5776-7/14/$31.00 ©2014 IEEE 1967 exceeds the continuous current rating IOC of semiconductor B. Trasient Thermal Response of SiC Switch switch, the switch will suffer thermal stress and damage. If At large fault current, SiC device is heated with ID exceeds the pulsed current rating ISC, electromagnetic temperature gradually rising on thermal capacitance [10]. damage might happen to the semiconductor switch [7]. The transient thermal response of SiC MOSFET can be derived based on the equivalent thermal circuit shown in Fig. Three different fault levels showed in Fig. 1 are protected 3(a), in which thermal capacitance and resistance are in DC microgrid. The corresponding protection operations in modelled by electric capacitor and resistor. The resistance these three fault situations have different assigned turn-off RJC and capacitance CJC between junction and case, and delay time as shown in Fig. 2. resistance RCA and capacitance CCA between case and ambient are used in the circuit model. Temperatures of (1) Overload fault (ILD ≤ ID < IOC): As shown in Fig. junction, case and ambient are equivalent by node voltages 1(a), fault current ID should be interrupted with the allowable assigned as TJ, TC and TA respectively. Power dissipation by turn-off delay time to ensure the safety of DC load. Both semiconductor junction is equivalent to a current source load current limitation ILD and turn-off delay time are signed as PD. Transient thermal response can be treated as adjustable according to the load protection requirement. the process that temperature TJ varying with power PD. Usually, delay time varies from a few milliseconds to a few Normally, the time constant τCA=RCACCA is a few seconds if a seconds for different DC load types [11]. heatsink is used, which is much larger than the time scale of transient thermal response considered in this paper. Thus it is reasonable to ignore the effects of R and C , and analyze (2) Large overcurrent fault (IOC ≤ ID < ISC): Switch is CA CA the simplified model in Fig. 3(b) with constant case short circuited through the impedance Zf [12] as in Fig. 1(b). Protection operation is required within the Safe Operation temperature TC. Area (SOA) thermal limit to avoid overheating. As shown in Fig. 2, the allowable delay time varies exponentially with the overcurrent magnitude ID according to the transient thermal property of the semiconductor switch in the ranges of milliseconds.

(3) Short-circuit fault (ID ≥ ISC): This is the most Figure 3. Equivalent model for transient thremal response of SiC serious situation with almost zero fault impedance shown in MOSFET (a) Detailed model (b) Simplifed model Fig. 1(c). Fault current ID should be cut off as soon as possible to avoid electromagnetic force damage to the power In Fig. 3(b), junction temperature TJ increases according semiconductor devices. The maximum turn-off delay time is to usually in microsecond for rapid operation. (1)

where ZJC is the transient thermal impedance related to RJC and CJC; TC is a constant value depending on the initial operating condition as

(2)

Figure 1. Three fault types in DC microgrids (a) oveload fault (b) large where PD0 is the initial dissipation power; RCA is the case-to- overcurrent fault (c) short-circuit fault ambient thermal resistor; TA is the ambient temperature.

102 In (1), the value of power dissipation PD depends on the 101 on-state resistance RDS and drain current ID as

1 0 10 large overload overcurrent short-circuit (3) 100 -1 fault fault fault

0(s) -2 10 where RDS changes with IDS according to 100 -3 100 -4 0.001 20 (4) ILD IOC ISC Maximum turn-off delay time 100 -5 RDS0 in (4) is temperature-dependent and is at ID=20A. Its 0 102030405060708090100 Fault current (A) value is described in the datasheet of SiC MOSFET [13] as Figure 2. The variable time-delay protection scheme for DC mcrogrid by following SiC power MOSFET switch CMF20120D

1968

Figure 4. Protection circuit for DC load

0.087 25 63 Under overload situation with ID exceeding load rating (5) 0.087 63 ILD, VH increases accordingly and makes the output signal V1 of comparator jump to a high level. In this situation, the delay time circuit formed by oscillator and counter starts to where coefficients a , a and a are 0.00006, 0.0044 and 1 2 3 operate, and produces a positive pulse V which induces a 1.04. 5 positive edge VLD.

ZJC in (1) can also be obtained from datasheet as As mentioned before, the current threshold ILD and turn- off delay time td for overload depend on the requirement of 10 10 0.14 (6) the DC load and thus should be adjustable by users. This can 0.53 0.14 be achieved by changing the value of resistance R4 and R11. ILD varies its value with R4 according to where coefficients b1, b2, b3 and b4 are 0.01, 0.20, 0.38 and 0.40; c is the common logarithm of duration t with fault (6) current. ⁄

Based on (1)-(6), the allowable time for SiC MOSFET to where VH0 and kS are current sensor’s coefficients shown in exceed its maximum junction temperature rating can be (5); Vth1 is the threshold of comparator set by A2 in Fig.4. derived using numerical iteration method and obtained as Turn-off delay time td then varies with resistance R11 depicted in Fig. 2. This delay-time value is treated as the according to maximum turn-off delay time on overcurrent fault, within (7) then the fault current has to be interrupted [14]. Here the 20 maximum junction temperature is set to be 200ºC to maintain thermal reliability [15], and pulsed current rating B. Protection Circuit for SiC MOSFET Switches ISC is set at 78A according to the datasheet [13]. Fig. 5 shows the protection circuit for SiC switching device. When overcurrent fault happens, fault current ID III. PROPOSED CIRCUIT FOR TIME-DELAYED PROTECTION exceeds the current threshold IOC. VH surges and makes the Since the allowable turn-off delay time of three fault output voltage V7 increase. V7 gradually charges capacitor C2 types are in different time scale, the proposed circuit is in the time delay circuit. Once voltage V8 of C2 exceeds the designed for load protection and device protection threshold value Vth2 of comparator A10 after delay time td, a respectively. positive edge VOC is produced.

A. Load Protection Circuit The threshold IOC of switch protection is set based on Fig.4 shows the protection circuit for DC load. The input ⁄ ⁄ (8) signal VH comes from the hall-effect sensor which senses drain current ID of MOSFET with proportional voltage signal output according to and the delay time td corresponding to fault current level ID can be represented as (5) ⁄ ⁄ (9) 1 ⁄ ⁄ where VH0 is the quiescent output voltage of hall-effect sensor when I equals to zero; k is the sensitivity of the D S where τ is the time constant for RC circuit. In overcurrent sensor. In this paper, hall-effect sensor with VH0=0.6V, fault with relatively small ID, V7 is small so that zener diode kS=0.04V/A is used. Z1 does not break down. Thus τ is larger and can be

1969 estimated as τ = ROCC1, where ROC is the parallel resistance of A1, A2, A7, A9, A10: LM392, A3, A14: ICM7555, R20 and R21. In short-circuit situation with larger ID, τ A4, A6: CD4049, A5: CD4029, A8, A12: CD4013, decreases to RSCC1 due to the breakdown of Z1. Here RSC is the parallel resistance of ROC and the dynamic resistance of A11: CD4075, A13: IR2117, A15: CMF20120D; Z1. The decease of τ meets the rapid turn-off action required in short-circuit fault. VDD1: 15V, VDD2: 5V. C. Control of Gate Driving Circuit A. Load Protection Test Fig. 6 shows the continuously-on gate driver of the SiC In the load protection test, resistance R4 and R11 are set MOSFET high-side switch [16]. As can be seen, the driver is to be 2.7kΩ and 140kΩ respectively. According to (6) and (7), the current threshold I for load protection is 3.4A, controlled by three signals: VLD from load protection circuit, LD VOC from switch protection circuit, and manual command while turn-off delay time is about 2.8s. Since the supply DC VSD. At the initial stage, a positive pulse VSD is required to voltage VD in Fig. 6 is 400V, the resistance of DC load is set turn on the SiC MOSFET. Once fault happens, positive pulse to be 54Ω in order to create the overload fault. Measured VOC or VLD is produced after allowable delay time and SiC waveforms on load protection are shown in Fig. 7. As seen, switch is turned off. the SiC MOSFET is turned on at 0.72s when gate voltage VGS raises to 15V under the function of positive pulse VSD in Fig. 6. Current ID surges to 9.6A and sets at 5.4A exceeding the threshold current level ILD. The turn-off command VLD is produced after 2.78s and fault current ID is cut off at 3.5s.

VGS

Figure 5. Protection circuit for SiC MOSFET switch ID

VDS

VLD

Figure 7. Tested waveform of load protection circuit. VGS: 20V/div, ID: 3A/div, VDS: 500V/div, VLD: 20V/div, time: 0.4s/div

The relationship between current threshold ILD and Figure 6. High-side drive and current sensor for SiC MOSFET Switch resistance R4 is verified and showed in Fig. 8, in which solid line is the calculated outcome based on (6) and dots are the IV. EXPERIMENTAL VERIFICATION measured data. The relationship between turn-off delay time To verify the function of time-delayed protection circuit and resistance R11 is showed in Fig. 9. Both figures verify developed in Fig. 4 to Fig. 6, the experimental measurements that the measured data match the prediction closely, which were taken. The component values in the designed circuits indicates that proposed protection circuit can be adjusted are listed as follows: according to different load requirements. R1, R2, R3, R10, R17, R18=1kΩ, R6=3.3kΩ, R15=47kΩ, B. Switch Protection Test

R5, R9, R12, R16, R24, R26=2.2kΩ, R7, R13=4.7kΩ, In this test, protection circuit is required to respond to large overcurrent and short-circuit faults. The turn-off delay R , R =33kΩ, R =2.7kΩ, R , R =1.5kΩ, R =10kΩ 8 25 19 14 22 23 time is measured under different fault current levels ranging R20, R21=15kΩ, R28=1MΩ, R29=560Ω, R30=120Ω; from 30A to 90A. The function of zener diode Z1 in Fig. 5 is R =0~5kΩ, R =0~1MΩ; experimentally examined. The relationship between turn-off 4 11 delay time and fault current level is depicted in Fig. 10. As C1, C3, C4=1µF, C2=0.33µF, C6=10nF, seen, protection circuit with Z1 manages to turn off the fault current ID before the maximum allowable turn-off delay C5, C7, C8=0.1µF, C9=0.033µF; time. The threshold current IOC of overcurrent protection is D1, D2, D3: 1N4002; 32.5A, above which the turn-off delay time decreases from 60.85ms to 0.254ms when ID is at 72.5A. The threshold Z1: BZX85C11, Z2: BZX85C15; current ISC of short-circuit protection is 72.5A, above which

1970 the allowable turn-off delay time becomes 75µs. The turn- ACKNOWLEDGMENT off delay time exceeds the maximum limitation if zener This research is funded by the Republic of Singapore’s diode Z1 is not used. National Research Foundation through a grant to the Berkeley Education Alliance for Research in Singapore 40 (BEARS) for the Singapore-Berkeley Building Efficiency simulation 35 test and Sustainability in the Tropics (SinBerBEST) Program. 30 BEARS has been established by the University of California, 25 Berkeley as a center for intellectual excellence in research 20 and education in Singapore 15 REFERENCES 10 [1] C. Meyer, M. Kowal, and R. W. De Doncer, “Circuit breaker 5 concepts for future high-power DC-applications,” in 40th Industry Overload faultthreshold(A) 0 Applications Annu. Meeting., Hong Kong, 2005, pp. 860-866. 0 0.5 1 1.5 2 2.5 3 3.5 4 [2] M. Richard and M. Peter, “Comparison of advantages and Resistance (kohm) disadvantages of electronic and mechanical protection systems for higher voltage DC 400V,” in Proc. 2013 Telecommunications Energy Figure 8. The relationship between overload fault current threshold I LD Conf., Hamburg, 2013, pp. 236-242. and resistance R4 [3] B. W. Williams, “The power MOSFET,” in Principles and Elements 25 of Power Electronics, Glasgow, England: Strathclyde Univ, 2006, ch. 4, pp. 116-117. simulation 20 test [4] S. Anand and B. G. Fernandes, "Optimal voltage level for DC microgrids," in 36th Ann. Conf. Industrial Electronics Society, Glendale, AZ , 2010, pp. 3034 – 3039. 15 [5] R. J. Callanan, A. Agarwal, and A. Burk, et al., “Recent progress in 10 SiC DMOSFETs and JBS Diodes at Cree,” in 36th Ann. Conf. Industrial Electronics, Orlando, FL, 2008, pp. 2885-2890. 5 [6] D. Dibra, M. Stecher, and S. Decker, et al., “On the origin of thermal Turn-off delay time (s) runaway in a trench power MOSFET,” in IEEE Trans. Electron Devices, vol. 58, no. 12, pp. 3477-3483, Oct. 2011. 0 [7] H. Medjahead, P. E. Vidal, and B. Nogarede, “Comparison between 0 100 200 300 400 500 600 700 800 900 1000 Resistance (kohm) electromagnetic and thermal stress induced by direct current flow in IGBT bond wires,” in 7th Int. Conf. Integrated Power Electronics Figure 9. The relationship between overload turn-off delay time tLD and Systems, Nuremberg, 2012, pp. 1-6. resistance R11 [8] X. Feng and A. V. Radun, “SiC based solid state power controller,” in 23th Annu. Applied Power Electronics Conf. and Expo., Austin, TX, 2008, pp. 1855-1860. 101 maximum delay time [9] K. Sakamoto, N. Fuchigami, H. Tsunoda, and E. Yanokura, “A fast- 101 0 protection without zener switching intelligent power MOSFET with thermal protection and protection with zener negative gate protection,” in Int. Symp. Power Semiconductor 100 -1 Devices and IC's, Weimar, 1997, pp. 189-192. 100 -2 [10] U. Drofenik and J. W. Kolar, “A thermal model of a forced-cooled heat sink for transient temperature calculations employing a circuit 100 -3 simulator,” in IEEE Trans. Industry Applications, vol. 126, no. 7, pp. 841-851, 2006. 100 -4

Turn-off delay time (s) [11] Motors and Generators, NEMA Standard MG 1-1998. Rev. 3, 2002. 100 -5 [12] D. Salomonsson, L. Soder, and A. Sannino, “Protection of Low- 0 102030405060708090 Voltage DC Microgrids,” in IEEE Trans. Power Delivery, vol. 24, no. Fault current (A) 3, pp. 1045-1053, Jul. 2009. Figure 10. Turn-off delay time of tested circuit under different fault current [13] CMF2010D-Silicon Carbide Power MOSFET, Rev. D, CREE Inc., level Durham, NC, 2012. [14] J. Luo, Y. C. Liang, and B. J. Cho, “Design of LIGBT protection V. CONCLUSIONS circuit for smart power integration,” in IEEE Trans. Industrial Electronics, vol. 47, no. 4, pp. 744-750, Aug. 2000. This paper describes a variable time-delay overcurrent [15] K. Sheng, “Maximum junction temperatures of SiC power devices,” protection scheme for SiC MOSFET circuit breakers used in in IEEE Trans. Electron Devices, vol. 52, no. 2, pp. 337-342, Feb. DC microgrid. The proposed scheme provides 2009. comprehensive protection for all overcurrent conditions with [16] Providing continuous gate drive using a charge pump, TI Co., Dellas, a proper current-dependent turn-off delay time. The TX, 2011, pp. 4-6. proposed scheme is verified through laboratory measurements and the effectiveness of protection scheme is clearly confirmed.

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