Storage Class Memory – the Future of Solid State Storage

Phil Mills, IBM SNIA Director, Chair of Solid State Storage Initiative SNIA Legal Notice

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Storage Class Memory the Future of Solid State Storage This tutorial describes 9 new technologies currently under development in research labs around the world that promise to replace today's NAND Flash technology. These new technologies - collectively called Storage Class Memory (SCM) - provide higher performance, lower cost, and more energy efficient solutions than today's SLC/MLC NAND Flash products. In this tutorial we extrapolate SCM technology trends to 2020 and analyze the impact on storage systems. The material is intended for those people that are closely watching the impact to the storage industry - brought about by NAND Flash - and want to understand what's next.

Storage Class Memory: The Future of Solid State Storage 3 © 2009 Storage Networking Industry Association. All Rights Reserved. First – a plug for the SSSI SNIA Solid State Storage Initiative (www.snia.org/sssi) Foster the growth and success of solid state storage in both commercial and consumer environments Approximately 35 companies have joined since we formed last September Education is one of our major activities We have created a track of SNIA Tutorials for solid state storage Tuesday, 2:10-2:55pm, Overview and Current Topics in Solid State Storage, Rob Peglar, Xiotech Tuesday, 3:05-3:50pm, Solid Business, Shifting Vision: What Users can Expect from SSS in the next 2 Years, Woody Hutsell, Texas Memory Systems Tuesday, 4:00-4:45pm, Solid State Storage TCO Calculator, Terry Yoshii, Intel Tuesday, 4:55-5:40pm, Storage Class Memory: the Future of Solid State Storage, Phil Mills, IBM Wednesday, 4:55-5:40pm, Facing an SSS Decision? SNIA's Efforts to Evaluate SSS Performance, Khaled Amer, SNIA SSS TWG In addition, these Presentations were delivered yesterday morning Monday, 9:20-10:05am, Digital Storage for Professional Media and Entertainment, Tom Coughlin, Coughlin Associates Monday, 10:15-11:00am, SSD or HDD? How to Get the Benefits of Both with Dynamic Tiering, Ronald P Bianchini, Avere Systems Monday, 11:10-11:55am, Solid State Drives a Shining Storage Star for Data Centers, Brian Beard, Samsung Also, check out the Solid State Storage Summit and the Solid State Storage Hands-on-Lab

Logic Memory Active Storage Archival

1980 CPU RAM DISK TAPE

fast, synch slow, asynch

2009 FLASH CPU RAM SSD DISK TAPE

2013+ CPU RAM SCM DISK TAPE

A new class of data storage/memory devices many technologies compete to be the ‘best’ SCM SCM blurs the distinction between MEMORY (fast, expensive, volatile ) and STORAGE (slow, cheap, non-volatile) SCM features: Non-volatile Short Access times (~ DRAM like ) Low cost per bit (DISK like – by 2020) Solid state, no moving parts

Speed A solid-state memory that blurs the boundaries between storage and memory by being Memory-type Storage-type low-cost, fast, and non-volatile. uses uses Power!

(Write) Cost/bit Endurance

SCM system requirements for Memory (Storage) apps • No more than 3-5x the Cost of enterprise HDD (< $1 per GB in 2012) • <200nsec (<1μsec) Read/Write/Erase time • >100,000 Read I/O operations per second • >1GB/sec (>100MB/sec) • Lifetime of 109 – 1012 write/erase cycles • 10x lower power than enterprise HDD

Device Capacity [GB] Key Requirement: Cost [$/GB] - Data Integrity is a Given! Speed (Latency, R/W Access Time) [ns] Speed (Bandwidth, R/W) [GB/sec] Random/Block Access Write Endurance (#Writes before death) Read Endurance (#Reads before death) Data Retention Time [Years] Power Consumption [Watts] Reliability (MTBF) [Million hours] Volumetric Density [TB/liter] Power On/Off Transit Time [sec] Shock & Vibration [g-force] Temperature Resistance [oC] Radiation Resistance [Rad]

SRAM Cost NOR FLASH DRAM

NAND FLASH

HDD

STORAGE CLASS MEMORY

Cost competition between IC, magnetic, and optical devices comes down to effective areal density. 2F 2F

Critical Area Density Device feature-size F (F²) (Gbit /sq. in) Hard Disk 50 nm (MR width) 1.0 250 DRAM 45 nm (half pitch) 6.0 50 NAND (2 bit) 43 nm (half pitch) 2.0 175 NAND (1 bit) 43 nm (half pitch) 4.0 87

[Fontana:2004, web searches] Storage Class Memory: The Future of Solid State Storage © 2009 Storage Networking Industry Association. All Rights Reserved. 10 B-12 Cost Structure of Silicon-based Technology

$100k / GB Cost determined by $10k / GB NAND y cost per wafer $1k / GB y # of dies/wafer DRAM $100 / GB y memory area per die [sq. μm] $10 / GB Desktop y memory density HDD 2 [bits per 4F ] $1 / GB Enterprise y patterning density HDD [sq. μm per 4F2] $0.10 / GB

$0.01 / GB 1990 1995 2000 2005 2010 2015 Chart courtesy of Dr. Chung Lam, IBM Research updated version Storage Class Memory: The Future of Solid State Storage 11 of plot from 2008 IBM Journal R&D article © 2009 Storage Networking Industry Association. All Rights Reserved. C-22 Candidate Device Technologies

Improved Flash FeRAM (Ferroelectric RAM) MRAM (Magnetic RAM) – Racetrack Memory RRAM (Resistive RAM) – Memristor CMOx (Conductive Metal Oxide) Solid Electrolyte Phase Change Memory

Memory technology remains an active focus area for the industry FLASH Solid FeRAM MRAM PCRAM RRAM Extension Electrolyte Trap Storage Ramtron IBM Ovonyx IBM Axon Saifun NROM Fujitsu Infineon BAE Sharp Infineon Tower STMicro Freescale Intel Unity Spansion TI Philips STMicro Spansion Infineon Toshiba STMicro Samsung Samsung Macronix Infineon HP Elpida Samsung Samsung NVE IBM Toshiba NEC Honeywell Macronix Spansion Hitachi Toshiba Infineon Macronix Rohm NEC Hitachi NEC HP Sony Philips Nano-x’tal Cypress Fujitsu 512Mb PCRAM Freescale Matsushita Renesas (Prototype) 0.1um 1.8V Matsushita Oki Samsung Hynix Hynix Celis TSMC Fujitsu Seiko Epson 4Mb MRAM (Product) 0.18um 3.3V 4Mb PCRAM (Product) 64Mb FeRAM (Prototype) Storage Class Memory: The Future of Solid State Storage 0.25um 3.3V 0.13um 3.3V © 2009 Storage Networking Industry Association. All Rights Reserved. 13 B-24 Candidate Device Technologies

Improved Flash FeRAM (Ferroelectric RAM) MRAM (Magnetic RAM) – Racetrack Memory RRAM (Resistive RAM) – Memristor CMOx (Conductive Metal Oxide) Solid Electrolyte Phase Change Memory

Flash – based on the metal-oxide-silicon (MOS) transistor with redesigned “floating gate” Voltage threshold (Vth) is shifted by the charge near the gate, enabling non- volatile memory function

Floating control gate Tunnel Gate e- e- Oxide

source drain

Tradeoff exists between scaling, speed, and endurance Designers are choosing to hold speed & endurance constant to continue scaling

Data-retention requirements limit the tunnel oxide thickness (≤ 7nm) Unacceptable interference between adjacent memory devices occurs when spacing between word lines shrinks to ≤ 40nm Recent advances in metal gates and high-k dielectric materials research (SONOS, TANOS) have provided improvements in erase and retention characteristics Silicon-oxide-nitride-oxide-silicon (SONOS) Tantalum-nitride-oxide-silicon (TANOS) With these advances NAND Flash will scale to at least the 22nm technology Technology: 40nm 30nm 20nm

oxide/nitride/oxide TaN oxide

Floating Gate SONOS TaNOS <40nm ??? Charge trapping Charge trapping in novel in SiN trap layer trap layer coupled with a metal-gate (TaN) Storage Class Memory: The Future of Solid State Storage 16 © 2009 Storage Networking Industry Association. All Rights Reserved. Candidate Device Technologies

Improved Flash…………...limited scalability/endurance FeRAM (Ferroelectric RAM) MRAM (Magnetic RAM) – Racetrack Memory RRAM (Resistive RAM) – Memristor CMOx (Conductive Metal Oxide) Solid Electrolyte Phase Change Memory

Storage Class Memory: The Future of Solid State Storage 17 © 2009 Storage Networking Industry Association. All Rights Reserved. B-27 FeRAM (Ferroelectric RAM) Saturation charge ferroelectric material Remanent such as + + + charge lead zirconate titanate + + + - - - Q (Pb(ZrxTi1-x)O) or PZT - - - s Qr metallic electrodes

VC select transistor -Qr Coercive -Qs voltage

• Ferroelectric capacitor formed by sandwiching Fe material between two metallic electrodes • To detect the state of the ferroelectric capacitor: • Apply voltage pulse to take the device to one extreme [Sheikholeslami:2000] of its hysteresis loop producing a current spike whose magnitude depends on the initial state (destructive read) • Readout voltage produced by the charging of the bitline capacitance by this current can be compared with a reference voltage Storage Class Memory: The Future of Solid State Storage 18 © 2009 Storage Networking Industry Association. All Rights Reserved. B-30 FeRAM (Ferroelectric RAM)

Lots of attention in 1998-2003 Successfully used in Playstation 2 (embedded memory) Initially – very strong candidate to be the next NVRAM due to its non-volatility plus DRAM characteristics Speed (as low as 20ns) Low power Low voltage operation Straightforward CMOS integration Problem – cell size does not scale Signal is directly proportional to cell size (scaling = reduced signal) More Problems – fatigue/insufficient remanent polarization, imprint, retention, high temp processing Most recent work addresses embedded memory applications

Improved Flash…………...limited scalability/endurance FeRAM (Ferroelectric RAM)……limited scalability MRAM (Magnetic RAM) – Racetrack Memory RRAM (Resistive RAM) – Memristor CMOx (Conductive Metal Oxide) Solid Electrolyte Phase Change Memory

Simple MTJ MTJ with (magnetic tunnel MTJ with pinned “synthetic Toggle junction) pinned layer antiferromagnet” MRAM

Tunneling current depends upon the relative magnetizations of the two magnetic layers. (TMR) Pin the magnetization of the bottom layer with Stabilize pinned layer with Prevent false switching antiferromagnetic layer. coupled layer pair. by replacing free layer with coupled layer pair.

[Gallagher:2006] • inherently fast write speed • straightforward placement above the silicon • very high endurance (no known wear-out mechanism) • write by passing current through two nearby wires

• Substantial progress made 2001 – 2004 • Commercially available as embedded memory

• BUT, write currents are very high – do not appear to scale well Æ electromigration even at 180nm node • Possible solutions • heat MTJ to reduce required current • use “spin-torque” effect Ærotate magnetization by passing current through the cell, but this causes a wear-out mechanism (thin tunneling layers)

• Alternative: store data in magnetic domain walls by building a magnetic racetrack in the third dimension

Improved Flash…………...limited scalability/endurance FeRAM (Ferroelectric RAM)…...limited scalability MRAM (Magnetic RAM)…………write current too high – Racetrack Memory RRAM (Resistive RAM) – Memristor CMOx (Conductive Metal Oxide) Solid Electrolyte Phase Change Memory

• Alternative to previous MRAM technologies presented • Data stored as pattern of magnetic domains in long nanowire or “racetrack” of magnetic material • Current pulses move domains along racetrack • Use deep trench to get many (10-100) bits per 4F2

a 3-D shift register DRAM Trench

Magnetic Race Track Memory Stuart Parkin (IBM) Storage Class Memory: The Future of Solid State Storage © 2009 Storage Networking Industry Association. All Rights Reserved. 24 B-41 Magnetic Racetrack Memory

• Need deep trench with notches to “pin” domains

• Need sensitive sensors to “read” presence of domains

• Must insure a moderate current pulse moves every domain one and only one notch

• Basic physics of current-induced domain motion being investigated

Promise (10-100 bits/F2) is enormous… - demonstrated 3 bits in 2003, 6 bits Dec08 - currently working on 10 bits

…but scientists are still working on a basic understanding of the physical phenomena

Improved Flash…………...limited scalability/endurance FeRAM (Ferroelectric RAM)…...limited scalability

MRAM (Magnetic RAM)………..write current too high – Racetrack Memory………….basic research, good potential RRAM (Resistive RAM) – Memristor CMOx (Conductive Metal Oxide) Solid Electrolyte Phase Change Memory

• Materials that can be switched between two distinct resistance states using suitable voltages • Numerous examples of materials showing hysteretic behavior in their I-V curves • Known for fast switching speeds (<50ns) and low program current (down to 10µa) • Problems: very poor endurance (600 cycles), poor retention (up to 8 months), high reset current • Mechanisms not completely understood, but major materials classes include: • metal nanoparticles in organics • could they survive high processing temperatures? • oxygen vacancies in transition-metal oxides • forming step sometimes required Chromium doped • scalability unknown strontium titanium oxide • no ideal combination yet found of [Karg:2008] • low switching current • high reliability & endurance • high ON/OFF resistance ratio • metallic filaments in solid electrolytes

Improved Flash…………...limited scalability FeRAM (Ferroelectric RAM)…...limited scalability

MRAM (Magnetic RAM)………..write current too high – Racetrack Memory………….basic research, good potential

RRAM (Resistive RAM)……………significant problems to resolve – Memristor CMOx (Conductive Metal Oxide) Solid Electrolyte Phase Change Memory

Memristance – property of electronic component 4th passive element after capacitors, inductors and resistors Resistance dependent upon direction of flow of charge When flow of charge is stopped the component “remembers” its resistance When flow of charge is started again, its resistance will be what it “remembered” Memristance gets stronger as components shrink in size Early in development

Improved Flash…………...limited scalability FeRAM (Ferroelectric RAM)…...limited scalability

MRAM (Magnetic RAM)………..write current too high – Racetrack Memory………….basic research, good potential

RRAM (Resistive RAM)……………significant problems to resolve

– Memristor……………………..early in development CMOx (Conductive Metal Oxide) Solid Electrolyte Phase Change Memory

Unity Semiconductor announced in May09 that it has developed CMOx World’s 1st R/W passive cross-point memory array Storage Class Memory based on switching effect in some metal oxide combinations Memory effect is based on the movement of ionic charge carriers Characteristics: Different from RRAM No transistor in memory cell Non-volatile Multi-layer memory Multi-level cell (MLC) Cell size of 0.5F2 4x the density and 10x the write speed of today’s NAND Flash Claim: Produced 64Kb for 2 years Produced 64Mb for 1 years Will produce 64Gb in volume 2Q2011

Source: www.unitysemi.com

Improved Flash…………...limited scalability FeRAM (Ferroelectric RAM)…...limited scalability

MRAM (Magnetic RAM)………..write current too high – Racetrack Memory………….basic research, good potential

RRAM (Resistive RAM)……………significant problems to resolve

– Memristor……………………..early in development

CMOx (Conductive Metal Oxide)…still a lot of work left to do Solid Electrolyte Phase Change Memory

Storage Class Memory: The Future of Solid State Storage 33 © 2009 Storage Networking Industry Association. All Rights Reserved. B-27 Solid Electolyte ON Create high resistance contrast by state forming a metallic filament through insulator sandwiched OFF between an inert cathode and an state oxidizable anode. Cathode Metal Filament Insulator [Kozicki:2005] Anode Applying a small voltage at the anode reduces metal ions at the cathode and injects ions into the Advantages • Program/erase at very low currents electrolyte by means of oxidation • High speed (1us) at the anode. • Good endurance demonstrated Electrodeposited filament grows • Integrated cells demonstrated out of cathode until it contacts Issues anode causing abrupt voltage • Retention drop. • Sensitivity to processing temperatures Reverse bias reverses process. • Fab-unfriendly materials (Ag) Storage Class Memory: The Future of Solid State Storage 34 © 2009 Storage Networking Industry Association. All Rights Reserved. Candidate Device Technologies

Improved Flash…………...limited scalability/endurance FeRAM (Ferroelectric RAM)…...limited scalability

MRAM (Magnetic RAM)………..write current too high – Racetrack Memory………….basic research, good potential

RRAM (Resistive RAM)……………significant problems to resolve

– Memristor……………………..early in development

CMOx (Conductive Metal Oxide)…still a lot of work left to do Solid Electrolyte…………..in development, promising Phase Change Memory

PCM “programmable resistor”

Word Access device -line (transistor, diode)

Potential headache: High power/current “RESET” pulse Æ affects scaling! Voltage Tmelt temperature

Tcryst Potential headache: “SET” If crystallization is slow pulse Æ affects performance! time

We want a material that… Ge - Germanium …retains data at moderate temperature… Sb - Antimony Te – Tellurium GST – Ge-Sb-Te

yet switches rapidly at high temperature.

[Chen:2006]

amorphous Tcryst crystalline state state “SET” pulse

temperature time

S. Lai, Intel, IEDM 2003. heater wire access device

“Mushroom” cell

“SET” state LOW resistance “RESET” state HIGH resistance

Heat to & quench melting... rapidly

amorphous Tcryst crystalline state state “SET” pulse

temperature time

S. Lai, Intel, IEDM 2003. heater wire access device

V “SET” state th LOW resistance “RESET” state HIGH resistance Hold at slightly under Filament Field-induced melting during broadens, electrical recrystallization then breakdown heats up starts at Vth Storage Class Memory: The Future of Solid State Storage 39 © 2009 Storage Networking Industry Association. All Rights Reserved. C-6 How a phase change cell works “RESET” pulse Tmelt

amorphous Tcryst crystalline state state “SET” pulse

temperature time

S. Lai, Intel, IEDM 2003. heater wire access device

“SET” state LOW resistance “RESET” state HIGH resistance Issues for Phase Change Memory • Keeping the RESET current low • Multi-level cells (for >1bit / cell) • Is the technology scalable?

Basic requirements 9 widely separated SET and RESET resistance distributions 9 switching with accessible electrical pulses 9 the ability to read/sense the resistance states without perturbing them 9 high write endurance (many switching cycles between SET and RESET) 9 long data retention (“10-year data lifetime” at some elevated temperature) Æ avoid unintended re-crystallization 9 fast SET speed 9 MLC capability – more than one bit per cell

Phase Change Nano-Bridge ¾ Invented in Dec 2006 ¾ memory device with ultra-thin films (3nm) ¾ works at the 22nm node ¾ fast SET (<100ns) ¾ low RESET current (<100µa)

Scaling outlook appears to be “good” for PC-RAM By adding two bits per cell, Intel and ST Microelectronics have put phase-change memory on par with today’s flash technology, says H.-S. Philip Wong, professor of electrical engineering at Stanford University. Intel has already mastered a similar trick with flash. Phase-change memory has made a lot of progress in the past few years, Wong adds. “A few years ago it looked promising,” he says, “But now it’s going to happen. There’s no doubt about it.” February 4, 2008 [http://www.technologyreview.com/Infotech/20148/] Samsung and Numonyx announced in June09 that they have joined forces on PCM and will develop common specifications to be completed this year. Numonyx has PCM chip facility in Agrate Brianza, Italy Began shipping 128Mb chips in Dec08 Will ship 1Gb chips this year PCM revenues estimated @ $500M in 2013 June 24, 2009 [http://www.eetimes.com] Focus now on novel IP, implementation, and cost reduction

Improved Flash…………...limited scalability/endurance FeRAM (Ferroelectric RAM)…...limited scalability

MRAM (Magnetic RAM)………..write current too high – Racetrack Memory………….basic research, good potential

RRAM (Resistive RAM)……………significant problems to resolve

– Memristor……………………..early in development

CMOx (Conductive Metal Oxide)…still a lot of work left to do Solid Electrolyte…………..in development, promising Phase Change Memory….it’s going to happen

Improved Flash FeRAM MRAM Racetrack advanced basic Knowledge level product product development research Smallest demonstrated 2 2 2 4F 15F 25F — cell (1F2 per bit) (@130nm) @180nm Prospects maybe poor poor unknown for… (enough stored (integration, (high currents) (too early to know, good potential) …scalability charge?) signal loss)

…fast readout yes yes yes yes

…fast writing NO yes yes yes

…low switching yes yes NO uncertain Power …high poor yes yes should endurance (1e7 cycles)

…non-volatility yes yes yes unknown

…MLC operation yes difficult NO yes (3-D)

Solid RRAM Memristor CMOx Electrolyte PCRAM Early Early Early advanced Knowledge level development development development development development

2 5.8F2 (diode) Smallest 0.5F2 8F —— 2 demonstrated cell @90nm 12F (BJT) (4F2 per bit) @90nm Prospects unknown unknown promising promising promising for… (filament-based, (rapid progress to …scalability but new materials) date) …fast readout yes yes yes yes yes

…fast writing sometimes sometimes yes yes yes …low switching sometimes sometimes yes yes poor Power …high poor poor unknown unknown yes endurance …non-volatility sometimes sometimes yes sometimes yes

…MLC operation yes yes yes yes yes

One or more of these technologies will successfully be introduced within the next 5 years or so, bringing us lower costs and higher performance

NAND Flash still has a lot of life left and will serve the storage industry well

Most likely technologies to replace NAND Flash (in order): 1. Phase Change Memory 2. Solid Electrolyte 3. Racetrack Memory 4. Memristor

Please send any questions or comments on this presentation to SNIA: [email protected]

Many thanks to the following individuals for their contributions to this tutorial. - SNIA Education Committee

Dr. Winfried W. Wilcke Geoffrey W. Burr Bulent Kurdi Dr. Richard Freitas Phillip R. Mills