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Fastboot BIOS Embedded and Communications Group an Investigation of BIOS Speed Enhancement Featuring the Intel® Atom™ Processor

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Fastboot BIOS Embedded and Communications Group an Investigation of BIOS Speed Enhancement Featuring the Intel® Atom™ Processor White Paper Intel Corporation Fastboot BIOS Embedded and Communications Group An Investigation of BIOS Speed Enhancement Featuring the Intel® Atom™ Processor Abstract: In order to meet the needs of today’s embedded customers, faster BIOS boot times are required. This paper documents the investigation/POC involving enabling a sub 2-second EFI BIOS boot time on embedded platforms featuring the Intel® Atom™ processor. This document discusses background, methods, data gathered, and next steps. Mike Kartoz, Pete Dice, and Gabe Hattaway, Intel Corporation Data Measurements coordinated by Wade Zehr, Intel Corporation September 2008 Document number 320497 Fastboot BIOS Contents Background ......................................................................................................... 2 Proof of Concept................................................................................................... 3 Data Collected................................................................................................................. 3 1. Initial Configuration ................................................................................................... 4 2. Turn Off Debugging.................................................................................................... 4 3. Decrease Flash Size ................................................................................................... 4 4. Caching of PEI Phase................................................................................................. 5 5. Intel SpeedStep® Technology Enabled Early.................................................................. 5 6. BDS Optimization...................................................................................................... 5 7. Platform Memory Speed............................................................................................. 5 8. Remove PS/2 Keyboard/Mouse ................................................................................... 5 9. Remove BIOS Setup.................................................................................................. 6 10. Remove Video Option ROM ....................................................................................... 6 11. Remove BIOS USB Support ...................................................................................... 6 Discussion of Results........................................................................................................ 6 Next Steps......................................................................................................................6 Conclusion........................................................................................................... 7 Reference Documents ........................................................................................... 7 Authors and Acronyms .......................................................................................... 9 Background This document provides guidance on optimizing the boot flow for UEFI-compliant firmware and expands on ideas introduced in an Intel developer forum course of the same name. Although the document is tailored toward embedded markets, many of the concepts discussed are relevant to all Intel Corporation Markets that have a BIOS. Any platform can be a UEFI compliant device when UEFI-defined interfaces are exposed per HW feature. UEFI does not require PC features. Developers can use defined UEFI APIs to abstract standard subsystem, or create Platform Initialization Specification compliant drivers for non- standard buses and devices. There is a stark contrast between embedded devices and standard PCs. – An embedded device is a normally closed box system which does a specific function well. In embedded devices, there are often no expansion slots, proprietary operating systems, and a limited number of applications. The use case is singular: turn it on and use it. – The standard PC is the definitive open box system, providing broadest possible solution. With multiple standard interfaces, host mainstream OS, and numerous applications, the PC BIOS has been designed to enable all components on the system, scan every interface, and be ready to run multiple applications simultaneously. Embedded devices have unique requirements which challenge one size fits all PC BIOS solutions, but the UEFI Frameworks can provide flexible solutions whose behaviors can be differentiated for embedded production solutions. That flexibility creates innovation opportunities for OEM, software vendors, system integrators, and end-users in the embedded space. Specifically in regards to firmware, embedded market customers have come to expect a very light weight firmware solution and very rapid firmware boot time on their processor architectures. The typical UEFI BIOS, on the other hand, has a boot time on the order of 15 to 45 seconds. Intel Corporation BIOS solutions have traditionally focused on meeting all customer needs with one solution. The Intel® Atom™ processor was used as the starting point since it is a revolutionary new piece of silicon but the Fastboot BIOS can be adapted to other platforms as well. Intel’s attempt to enter 2 Document number 320497 Fastboot BIOS new markets with this platform warranted the need for new software to meet customer needs. With the Fastboot, we have attempted to provide speed, reliability, and full functionality. This paper attempts to address how these results were achieved and how the results can be reproduced. It shows modules that were removed and the amount of time that each one saves from the boot sequence. It also provides some of the optimizations that were implemented in order to achieve that time. We hope that it is useful to those that would attempt to reproduce the same results. From a marketing standpoint, it also allows embedded customers to make an easier transition from a non-IA system architecture to an IA-based system since it meets more of the market demand for boot speed. It also enables BIOS vendors to support customer requirements for faster BIOS boot times. Proof of Concept Note that this paper assumes that the reader is already familiar with UEFI compliant BIOS terminology and concepts. See the list of references for further details on UEFI. Boot time is defined, in this paper, as the time between the CPU reset vector and transfer of control to the OS bootloader. This implies that the first sector of the bootloader has already been fetched into memory. It further implies that no additional sectors of the bootloader have been loaded nor has any portion of the actual OS kernel been loaded. During this investigation, early changes in boot time were measured using a wall clock. As boot time decreased, using the wall clock quickly became inadequate in getting the precision necessary. Another mechanism used during early investigation was the Intel Processor Time Stamp Counter (TSC). The TSC was good for early work to get a general idea of how much relative time each portion of the BIOS was taking. However, the TSC varies in speed depending on processor configurations such as Intel SpeedStep® technology and turbo mode. Later effort centered on the use of hardware based measuring techniques. There are add-in cards that can be used for this purpose but our team opted to use a logic analyzer connected into the postcode display hardware present on the Crown Beach board in conjunction with additional calls to I/O port 0x80 added to the code. Specifically, a post code was added at the point at which the BIOS hands off control to the first sector of the Operating System bootloader. During early investigation, the TSC was added onto all of the framework BIOS serial print messages. While the use of these serial print messages takes quite a bit of time in itself, looking for larger time gaps was quite effective in tracking down areas that were taking a longer time to execute. Additional serial print messages were added to further narrow these down. Data Collected Table 1 depicts the results of the boot time investigation, followed by in-depth discussion of each change. Table 1. Boot Time Results Change Boot Time Incremental boot time Discussion (in sec) improvement (in sec) Paragraph Initial Configuration 11.66 - 1 Turn off debugging 8.39 3.27 2 Decrease flash size 8.18 0.21 3 Caching of PEI phase 7.91 0.27 4 3 Document number 320497 Fastboot BIOS Change Boot Time Incremental boot time Discussion (in sec) improvement (in sec) Paragraph Intel SpeedStep® technology 7.82 0.09 5 enabled early BDS Optimization (boot devices) 7.53 0.29 6 Platform memory speed 7.43 0.10 7 Remove PS/2 Keyboard/Mouse 7.36 0.07 8 Remove BIOS setup 5.43 1.93 9 Remove video Option ROM 3.33 2.10 10 Remove BIOS USB support 1.65 1.68 11 1. Initial Configuration Measurements were taken starting from a configuration based on the original AMI Aptio Intel® Atom™ processor BIOS leveraged from UMG. In its original configuration, the boot time was 12 seconds. This was done on a Fab F UMG Intel® Atom™ Processor Z5XX Series and Intel® System Controller Hub US15W Development Kit board with stepping D1 of Intel® System Controller Hub US15W chipset, C0 of Intel® Atom™ Processor Z530/Z510, 2MB ST flash part, and 512MB memory module running at 400MHz. 2. Turn Off Debugging “Turning off” debugging removes the serial debugging information and turns on C Compiler optimizations. Because Framework BIOS is almost entirely written in C instead of previous BIOS which was written in assembly language, enabling compiler optimizations
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