The Pennsylvania State University

The Graduate School

College of Engineering

PROCESSING OF SAPPHIRE SURFACES FOR

SEMICONDUCTOR DEVICE APPLICTIONS

A Thesis in

Electrical Engineering

Kevin W. Kirby

Submitted in Partial Fulfillment of the Requirements for the Degree of

Master of Science

May 2008 The thesis of Kevin W. Kirby was reviewed and approved* by the following:

Jerzy Ruzyllo Professor of Electrical Engineering Thesis Adviser

John D. Mitchell Professor of Electrical Engineering

W. Kenneth Jenkins Professor of Electrical Engineering Head of the Department of Electrical Engineering

*Signatures are on file in the Graduate School.

ii ABSTRACT

This thesis explores the preparation of sapphire surfaces for use in semiconductor device applications. Sapphire has shown promise in a few niche applications as a device substrate due to its insulating nature and extremely stable behavior. These properties make sapphire a suitable alternative for applications where standard silicon substrates provide inadequate performance. As the technology behind the applications involving sapphire substrates has improved, sapphire substrate surface preparation has become more of a concern.

In an effort to further the development of sapphire surface processing, wet chemical cleaning treatments were explored during this study. Chemistries common to the industry were chosen including Standard Clean 1 (SC1), Standard Clean 2 (SC2), hydrofluoric acid (HF), and a 3:1 mixture of sulfuric acid (H2SO4) and phosphoric acid (H3PO4).

Chemical treatments were analyzed by means of wetting angle measurements, AFM analyses, and XPS surveys. Several alkali metals and other contaminants were shown to be present on the surface of the samples tested along with a significant amount of carbon, implying organic contamination. Several treatments caused a change in surface morphology, but many treatments did not affect surface composition. Most noticeably,

SC1 appeared to be an effective treatment for organic contamination on sapphire surfaces. Ultimately, these treatments could prove to be an integral part of an effective sapphire surface cleaning sequence, and these treatments should be explored in more detail.

iii TABLE OF CONTENTS

LIST OF TABLES...... vi LIST OF FIGURES ...... vii ACKNOWLEDGEMENTS...... ix 1. INTRODUCTION ...... 1 2. BACKGROUND ...... 3 2.1. Sapphire Material Properties ...... 3 2.1.1. Sapphire Crystal Structure...... 3 2.1.2. Notable Mechanical and Electrical Properties ...... 4 2.1.3. Diffusion Behavior of Various Elements in Sapphire...... 6 2.2. Applications for Sapphire in Semiconductor Electronics...... 9 2.2.1. Silicon on Sapphire (SOS) Technology ...... 9 2.2.2. Fabrication of SOS wafers...... 15 2.2.3. RF Applications for SOS Technology...... 20 2.2.4. Other Applications for SOS Technology ...... 21 2.3. Applications for Sapphire in Semiconductor Photonics...... 23 2.3.1. Epitaxial Deposition of GaN on a Sapphire Substrate ...... 23 2.3.2. GaN Based Optoelctronic Devices...... 28 2.3.3. ZnO Based Optoelectronic Devices ...... 29 2.4. Current Methods for Sapphire Wafer Cleaning and Surface Processing...... 31 2.4.1. Wet Chemical Treatments ...... 31 2.4.2. Dry Chemical Treatments...... 35 2.4.3. Mechanical Polishing ...... 37

3. OBJECTIVES OF THIS STUDY...... 40 4. EXPERIMENTAL PROCEDURES...... 41 4.1. Chemical Treatments ...... 41 iv 4.2. Measurement Techniques ...... 42 5. EXPERIMENTAL RESULTS AND DISCUSSION ...... 45 5.1. Wetting Angle Measurements ...... 45 5.2. Surface Roughness Measurements ...... 48 5.3. Atomic Composition Analysis...... 54 6. SUMMARY...... 61 7. REFERENCES ...... 63

v LIST OF TABLES

Table 1. A selection of important electrical and mechanical properties of sapphire...... 7 Table 2. TXRF results from two separate sources (a) and (b). Particle concentrations are given in terms of the atoms/cm2 count...... 55 Table 3. Atomic percentage of various elements on the sapphire surface following treatment...... 57

vi LIST OF FIGURES

Figure 1. A graphical representation of the sapphire crystal orientations most commonly used for semiconductor applications. Source: http://americas.kyocera.com/kicc/industrial/crystal.html...... 5 Figure 2. Arrhenius plots for bulk diffusion in sapphire for Pt, Ag, Ga, Y, Cu, Co, Fe, and Cr...... 10 Figure 3. A schematic comparison of (a) a SOS device and (b) a bulk silicon device. The potential for complete isolation and lack of doped well structures in SOS devices allow for the creation of more compact and efficient devices. Source: Reference 20...... 12 Figure 4. A graphical depiction of the “kink” effect observed in SOI devices. Source: D. Neamen, “An Introduction to Semiconductor Devices,” New York: McGraw-Hill Higher Education, 2006...... 14 Figure 5. A representation of the (a) r-plane crystal orientation and the (b) lattice mismatch between r-plane sapphire and <100> silicon. Source: Reference 20...... 17 Figure 6. A process flow diagram for Solid Phase Epitaxial Regrowth (SPER). Source: Reference 20...... 19 Figure 7. An illustration of the epitaxial relationship between sapphire and GaN for various crystallographic orientations. Source: Reference 45...... 25 Figure 8. Visual evidence of single crystal GaN island formation on GaN nucleation layers. Source: Reference 47...... 27 Figure 9. Representation of the <0001> sapphire orientation and lattice sites that promote an epitaxial relationship with ZnO. Source: Reference 57...... 30 Figure 10. The etch rate vs. temperature for various chemical etchants of sapphire. Source: Reference 63...... 33 Figure 11. The etch rate and etch selectivity as a function of plasma inductive power at a DC bias of -600V. Source: Reference 77...... 38 Figure 12. Wetting angle of sapphire samples (a) treated with various chemicals for a period of 10 minutes and (b) treated with HF for varying lengths of time...... 47 Figure 13. Wetting angle over time for samples treated with HF for varying lengths of time...... 49 Figure 14. RMS roughness of wafer samples treated with various combinations of SC1, SC2, and (a) HF or (b) 3:1 H2SO4:H3PO4...... 50

vii Figure 15. AFM Images of the sapphire surface after (a) no treatment, (b) treatment with HF, (c) treatment with SC1, (d) treatment with H2SO4:H3PO4...... 52 Figure 16. Counts per second versus binding energy for XPS scans of samples treated with (a) no treatment; (b) spiked SC1; (c) spiked SC1 and a sulfuric/phosphoric clean; (d) Spiked SC1 and a SC2 clean; (e) Spiked SC1, a sulfuric phosphoric clean, and SC2 clean...... 60

viii ACKNOWLEDGEMENTS

We would like to acknowledge RSA le Rubis in Grenoble France for supplying the sapphire wafers for these experiments. Additionally, we would like to thank Vince Bojan and his group at the Penn State Materials Characterization Lab for their help with some of the testing and analysis presented in this report. The author would also like to thank his thesis advisor, Dr. Jerzy Ruzyllo, for his support and guidance as well as his colleague,

Karthikeyan Shanmugasundaram, for his assistance throughout the course of this research project.

ix 1. INTRODUCTION

Sapphire is an important material used in semiconductor device technology. It is a common choice as a device substrate in a few niche applications where the traditional workhorse of the industry, silicon, is not appropriate. Sapphire substrates offer several benefits over their silicon counterparts and are ideal for these particular applications in part due to their insulating nature and highly stable behavior. Sapphire is also naturally radiation-hardened making it an excellent choice for space and military applications.

Sapphire wafer technology is not as developed as silicon technology, but sapphire substrates provide for enough of a performance benefit that they have found some commercial success in the areas of RF technology and optoelectronic applications.

Despite the importance and number of uses for sapphire substrates, the chemical cleaning and surface preparation of sapphire substrates has not been explored in the same level of detail, or in the same context, that silicon wafer cleaning has in the past. Silicon wafer cleaning is an industry unto itself and well-documented, effective cleaning techniques exist for a variety of situations. Several technical limitations dealing with the compatibility of sapphire substrates and other materials used during processing have made the quality and purity of sapphire surfaces less of a concern. However, as technology improves and these limitations are surpassed, it will become increasingly important to create sapphire wafers that are both atomically smooth and free of all particle contamination and other impurities.

1 This project intends to explore the cleaning of sapphire substrates in the same frame of reference as silicon substrate cleaning, particularly in the area of wet chemical cleaning where the least amount of work is found. Chapter 2 details all relevant background information including notable material properties that distinguish sapphire from other materials, applications for sapphire substrates in the electronics device industry, applications for sapphire substrates in the photonics device industry, and a review of the state of the art in sapphire surface cleaning. Chapter 3 further defines the scope and objectives of this study. Chapter 4 gives detail of all experimental procedures used to obtain the data presented in Chapter 5 of this report. Chapter 5 also discusses the relevance of the data collected and any conclusions that can be drawn from the experiments conducted for this report. A summary of this thesis can be found in Chapter

2 2. BACKGROUND

Sapphire in both its natural and synthetic forms has been a well-known and heavily used material for a long time. It can be described as a very resilient material, both chemically and mechanically, which makes it useful for a variety of applications. In the semiconductor community, sapphire has been explored as an electronic device substrate, and a few important niche applications for sapphire substrates have become commercially viable. As interest in sapphire as a commercially viable electronic device substrate has increased, so to has interest in sapphire surface preparation. While some work in this area has been preformed, there is still room for more understanding, particularly in the area of wet chemical cleaning.

2.1. Sapphire Material Properties

As previously mentioned, sapphire is a very resilient material. More specifically it is an excellent electrical insulator that is both physically and chemically stable, even under harsh conditions. Material properties of particular note are sapphire’s crystal structure, measures of its mechanical and electrical capabilities, as well as the relative resistance to the diffusion of impurities through its crystal lattice.

2.1.1. Sapphire Crystal Structure

Sapphire is one of the varieties of the mineral corundum, a crystalline form of alumina

(aluminum oxide - Al2O3). In nature, sapphire occurs as the result of iron and titanium substitutions in the crystal lattice, usually resulting in a bluish color. The other common

3 variety of corundum is ruby, which results from chromium impurities in the crystal lattice. Its natural color is red. Pure forms of corundum are transparent and colorless.

The sapphire crystal has trigonal symmetry, and in particular belongs to the crystal point group 3 m. The three-fold axis (0001) is designated as the c-axis, and many of the sapphire substrates used in the semiconductor community are oriented along this direction.€ The two-fold symmetry axes, both perpendicular to the c-axis, are designated the a-axis and m-axis1. The most common crystallographic orientations for semiconductor applications include the a-plane, c-plane, and r-plane. A representation of these planes is included in Figure 1.

Sapphire crystals can be created synthetically using one of several crystal growth techniques including the Verneuil process, the Czochralski method, Edge-defined film- fed growth, the heat exchanger method, and gradient solidification. An in-depth review of the history of synthetic sapphire crystal growth, along with a description of each of the previously mentioned growth techniques, is provided in reference 1. Synthetic sapphire production was commercially developed extensively over the course of the 20th century and is currently a large industry.

2.1.2. Notable Mechanical and Electrical Properties

Sapphire is notable as a very stable material, both mechanically and thermally.

Sapphire has a hardness of 9 on the Mohs scale, making it second only to diamond in that regard. It is also chemically stable up to its melting point of 2050°C1. The thermal expansion coefficient of sapphire varies with crystal orientation from 5.4-6.6 10-6/K2.

Figure 1. A graphical representation of the sapphire crystal orientations most commonly used for semiconductor applications. Source: http://americas.kyocera.com/kicc/industrial/crystal.html.

5 Sapphire is one of only few materials to exhibit characteristics this strong while being visually transparent.

Sapphire is also an excellent electrical insulator, making it ideal for various electrical applications. The dielectric constant of sapphire is 9.39 and its resistivity is 1014 Ω-cm,

3 making it a superior insulator to SiO2 . Sapphire’s band gap energy is 8.7 eV, a value that

4 is also much higher than the band gap of SiO2 . Additionally, sapphire exhibits excellent radiation hardness that allows for the creation of electrical devices with minimal performance degradation during radiation exposure. All notable sapphire material properties are summarized in Table 1.

2.1.3. Diffusion Behavior of Various Elements in Sapphire

One of the important characteristics of sapphire, as it relates to semiconductor applications, is the behavior of sapphire as it interacts with contaminants in the processing environment. One of the simplest measurements of a contaminant’s potential to cause problems during a process is its ability to diffuse into the materials used during that process. As such, the diffusion behavior of various elements in alumina is of chief concern. In addition, it is important to contrast this behavior with the behavior of other materials that may be subsequently added to the sapphire base.

It is difficult to find comprehensive information regarding the diffusion behavior of elements in alumina. Experimental diffusion coefficients defined by the classical

Arrhenius relationship for some elements have been reported, but the data is limited and scattered. An in-depth review of the available data has been published by Doremus5.

Explanations for the various types of diffusions mechanisms in sapphire are similarly

Table 1. A selection of important electrical and mechanical properties of sapphire

Material Property Value

Mechanical Hardness 9 Mohs

Melting Point 2050 °C

Dielectric Constant 9.39

Resistivity 1014 Ω-cm

Thermal Expansion Coefficient 5.4-6.6 10-6/K

Band Gap Energy 8.7 eV

7 scattered, and a universally accepted theory for diffusion in alumina is not currently known.

The diffusion coefficients for silver and platinum were determined in the same study using the Secondary Ion Mass Spectroscopy (SIMS) technique6. The data was collected over the range of 800–1150°C for silver and 900–1200°C for platinum. All data pertains to bulk diffusion in alumina samples oriented in the c-plane direction. In both cases, the data implies a combination of interstitial and substitutional mechanisms.

The bulk diffusion coefficient for gallium in alumina has also been reported7. The data was again determined using the SIMS technique in the range between 1400 °C and 1600

°C. While the data is limited to only a few samples, the trend indicates a relatively severe dependence on temperature. No diffusion mechanism has been proposed.

Yttrium has been studied as a dopant of alumina8, and as such the diffusion coefficient for yttrium in alumina has been explored as well9. Data has been experimentally determined by the SIMS technique for temperatures between 1150 °C and 1500 °C.

Yttrium diffusion properties are very similar to that of chromium, and it has been proposed that they share the same diffusion mechanism.

A SIMS study of copper diffusion in alumina has also been preformed10. Data is available over the range of temperatures between 800 °C and 1100 °C. An interstitial- substitutional interchange mechanism has been proposed. A similar study has been conducted for cobalt over the temperature range from 1000 °C to 1600 °C11. No diffusion mechanism has been proposed at this time.

8 Iron and chromium diffusion in alumina are also well studied. Diffusion coefficients for these elements have been determined by the radiotracer technique in the range between 1200 °C to 1700 °C12. As mentioned earlier, chromium and yttrium share similar diffusion properties.

All available diffusion coefficients are summarized in Figure 2. In all comparable cases, the diffusion coefficient for an element in alumina is several orders of magnitude lower than the value for that same element in silicon13. The difference is most severe for elements that are known to diffuse in silicon through an interstitial mechanism such as iron or copper. In these cases, the difference in diffusion coefficient can be up to 10 orders of magnitude depending on temperature.

2.2. Applications for Sapphire in Semiconductor Electronics

In the semiconductor industry, synthetic alumina is often used as a substrate for integrated circuits and other semiconductor devices. These substrates are often referred to as sapphire, despite the fact that they are generally free of the impurities that distinguish natural sapphire from other forms of the mineral corundum. Sapphire substrates provide several benefits over the most common semiconductor device substrate: silicon. For this reason it has found a few niche applications, particularly in the area of RF devices.

2.2.1. Silicon on Sapphire (SOS) Technology

Sapphire is an electrical insulator, and thus, it is not a suitable material for use in the production of active devices. It is however possible to deposit semiconductor materials on top of a sapphire surface while taking advantage of its insulating nature. In the most 9

Figure 2. Arrhenius plots for bulk diffusion in sapphire for Pt6, Ag6, Ga7, Y9, Cu10, Co11, Fe12, and Cr12.

10 common application, silicon is deposited on sapphire in order to create a Silicon on

Insulator (SOI) device structure. This particular structure is referred to as Silicon on

Sapphire (SOS).

In CMOS applications, SOI technology offers several advantages over traditional bulk silicon devices. Individual devices can be physically separated on an insulating substrate drastically improving device isolation, while eliminating the need for extraneous doped well regions or isolation trenches. The vertical isolation provided by the insulating base also eliminates the possibility of latch-up between adjacent devices14. This results in a simplified circuit structure with a higher packing density. These differences are schematically compared in Figure 3.

SOI technology can also greatly improve device performance. The source and drain regions of a MOSFET will extend to the insulating substrate, greatly reducing the junction surface area, and in turn, reducing junction leakage current and junction capacitance. This will improve device speed, lower power dissipation, and reduce the impact of short channel effects. Ultimately, SOI CMOS shows a 30% performance increase over bulk CMOS of the same technological generation when operating at similar voltages and shows a 300% performance increase when operating at similar low-power conditions14. In general, it is expected that a previous generation SOI device will compare favorably to a current generation bulk silicon device.

SOS technology provides all the benefits of SOI technology in addition to a few other significant advantages. Sapphire is inherently radiation-hardened, making SOS CMOS great for space or military applications. Sapphire has a relatively high thermal

Figure 3. A schematic comparison of (a) a SOS device and (b) a bulk silicon device. The potential for complete isolation and lack of doped well structures in SOS devices allow for the creation of more compact and efficient devices. Source: Reference 20.

12 conductivity of 0.46 W/cm-K. This is much higher than the thermal conductivity of silicon dioxide (0.014 W/cm-K), the other common insulator used in SOI applications3.

This helps to reduce self-heating effects and leads to a cooler operating temperature.

Sapphire is also a better electrical insulator than silicon dioxide with a higher resistivity and band gap as previously mentioned. SOI wafers with silicon dioxide tend to have a thin layer of buried oxide acting as the insulating barrier. By contrast the entire bulk of an SOS wafer is an insulator giving an SOS wafer a comparatively infinite dimension. This eliminates the possibility of any non-ideal leakage through the oxide.

In SOI devices the body of a CMOS transistor is floating. At high drain voltages, impact ionization can occur leading to an increase in the substrate potential. This effectively reduces the threshold voltage of the device and leaves a “kink” in the current- voltage response when the drain voltage reaches a certain threshold. SOS schemes reduce this effect leading to a reduction in the magnitude of this kink effect, and an increase in the drain voltage that will trigger this effect15. In short, a more ideal response can be achieved over a wider range of operating conditions. A graphical representation of this kink effect is shown in Figure 4.

SOS technology is not without its limitations. Fabrication of SOS wafers is more complex and more costly than fabrication of silicon wafers. The heteroepitaxial deposition of silicon on sapphire can result in silicon layers with a high number of crystalline defects. The number and severity of these defects has been shown to directly impact device performance16.

Figure 4. A graphical depiction of the “kink” effect observed in SOI devices. Source: D. Neamen, “An Introduction to Semiconductor Devices,” New York: McGraw-Hill Higher Education, 2006.

14 However, as technology improves it is possible to create epitaxial layers of silicon that are both thinner and contain fewer crystalline defects. This provides additional benefits for devices created in these layers. If the silicon layer is thin enough, devices will experience significant strain, which results in an increase of the device’s hole mobility and a decrease in electron mobility17. Matching hole mobility to electron mobility is important when creating complementary MOS device structures. Thinner silicon layers also exhibit a higher source-drain breakdown voltage and reduced parasitic bipolar gain as a result of a lower minority carrier lifetime around 1 ns3.

In general, SOS technology offers significant performance improvements over standard bulk silicon technology, but the process of creating SOS wafers is more costly and as a result less developed than bulk silicon manufacturing. One can expect to be using SOS wafers that are smaller than state of the art silicon substrates, as well as using device geometry specifications that are older than the most current generation provides.

However, the performance of these SOS devices should be comparable to the state of the art bulk silicon devices, and in applications like RF technology the benefits afforded by the sapphire substrate can actually make it a preferable approach.

2.2.2. Fabrication of SOS wafers

Due to the limitations and complexity of SOS wafers mentioned above, SOS wafer fabrication has been well studied and well documented. In many ways, the fabrication of

SOS device substrates requires the same amount of attention as the many steps that would follow for creation of SOS based devices.

15 Interest in SOS technology began in the 1960’s as it was discovered that crystalline silicon could be epitaxially deposited on sapphire substrates18. Initially a hydrogen gas reduction of SiC14 at high temperatures was used to deposit silicon on the surface of a sapphire substrate. It was immediately clear that an epitaxial relationship existed between the dimension of a sapphire substrate and the deposited silicon.

The most common method for depositing epitaxial silicon on sapphire is currently some form of Chemical Vapor Deposition (CVD). Various techniques can be employed to deposit a layer with a minimal amount of defects. For example, it has been demonstrated that a hydrogenation process can improve the quality of the subsequently deposited silicon layer19. Despite these efforts, it is difficult to directly deposit silicon on sapphire and obtain a silicon surface suitable for the most demanding applications without further treatments.

The crystalline structure of R-plane oriented sapphire closely matches that of <100> oriented silicon, but there is still a lattice mismatch of up to 12.5% along a single dimension20. This mismatch is pictured with the r-plane of sapphire in Figure 5.

In part because of the lattice mismatch between silicon and sapphire, and in part because of high thermal stresses associated with cooling the SOS structure, the sapphire- silicon interface contains several crystalline dislocations21. As the thickness of the epitaxial layer increases, the defect density tends to decrease. This in turn requires epitaxial layers of silicon with a thickness in excess of 500 nm to minimize crystalline defects and ensure reliable device performance22.

Figure 5. A representation of the (a) r-plane crystal orientation and the (b) lattice mismatch between r-plane sapphire and <100> silicon. Source: Reference 20.

17 Thinner silicon layers are preferred as CMOS device dimensions shrink. As device dimensions shrink relative to the epitaxial layer thickness, the benefits gained from insulating substrates are reduced and the deposited layer tends to behave more like a bulk device. In order to accommodate the increasingly restrictive device dimensions imposed by improved CMOS technology, it became necessary to decrease the thickness of the epitaxially deposited layers below 500 nm.

It has been shown that the number of crystalline defects can be significantly reduced through a process known as solid-phase epitaxial regrowth (SPER)23. In this process, an amorphous layer of silicon is created near the sapphire-silicon interface through a series of silicon implants that immediately follow the epitaxial deposition. The structure is then subject to a series of anneals at a temperature less then 600 °C. The remaining crystal layer acts as a template allowing the buried amorphous layer to recrystallize form the top down. At this point a fairly uniform crystal layer is present with a minimal amount of crystal dislocations. The silicon layer can then be thinned to the desired dimension. The process is summarized in Figure 6. It has been shown that this process can result in a fourfold decrease in the strain of the deposited silicon layer, creating an epitaxial layer with a much smaller defect density24.

Further study has shown that applications of the SPER process involving a rapid thermal anneal will maintain important device characteristics. In particular, the resistivity

(104 – 105 Ω-cm) of the initially deposited epitaxial layers is preserved when a rapid thermal treatment is used in lieu of a traditional furnace anneal25. The resistivity is maintained even if the rapid thermal anneal is followed by other prolonged furnace treatments. 18

Figure 6. A process flow diagram for Solid Phase Epitaxial Regrowth (SPER). Source: Reference 20.

19 It has been demonstrated that various implementations of the SPER process improve electrical device performance26. It has also been shown that a second set of implants and anneals near the epitaxial layer surface can further improve performance and crystal quality while minimizing aluminum outdiffusion27.

The fabrication of SOS wafers is well understood. To this date, most work has focused on improving the quality of epitaxially deposited silicon layers after the deposition has occurred. It is logical to expect that as methods continue to improve the initial quality of the sapphire surface will play a more important role in the SOS fabrication process.

2.2.3. RF Applications for SOS Technology

SOS technology is widely used in RF applications because it provides several benefits for analog RF circuits in addition to the benefits already discussed for general digital

CMOS circuits. As previously mentioned, SOS technology is preferred over other SOI techniques in RF applications, because it offers a continuous insulating substrate.

Substrate losses are drastically reduced which allows for the creation of higher Q factor inductors. Improvements to the kink effect discussed previously drastically reduce the parasitic bipolar gain and increase the breakdown voltage15. In short, efficiency improves as well as reliability.

Laterally diffused MOSFET’s have been created on SOI substrates for use as power amplifiers in RF designs. They can provide high cutoff frequencies and high breakdown voltages along with the potential of improved gain, higher efficiency, larger bandwidth, and the possibility of integrating analog components alongside digital components on a

20 single chip28. It has been shown that stacking CMOS structures can further improve power amplifier performance on SOS substrates29.

Impedance matching networks have also been demonstrated using SOS technology30.

Circuits were capable of matching highly mismatched loads due to the high quality of inductors inherent to an SOS device. Distributed amplifiers with coplanar waveguides have also exhibited excellent matching characteristics while operating at 10 GHz31. Low loss characteristics allow SOS technology to compare favorably to III-IV alternatives in this application.

The implementation of SiGe heterostructures on high quality SOS substrates has demonstrated great potential for the wireless industry32. Implementations of MODFET structures with extremely high transconductance properties have shown promise in the area of high-speed analog communications. MOSFET transmit receive switches have also been demonstrated on SOS technology33. This type of design compares well with other alternatives while providing the unique opportunity to be implemented alongside other digital CMOS circuitry on the same substrate.

Sapphire substrate based integrated circuit technologies have found a particular niche in the RF industry. They offer the potential for integrating high performance analog devices alongside digital CMOS circuitry on the same substrate, all the while maintaining equivalent or even improved performance over other alternative technologies.

2.2.4. Other Applications for SOS Technology

SOS technology has been explored as an alternative to bulk silicon technology in areas other then RF device design. Experimentally, it has shown similar potential to be an 21 efficient and effective alternative to more traditional technologies in these areas, but as of yet it has not found comparable commercial success.

Optoelectronic switches based on SOS CMOS technology have been explored for computing applications. They are being looked at as an alternative for chip-to-chip communications where traditional approaches are limited by the inherent speed of interconnect lines34.

SOS CMOS technology using thin silicon films is being explored as an improvement to bulk CMOS, as well as traditional SOS, in general high performance computing applications22. In particular, thin film SOS transistors show equal or better performance in all measured categories when compared to bulk Si transistors and show greatly improved performance when compared to traditional as-grown SOS devices.

Fabrication of a galvanic isolation buffer has been achieved on SOS substrates35.

Circuit performance was adequate at operation speeds up to 30 MHz, and the package exhibited a breakdown voltage of 800 V. Proper device isolation was verified experimentally. A similarly successful study demonstrated the fabrication of an isolation charge pump on a SOS substrate36. The circuit demonstrated a 23% efficiency compared to only a 9% efficiency for standard bulk CMOS.

A low-power analog to digital converter has been demonstrated on a sapphire substrate37. Using an innovative 2C-1C capacitor chain allowed the circuit to achieve competitive performance while operating at a power dissipation as low as 900 nW with a

1.1V power supply.

22 SOS technology can be a viable alterative for high performance CMOS based technologies that require the unique benefits provided by a sapphire substrate. This performance has been demonstrated experimentally for several applications.

2.3. Applications for Sapphire in Semiconductor Photonics

Sapphire has become an important substrate for optoelectronic applications, particularly in the case of Gallium Nitiride (GaN) and Zinc Oxide (ZnO) based photonic devices. Both of these materials are wurtzite type crystals that feature a wide and direct bandgap characteristic, and as such have proven to be valuable materials for creating short wavelength light emitting diodes and lasers. Unfortunately, both GaN and ZnO are extremely difficult materials to grow, and cost-effective, large device substrates have not been produced. The preferred approach has often been to use some other available substrate and epitaxially deposit GaN or ZnO layers on the wafer with one of a variety of available techniques. Sapphire or Silicon Carbide (SiC) is typically chosen for these applications.

2.3.1. Epitaxial Deposition of GaN on a Sapphire Substrate

Sapphire has been the most common choice of substrate for GaN epitaxial deposition.

A sapphire substrate provides a base for an epitaxial active layer in much the same manner that a sapphire substrate is used in SOS applications. However, in this application the reason behind the choice of substrate is rather different. The sapphire substrate provides few if any benefits to the operation of the final device. In fact, there is a slight lattice mismatch between GaN and c-plane sapphire (the most common choice for this

23 application) that causes deposited GaN layers to be significantly strained and contain a high number of crystalline defects38. Despite this limitation, sapphire was chosen because of its ability to promote epitaxial growth of GaN, its relative commercial viability, its low cost, and its wide band gap39. The epitaxial relationship between GaN and sapphire is illustrated in Figure 7.

To improve the quality of epitaxial GaN deposition on sapphire, nitride buffer layers are grown on the sapphire surface at low temperatures. Several approaches exist that either convert the sapphire surface to an aluminum nitride (AlN) film or deposit a low temperature layer of GaN on the surface. Following growth of the buffer layer with a high temperature deposition of GaN will create GaN layers with a smaller number of crystalline defects.

Initially, it was shown that GaN layers deposited on AlN coated sapphire wafers showed improved electrical and optical performance over GaN films deposited directly on sapphire surfaces40. Various vapor phase epitaxy techniques can be employed to generate the AlN film on the sapphire surface prior to GaN deposition41. The AlN layers can also be fabricated by the nitridation of the sapphire surface in a nitrogen rich plasma environment42, or an ammonia based gas environment43. It has been shown that the uniformity and surface morphology of the deposited GaN layers greatly improves with the addition of a buffer layer44. As a result, the optical and electrical properties of the

GaN films are improved.

It is also possible to create GaN buffer layers at low temperatures on sapphire and

subsequently deposit improved GaN active layers. The molecular beam epitaxy of GaN

Figure 7. An illustration of the epitaxial relationship between sapphire and GaN for various crystallographic orientations. Source: Reference 45.

25 buffer layers in ammonia rich environments has been demonstrated and is know to improve the formation of crystalline GaN films45. These layers are necessary even on A- plane sapphire where the lattice mismatch of GaN and sapphire is only about 2% rather than around 14%.

Both the process of forming these buffer layers, often referred to as nucleation layers, and the process of growing high quality GaN on top of these layers is well understood. A comparative study of the AlN and GaN nucleation layers demonstrates the formation of

GaN islands on the nucleation layers as the catalyst for the growth of continuous, single- crystal GaN layers46. Evidence of these islands is given in Figure 8. A low temperature buffer layer has a complex grain structure that contains several misoriented islands47. As the buffer layer is annealed at high temperatures during the growth of the GaN film, these islands coalesce and a continuous, single crystal film forms as the islands continue to grow vertically and laterally. A thermodynamic model for this process has been proposed48.

More recently, self-supporting GaN substrates have been fabricated using sapphire substrates as an initial base49. Using a similar buffer layer approach, a low temperature seed layer of GaN is grown on the sapphire substrate and then followed by a high temperature GaN deposition. The GaN film will then naturally separate as the highly defective buffer layer cools down. A similar approach using an AlN seed layer failed to separate naturally.

The epitaxial deposition of GaN on sapphire is a complex process. GaN layers deposited directly on sapphire exhibit a high number of crystalline defects in a manner

Figure 8. Visual evidence of single crystal GaN island formation on GaN nucleation layers. Source: Reference 47.

27 that is similar to the epitaxial deposition of silicon on sapphire. To improve the quality of deposited GaN, nitride buffer layers are grown on the sapphire substrate that promote the growth of single crystal GaN with a minimal amount of crystalline defects. This process is well understood, and general models for the formation of GaN epitaxial layers have been reported.

2.3.2. GaN Based Optoelctronic Devices

GaN is a direct bandgap semiconductor with a bandgap energy of 3.4 eV. This makes

GaN ideal for short wavelength optical devices particularly in the blue-green optical spectrums50. Additionally, it is highly tolerant of high temperatures and harsh operating environments, making it a highly desirable alternative for space and military applications.

Gallium can also make nitride alloys with aluminum and/or indium. This alters the band gap of the material anywhere between 1.9 eV to 6.3 eV allowing for the creation of optical devices across a wide portion of the spectrum from blue-green all the way to ultra violet51.

GaN based LED’s have been demonstrated and are currently commercially available.

They satisfy a previously unfulfilled need for blue-green LED’s with a peak wavelength between 450 nm and 500 nm52. It is possible to make high brightness LED’s suitable for commercial applications53. A double-heterostructure approach is used combining InGaN and AlGaN alloys.

Gallium based laser diodes have been fabricated as well. Quantum well laser structures are possible in the blue-green and ultraviolet spectrums54. InGaN based quantum well lasers have been demonstrated in the spectral range between 363 nm – 380

28 nm. Using AlGaN alloys it is possible to create quantum well lasers with a wavelength as small as 200 nm. It is possible to improve the quality and lifetime of laser diodes using lateral overgrowth techniques55.

2.3.3. ZnO Based Optoelectronic Devices

ZnO is also a popular material choice for optoelectronic devices. It shares the direct bandgap properties of GaN that make it a good choice for optical applications,

Additionally, ZnO features a high exitonic binding energy of 60 meV that allows for efficient optical output even at high temperatures56.

ZnO also features a wurtzite type crystal structure (Figure 9) that allows for an epitaxial relationship with sapphire substrates. The lattice mismatch between ZnO and the c-plane of sapphire is approximately 18%, allowing for fairly good quality epitaxial deposition of ZnO on sapphire57. In contrast to GaN, small ZnO substrates are commercially available and do provide benefits over sapphire substrates58. However, heteroepitaxial deposition of ZnO on sapphire has still been extensively explored, and

ZnO devices on sapphire have been produced using several different methods including molecular beam epitaxy (MBE) methods and vapor phase deposition techniques. These methods have been known to produce relatively high quality layers of ZnO59.

Several optical devices have been demonstrated using ZnO layers deposited on sapphire substrates. For example, ultra violet detectors have been produced with noticeably fast response times60. MgZnO alloys have also shown promise for optical applications61. Light emitting diodes using MgZnO heterostructures have been demonstrated56.

Figure 9. Representation of the <0001> sapphire orientation and lattice sites that promote an epitaxial relationship with ZnO. Source: Reference 57.

30 ZnO is another popular optical device material that can take advantage of sapphire substrates. ZnO on sapphire can be used to create devices in the short wavelength spectrum that compare favorably to other alternatives and exceed the performance of those alternatives at high temperatures.

2.4. Current Methods for Sapphire Wafer Cleaning and Surface Processing

Sapphire surface preparation is an important issue in the case of epitaxial deposition on a sapphire surface. The initial quality of the sapphire surface will directly impact the final quality of the epitaxial deposited layer. There is some experimental work that focuses on the area of sapphire surface preparation and cleaning, but particularly in the area of wet chemical cleaning there is comparatively little information available.

2.4.1. Wet Chemical Treatments

The removal of particle contamination and other chemical impurities on sapphire substrates has not been directly explored through wet chemical processes in great detail.

However, there has been significant work done in the area of wet chemical etching and polishing of sapphire surfaces. It is possible to uniformly etch a sapphire surface with wet chemical treatments and achieve an atomically smooth surface through several different methods. Various acidic mixtures as well as molten solutions have been explored with varying degrees of success.

Etching sapphire substrates with sulfuric and/or phosphoric acids is popular. Pure

H2SO4 has been shown to be a fast and fairly uniform etchant of sapphire, but also has been shown to produce insoluble reaction products when the temperature was too high or 31 62 63 the etch time was too long . On the other hand, pure H3PO4 is a highly non-uniform etchant of sapphire. It will smooth sapphire surfaces oriented in the <0001> crystal orientation, however along any other orientation it will preferentially attack crystal

64 dislocations . In fact, H3PO4 has been commonly used to study the dislocations and crystalline defects in sapphire samples65.

The most routinely employed sapphire etchant is a 3:1 mixture of H2SO4:H3PO4. The inclusion of phosphoric acid in the mixture appears to buffer the effect of the sulfuric acid, slowing the reaction rate of the mixture compared to that of pure sulfuric acid, but preventing the formation of any unwanted reaction products. Unfortunately, the addition of phosphoric acid can also cause surface pitting63.

The etch rate for sapphire in these various acid mixtures has been reported over the temperature range from 200°C – 400°C with conflicting results, but the reaction rate is relatively slow on the order of 1 µm/hr or less. One example of achievable experimental etch rates is presented in Figure 10.

The activation energies for these reactions are reported on the order of ~ 10 – 30 kcal/mol, but differ significantly between studies62 63. The activation energy for the reactions involving sulfuric acid is higher than that for reactions involving phosphoric acid. The activation energy for reactions with the sulfuric-phosphoric mixture falls between the other two.

It is possible to create patterned substrates using some variation of these etchants in combination with silicon dioxide masks patterned via standard photolithography techniques. In one case, grooved substrates were created in preparation for laterally

Figure 10. The etch rate vs. temperature for various chemical etchants of sapphire. Source: Reference 63.

33 overgrown GaN deposits. Etching in both pure H2SO4 and a 3:1 mixture of H2SO4:H3PO4 was preformed62. Here the sulfuric-phosphoric mixture achieved the most appropriate results due to issues with formation of reaction products as mentioned above. In another study, pyramidal shaped pits were etched in preparation for the deposition of InGaN- based Light Emitting Diodes66. They achieved similarly effective results with a sulfuric- phosphoric mixture.

Earlier research focused on surface smoothing via treatments in molten liquid solutions. These treatments were capable of significant etching of a sapphire surface, but were cumbersome to implement and often left residual contaminants on the wafer’s surface. In some cases these residuals where difficult to remove.

A treatment in molten Vanadium Pentoxide was preformed at 800°C. In general it was successful in removing surface scratches and other defects, however in some cases deposits were left on the surface. The deposits were somewhat chemical resistant, and it was not clear if they could be completely removed via thermal treatments67.

Molten Na2B4O7 (Borax) has also been explored as a means of chemical polishing.

Reaction temperatures are in excess of 800°C and can achieve atomically smooth results on most crystal orientations except for the <0001> orientation where it is more appropriate to use phosphoric acid64.

While well understood wet chemical treatments with the specific focus of improving sapphire surface quality do not exist, there has been some significant experimental work done in the area of wet chemical etching of sapphire surfaces. The process is well

34 documented and the most common method involving sulfuric and phosphoric acids can achieve predictable etch rates with minimal surface damage.

2.4.2. Dry Chemical Treatments

Several dry chemical treatments have been studied as methods for improving the surface of sapphire substrates. These methods include thermal anneals, gas phase etching, and plasma etching. Each approach offers several benefits depending on the application, and the methods compare favorably to wet chemical treatments.

It has long been known that high temperature thermal treatments will improve the color and clarity of natural sapphire gems, so it is not a stretch to think that similar treatments may improve the quality of a synthetic sapphire surface. Not surprisingly, it has been shown that thermal annealing can produce atomically smooth sapphire substrates68. Annealing at temperatures in excess of 1000°C was required for an hour or more, with longer annealing times or higher temperatures needed for misoriented surfaces. These types of treatments created a step and terrace like structure rather than a perfectly uniform surface. These changes in morphology due to high temperature treatments are now well understood69 70.

Gas phase etching was also explored as an alternative to liquid etching techniques.

Gas chemistries comprised of sulfur fluorides were proven to be effective etchants of sapphire, but displayed a high selectivity for various orientations of sapphire71. Etching with fluorinated hydrocarbons displayed similar potential72.

More recently, there has been a wealth of research in the area of plasma etching of sapphire surfaces. These types of treatments have focused on exposing sapphire wafers to 35 plasmas at modest temperatures. In some cases the process was followed by a nitridation to render the surface inert before the deposition of a III-IV compound, often some form of GaN.

Plasma etching and cleaning can offer several benefits if the environment is appropriate. Plasma processing is more dependent on the inductive power and bias voltage of the plasma environment than temperature. As a result, plasma cleaning can be carried out at a temperature that is much lower than thermal furnace treatments and anneals.

Exposure to hydrogen atoms through low temperature plasma treatments proves to be effective at cleaning the surface of sapphire wafers73. These plasma treatments are preferable to high temperature treatments in air that tend to lead to surface damage and promote hydrogen diffusion into the sapphire substrate. Hydrogen based plasma treatments at 300°C have been shown to completely remove carbon contamination from a sapphire wafer74.

It has been shown that O2 as well as H2/Ar plasmas are effective at removing hydrocarbon and fluorine contamination form a sapphire surface75. Samples initially containing a uniform contamination layer of approximately 7 – 10 Å before treatment were left with a uniform Al layer following treatment with one of the plasmas and a furnace anneal at 900°C for 30 minutes.

Chlorine based plasmas have also been explored extensively as an etchant of

76 sapphire . They are most effective with an inclusion of 80% BCl3 or more. Inclusions of inert gases nominally effect etch rate and etch selectivity. The etch rate of sapphire in an

36 inductively coupled 81%BCl3/9%HBr/10%Ar plasma in particular exhibits relatively fast etch rates on the order of 0.5 µm/min77. The etch rate is highly dependent on bias voltage and inductive power. The etch chemistry is selective, with a selectivity of sapphire over mask material (photoresist) of approximately 0.87. An example of experimental etch times and etch selectivities for this particular chemistry is illustrated in Figure 11.

Several dry chemical methods exist for sapphire surface preparation and etching. The methods feature comparably fast etch rates while providing a relatively smooth surface. If the production environment is conducive to the types of processing equipment required for these dry methods, a dry surface preparation approach is very effective.

2.4.3. Mechanical Polishing

Mechanical polishing is often preformed on commercially available sapphire wafers, but not to a degree that would leave the surface suitable for immediate device fabrication.

It is often assumed that wet chemical or dry chemical surface preparation would be more appropriate for more exacting applications, however some mechanical methods have been explored with the intent of creating an atomically smooth surface for device fabrication.

Colloidal sapphire polishing with SiO2 has been explored in a manner that is similar to that of silicon. The results were positive indicating removal rates of 25 µm/hour under the right conditions78. It is believed that a chemical reaction between the silicon dioxide and sapphire surface form alumina silicates that promote fine polishing.

Chemical Mechanical Polishing (CMP) techniques have been tested on sapphire

substrates79. Removal rates of 180 nm/min can be achieved while maintaining a surface 37

Figure 11. The etch rate and etch selectivity as a function of plasma inductive power at a DC bias of -600V. Source: Reference 77.

38 roughness around 2 nm. Further treatments in a plasma environment reduced the surface roughness to less than 1 nm. It has also been shown that the CMP process displays high anisotropy in the case of sapphire, with the removal rate varying greatly with the surface crystal orientation80.

Vibratory polishing has also been explored as a method for removing the damage done to sapphire wafers after slicing81. The process was successful at creating a smooth surface free of scratches and pits, but the results are somewhat dated and more current techniques surpass the effectiveness of this approach.

Mechanical polishing of sapphire surfaces has been explored with the intention of creating surfaces ready for device fabrication. Some results indicate that polishing may be an effective technique that offers a relatively speedy etch rate. However, in general other methods appear to be preferable in the case of sapphire surface processing.

39 3. OBJECTIVES OF THIS STUDY

It has been established that sapphire is an important material used in semiconductor technology. There are currently a few important electronic and photonic devices that use sapphire as an insulating substrate. Despite these available applications for sapphire substrates, there has been comparatively little analysis of sapphire surface cleaning prior to its use in these applications, particularly in the area of wet chemical cleaning. As current technologies improve, the initial surface conditions of sapphire substrates will become more critical. The surface preparation and cleaning of sapphire substrates must be explored in more detail then the current state of the art provides.

This study intended to use the most common cleaning methods for silicon substrates as a starting point for exploring appropriate sapphire substrate cleaning methods. There is evidence that combining chemical solvents with a known etchant of sapphire can create an effective cleaning process82. A similar process involving Standard Clean (SC) solutions and hydrofluoric acid already exists for silicon. It was intended to use these preexisting methods as a basis for obtaining a better understanding of sapphire surface processing in a manner that meets the rigid standards of semiconductor device manufacturing. Determining the most common contaminates of a sapphire substrate, and initiating the process of developing the methods to remove those contaminants, were the chief goals of this study.

40 4. EXPERIMENTAL PROCEDURES

These experiments involved the testing and analysis of several sapphire substrate samples subject to various wet chemical treatments. The substrate samples were received from RSA Le Rubis in Grenoble France. The as-received wafers used for these experiments were 4 inches in diameter, oriented in the c-plane (0001) direction, and subject to a thermal anneal prior to delivery. Individual wafers were scored and separated into smaller, irregular pieces in order to allow for a more direct comparison where possible. Several wafers were required to perform all of the experiments, thus a direct comparison of treatments is not always appropriate as a significant difference was observed between the initial surface properties of each wafer.

Treatments employed during this study include Standard Clean 1 (SC1), Standard

Clean 2 (SC2), a dilute HF solution, and a 3:1 mixture of H2SO4:H3PO4. These samples were analyzed by means of wetting angle measurements, AFM measurements, and XPS analyses. A more detailed description of the treatment procedures and methods of analysis are included below.

4.1. Chemical Treatments

Several chemical treatments were employed during this experiment. Combinations of the following chemical solutions were used: Dilute hydrofluoric acid (HF), phosphoric acid (H3PO4), sulfuric acid (H2SO4), Standard Clean 1 (SC1), and Standard Clean 2

(SC2). In all cases the solutions were prepared in simple chemical beakers and either 41 heated on hot pates or left at room temperature. Unless otherwise noted, all treatments lasted 10 minutes. Following treatment, samples were rinsed in deionized water and stored in polycarbonate containers until the necessary measurements were taken.

The HF solution was prepared by diluting 49% HF in deionized water (DIH2O) in the ratio 1:100 (HF:DIH2O), and treatments were performed at room temperature. A sulfuric- phosphoric mixture was also used that is known to etch sapphire (see Chapter 2 for more details). The mixture was combined in a ratio of 3:1 sulfuric acid to phosphoric acid, and treatments were preformed at approximately 100 °C. SC1 was prepared in a ratio of

6:1.5:1 (DIH2O:H2O2:NH4OH). Standard clean 2 was prepared in a ratio of 7:1.5:1

(DIH2O:H2O2:HCL). Both Standard Clean treatments were preformed at approximately

80 °C. In many cases, a series of two or more of these chemicals were used on the same sample. In these situations an intermittent short rinse in deionized water was used between treatments.

In an effort to further explore the effect of these treatments some samples were intentionally contaminated with a “spiked” SC1 solution. The spiking mixture contained iron in 5% HNO3 in a weight ratio of 1 mg/mL, and 100 µL of this iron mixture was added to 850 mL of SC1. Samples subject to this treatment were also treated for 10 minutes and followed by a short deionized water rinse.

4.2. Measurement Techniques

Three primary measurement techniques were employed during this experiment.

Wetting angle measurements were taken as an initial analysis of the substrate surface 42 energy. These measurements were followed by XPS measurements as well as AFM analyses to determine surface contamination and surface roughness respectively.

Wetting angle, or contact angle, measurements were taken as a preliminary inspection of a sample’s surface following several of the treatments. A Tantec testing apparatus was used that included a suspended syringe over a movable stage. A small quantity of water was dropped on the surface of a treated sample and the drop was monitored with a high- resolution camera. The wetting angle can be measured by taking a line that intersects both the apex of the water droplet and the edge of the droplet’s base. The wetting angle is the angle between this line and the surface of the sapphire sample.

Depending on the surface energy of a sample, a water droplet placed on the surface would either disperse widening the radius of the base of the droplet, or would further coalesce shortening the radius of the base. A decrease in wetting angle implies an increase in surface energy, whereas an increase in wetting angle implies a decrease in surface energy. A change in surface energy can result form a change in surface morphology or surface composition, but wetting angle measurements alone are not conclusive enough to make a judgment about the exact nature of any surface change.

Atomic Force Microscopy (AFM) measurements were taken following several of the samples as well. A Digital Instruments Nanoscope 3000 AFM was used in trapping mode to take 2 µm by 2 µm scans of several different areas of the same sample. These measurements provided a visual representation of the surface of the treated samples as well as a measurement of the RMS roughness of the surface.

43 Xray-Photoelectron Spectroscopy was used to measure the surface contamination. A

Kratos Axis Ultra was used in hybrid mode to take 1 mm by 1.5 mm scans of the samples. Monochromatic Al-k alpha x rays were used. Samples were placed normal to the analyzer entrance and the unscanned area was covered with aluminum foil. A 5mm by 5mm window was cut in the foil for analysis. Measurements were taken at low pressure (~8-10 torr).

The results from each of these tests are presented in the following chapter. More detail regarding the number of sample treated and the exact combination of treatments used can be found in that section as well. A discussion of the relevance of these results is provided alongside the summarized data.

44 5. EXPERIMENTAL RESULTS AND DISCUSSION

Several sapphire samples were treated with various combinations of SC1, SC2, dilute

HF, and a 3:1 mixture of H2SO4:H3PO4. The effect of these treatments was analyzed by means of wetting angle measurements, an AFM analysis and an XPS analysis. In many cases sapphire was proven to be a resilient material as the treatments had minimal effect on the surface composition of the sapphire samples. Yet, in some other cases, these treatments caused enough of a change to warrant further study, particularly in the treatment of organic contamination.

5.1. Wetting Angle Measurements

Wetting angle measurements were taken as a preliminary means for analyzing the effect of chemical treatments on the sapphire surface. Four samples were treated with various combinations of cleaning solutions. As received, the wetting angle for a drop of water on the sapphire surface was over 50°, indicating a relatively hydrophobic surface at the start. In all cases, the wetting angle of the surface decreased from the no treatment case, implying an increase in surface energy as a result of the treatment.

Following a 10 minute treatment with HF, the wetting angle decreased to approximately 15°, falling just short of the value one would expect for a completely hydrophilic surface. Another 10 minute treatment with SC2 produced similar results decreasing the wetting angle to about 20°. In contrast, a treatment for 10 minutes with

SC1 produced an almost immeasurable wetting angle around 7°, indicating fully 45 hydrophilic behavior. Finally, treatment with SC1, then HF, then SC2 was preformed, with each treatment again lasting for 10 minutes. This closely replicates a standard cleaning sequence used for preparing silicon wafers for device fabrication. In this case, the wetting angle results were similar to the SC1 treatment, however the surface did not appear to be as strongly hydrophilic. It was clear that the sapphire surface responded to each of these treatments, but at this stage it was not possible to determine the cause of the change without further experimentation.

A further test monitored the wetting angle of the surface after treatment with HF for 1 minute, 5 minutes and then finally 10 minutes. The change in wetting angle was not linear, indicating a similarly nonlinear change in surface energy. All wetting angle measurements are summarized in Figure 12. Figure 12 (a) compares the wetting angle of the sapphire surface following each of the 10 minute treatments, and Figure 12 (b) illustrates the change in wetting angle over time following several HF treatments.

In the case of silicon wafers, it is known that surface wetting properties are primarily controlled by organic contamination83. SC1 is known to be a strong oxidizing agent and is effective at removing organic contamination from the surface of silicon. During these experiments, the response of the sapphire surface to treatments with SC1 produced results that would similarly indicate organic contamination to be the primary controller of the surface wetting properties of sapphire.

In an effort to further verify the effect of organic contamination on the wetting properties of sapphire, some of the treated samples were stored in a polycarbonate storage container and exposed to ambient air over a period of several days. The wetting angle of

(a)

(b)

Figure 12. Wetting angle of sapphire samples (a) treated with various chemicals for a period of 10 minutes and (b) treated with HF for varying lengths of time.

47 the sapphire surface was periodically monitored during this time. The results of these measurements are presented in Figure 13 for two samples. One sample was etched twice with HF for a total of 10 minutes and then stored. The second sample was etched with HF a total of three times for 30 minutes. The samples were rinsed in deionized water between each etch. The wetting angle increased quickly from a low of 15° to a high around 35° over the first five days before leveling out. It should be noted that due to lack of substrate samples, the same sample was measured each time and then rinsed and returned to the storage container. This may explain why the wetting angle never returned to the initial wetting angle value over 50°.

Based on the change in wetting angle following each treatment, and the subsequent reversal of wetting angle behavior over time, it is likely that organic contamination plays an important role in determining the wetting properties of a sapphire surface.

Furthermore, it is possible that SC1, a treatment known to reduce organic contamination on silicon surfaces, can be an effective treatment for organic contamination on sapphire surfaces.

5.2. Surface Roughness Measurements

In an effort to better understand the impact of various chemical treatments on the sapphire surface, an AFM analysis was conducted on several samples. The RMS roughness of each sample was determined and an AFM image of the surface was obtained. The RMS roughness for one set of samples is summarized in Figure 14 (a), which contains data for samples treated with SC1, SC2, HF, and the combination of all

Figure 13. Wetting angle over time for samples treated with HF for varying lengths of time.

(a)

(b)

Figure 14. RMS roughness of wafer samples treated with various combinations of SC1, SC2, and (a) HF or (b) 3:1 H2SO4:H3PO4.

50 three. A second set of samples is summarized in Figure 14 (b). This set of data contains samples using a similar series of treatments that replaces HF with a 3:1 mixture of sulfuric acid and phosphoric acid. This solution is a known etchant of sapphire. It should be noted that the two sets of samples were taken from different wafers and the initial roughness of each wafer differed significantly. This may make direct comparisons of the two sets of data inappropriate.

From the available results, it appears that SC1 and SC2 both tended to smooth the surface of the sapphire samples, where as both HF and the sulfuric-phosphoric mixture tended to roughen the surface. The sulfuric-phosphoric mixture is a known etchant of sapphire, but its etch rate is known to be relatively slow. It is possible that, due to the relatively short treatment time used for these experiments, an uneven surface etch was achieved accounting for the increase in surface roughness. HF on the other hand is not known to etch sapphire, and for all intensive purposes sapphire is considered to be resistant to HF treatments. In these experiments HF roughened the surface significantly.

The surface roughness results combined with the wetting angle results seem to indicate a change in surface morphology due to a change in surface energy.

A select few AFM images are presented in Figure 15. Part (a) showcases an as received wafer with clear surface scratches. Part (b) illustrates a wafer treated with HF where the initial surface features appear to be magnified by the treatment. A comparison of these two images may suggest a selective interaction of the sapphire surface with the

HF treatment as the previously discussed presence of organic contamination is blocking portions of the sapphire surface from contact with the HF treatment. It is also possible that the crystallographic surface orientation is influencing the effect of the HF treatment. 51

(a) (b)

Figure 15. AFM Images of the sapphire surface after (a) no treatment, (b) treatment with HF, (c) treatment with SC1, (d) treatment with H2SO4:H3PO4.

52 Part (c) and part (d) of Figure 15 illustrate samples treated with SC1 and the sulfuric- phosphoric mixture respectively. A smooth surface was seen visually following treatment with SC1 and this result was confirmed with surface roughness measurements. Similar results were obtained with SC2. Interestingly, in the case of a HF treatment followed by a

SC2 treatment, the surface roughness was clearly determined by the final SC2 treatment.

On the other hand, a sapphire surface etched with a sulfuric-phosphoric solution and then subject to a SC2 treatment was further roughened. This appears to further confirm the fact that treatments of HF modify the surface morphology through a redistribution of surface energy, where as the sulfuric-phosphoric mixture clearly removes portions of the surface. The spotted image seen in part (d) appears to confirm the slow, uneven etching of the sapphire surface.

In any case, it is clear that HF treatments modify the surface morphology as a result of a change in surface energy, whereas the sulfuric-phosphoric mixture is an effective etchant of sapphire. The wetting angle data in combination with the AFM results indicate that a cleaning series involving SC1 and the sulfuric-phosphoric etching solution shows potential as an effective cleaning method. However more work is need, and in particular longer etch times need to be explored, as it appears the relatively short etch time used in this experiment may have done more harm then good to the sapphire samples. It is also possible that a simple treatment with SC1 may prove to be the most effective surface treatment for sapphire substrates. SC1 treatments caused the largest change in surface energy and created the smoothest substrate surfaces.

53 5.3. Atomic Composition Analysis

In an effort to better understand the response of sapphire surfaces to the chemical treatments used during these experiments, an analysis of the atomic composition of several sapphire samples was conducted. The wafer supplier had two independent Total

Reflection X-ray Florescence (TXRF) analyses conducted on separate samples. These results, included in Table 2, show significant calcium contamination as well as some contamination from various alkali metals. To a lesser degree, other metallic contamination like iron and zinc appear to be an issue.

In an attempt to verify the suppliers results, XPS survey scans were taken of several samples treated with some combination of SC1, SC2, HF and/or H2SO4:H3PO4 (3:1). An example of one of these scans is presented in Figure 16. It was hoped that these scans could reveal more about the ability of certain treatments to remove particle contamination from the sapphire surfaces tested. In many cases, trace amounts of elements were observed near the detection limits of the available XPS process, and as a result it is hard to make definitive conclusions about the ability of certain chemistries to remove contamination. However some general trends were apparent that warrant further investigation. All XPS results are presented in Table 3 in terms of the atomic percentage of the elements present on the surface.

In general, the surface treatments employed did very little to change the surface composition. Oxygen and Aluminum dominated the surface chemistry as expected. There was significant carbon contamination in all cases, and all of the treatments tended to reduce that contamination to some degree. This seems to confirm the fact that organic contamination may play an important role in determining surface properties, but it should 54

Table 2. TXRF results from two separate sources (a) and (b). Particle concentrations are given in terms of the atoms/cm2 count.

2 Element Atoms/cm 14 Ca 1.1 x 10 13 Zn 3.2 x 10 13 Na 1.4 x 10 12 Fe 3.8 x 10 K 0.00

Ni 0.00

Cu 0.00

Cr 0.00

(a)

2 Element Atoms/cm 12 Ca 2.40 x 10 10 Zn 9.6 x 10 12 Na 1.97 x 10 11 Fe 1.3 x 10 11 K 3.4 x 10 9 Cr 6 x 10 10 Ni 1.2 x 10 10 Cu 1.6 x 10

(b)

Figure 16. Counts per second vs. binding energy for an entire XPS survey scan of an as-received wafer sample.

Table 3. Atomic percentage of various elements on the sapphire surface following treatment.

Sample Al O C Si Fe P Ca Na N S No Treatment 32.08 52.36 13.17 0.93 0.02 0 0.27 0.21 0.20 0.61 HF 34.38 56.77 7.74 1.04 0.04 0 0.02 0 0 0 SC1 33.84 56.73 8.20 0.77 0.05 0 0.08 0 0 0 SC2 34.09 56.85 7.83 1.14 0.04 0 0 0 0 0 SC1+HF+SC2 35.46 59.80 3.79 0.73 0.17 0 0 0 0 0

H2SO4:H3PO4 (3:1) 26.56 62.00 2.82 0.71 0 2.64 0 0.32 2.03 2.87 SC1+H2SO4:H3PO4 31.99 61.07 3.54 0.92 0 0.80 0.03 0 0.54 1.06 SC1+H2SO4:H3PO4+SC2 32.69 60.49 3.76 1.12 0 0.90 0 0 0.23 0.75

57 be noted that there was some storage time in between treatment and analysis that could have allowed carbon to return to the surface. Generally, it appears that organic contamination may be a concern in the area of sapphire surface cleaning.

A relatively small amount of metallic contamination was present on the surface, most notably some alkali metals and small amounts of iron. The presence of elements like sodium, calcium, and iron seem to validate some of the findings from the TXRF studies.

Unfortunately, the concentrations of these metals are so near the detection limits of the

XPS process used it makes a direct comparison of the two sets of data difficult. It is probably safe to assume that various metallic contaminants will exist in small amounts on sapphire surfaces if the surface is exposed to such contamination. A more exacting study must be used to determine the most problematic particle contamination for these cases.

After comparing some trends from the XPS analysis, it may appear that treatments involving the sulfuric-phosphoric etching solutions removed some of the metallic contamination from the sapphire surface. However, most of the elements are present in quantities that are so near the detection limits of the XPS process employed that it is difficult to make this conclusion confidently. It should also be noted that the sulfuric- phosphoric etching solution appeared to leave trace amounts of sulfur and phosphorus on the surface following those treatments.

In an effort to take a closer look at the behavior of some of these treatments, a few samples were intentionally contaminated with iron during an SC1 treatment and then subsequently treated with the sulfuric-phosphoric etching solution and/or SC2. XPS survey scans were again completed in an effort to examine the effectiveness of these

58 treatments in dealing with iron contamination. Unfortunately, this “spiking” process appeared to have no effect on the sapphire surface, as a focus on the binding energy range for iron revels no significant change to the iron levels following contamination.

Additionally, all treatments following the contamination process showed no signs of decreasing the initial iron concentration on the surface. The XPS counts per second versus binding energy scans are illustrated in Figure 17 for the range relevant to iron. It is clear that a relatively small amount of iron is present initially, but it is also clear that this concentration does not change significantly after any of the treatments. It is also possible that the detection limits of the XPS process played a role in the accuracy of these results.

In general, metallic and carbon contamination both appear to be an issue for sapphire surface contamination. The presence of calcium, sodium and other alkali metals, was apparent throughout the atomic composition analysis. To a lesser extent, the presence of other metals like iron may be an issue of concern. The XPS process verified the presence of carbon, which in turn implies the presence of organic contamination on the surface.

The presence of particle contamination on sapphire surfaces needs to be explored in further detail with a more exacting process in order to determine the best course of action for removing this type of contamination.

(a) (b)

(e)

Figure 17. Counts per second versus binding energy for XPS scans of samples treated with (a) no treatment; (b) spiked SC1; (c) spiked SC1 and a sulfuric/phosphoric clean; (d) Spiked SC1 and a SC2 clean; (e) Spiked SC1, a sulfuric-phosphoric clean, and SC2 clean. 60 6. SUMMARY

Sapphire is an important material for a few niche applications in the semiconductor device industry. In the past, technical limitations with various fabrication techniques have made the initial quality of sapphire substrates less of a concern during processing. There has been substantial work done to surpass many of these limitations, and as new processing techniques become more refined, the initial quality of sapphire substrates will become more of a concern. As such, surface cleaning and processing will need to be explored in further detail.

This thesis has begun the process of exploring wet sapphire surface processing in more detail. The process began with the same approaches used for cleaning devices based on the traditional workhorse of the industry, silicon. The chief focus of the study was to explore surface contamination while monitoring changes in surface properties resulting from treatment with industry standard cleaning chemistries including: dilute HF, SC1,

SC2, and a sulfuric-phosphoric etching mixture. Analysis of treated samples was preformed by means of wetting angle measurements, AFM analyses and XPS measurements.

Treatments involving HF provided no benefit to the surface preparation, as it is not known to etch sapphire in the same manner it etches silicon. In fact, HF appeared to modify the surface morphology of the sapphire samples in a negative manner. Replacing

HF with a 3:1 mixture of H2SO4:H3PO4 does in fact etch the surface and may prove more beneficial. However, in this study relatively short etch times lead to an increase in surface

61 roughness, and longer etch times should be explored. Standard Clean treatments proved useful, particularly in the case of SC1’s treatment of organic contamination. SC2 treatments must be explored further to see if it provides a unique benefit to the cleaning sequences tested. Ultimately, a simple treatment with SC1 may be the most effective approach for preparing sapphire substrates for device fabrication.

In the cases tested, the possible presence of organic contamination emerged as the largest concern. The presence and removal of organic contamination appeared to be the cause of some of the largest changes in surface properties observed during this study. On the other hand, metallic particle contamination proved more difficult to observe, as small trace amounts of these contaminants remained on the sapphire surface both before and after treatment. This stands to be a concern for sapphire surface cleaning, because any surface contamination remaining after treatment is likely to diffuse into material layers deposited on the sapphire substrates during fabrication.

The current state of the art in sapphire surface cleaning needs to be improved if sapphire based semiconductor device technology is to keep improving at its current pace.

There is room for more understanding in the area of wet chemical cleaning in particular.

Treatments combining well known semiconductor cleaning agents (SC1, SC2) and a known etchant of sapphire (3:1 H2SO4:H3PO4) have shown promise as effective cleaning agents, and exploration of the effect of these chemistries on sapphire surface preparation should continue.

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