Modelling and Design of Oversampled Delta-Sigma Noise Shapers for D/A Conversion
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MODELLING AND DESIGN OF OVERSAMPLED DELTA-SIGMA NOISE SHAPERS FOR D/A CONVERSION Masters Thesis Performed at Electronics Systems Department of Linkoping University By Vikram Singh Parihar Reg nr: LiTH-ISY-EX-3616-2005 Linköping 2005-03-10 MODELLING AND DESIGN OF OVERSAMPLED DELTA-SIGMA NOISE SHAPERS FOR D/A CONVERSION Masters Thesis Performed at Electronics Systems Department of Linkoping University By Vikram Singh Parihar Reg nr: LiTH-ISY-EX-3616-2005 Supervisor: Dr. Per Löwenborg Examiner: Dr. Per Löwenborg Linköping, 14 March 2005. Avdelning, Institution Datum Division, Department Date 2005- 03- 10 Institutionen för systemteknik 581 83 LINKÖPING Språk Rapporttyp ISBN Language Report category Svenska/Swedish Licentiatavhandling ISRN LITH- ISY- EX- 3616- 2005 X Engelska/English X Examensarbete C- uppsats Serietitel och serienummer ISSN D- uppsats Title of series, numbering Övrig rapport ____ URL för elektronisk version http://www.ep.liu.se/exjobb/isy/2005/3616/ Titel Modelling and design of oversampled delta- sigma noise shapers for D/A conversion Title Författare Vikram Singh Parihar Author Sammanfattning Abstract This thesis demonstrates the high- level modelling and design of oversampled delta- sigma noise shapers for D/A conversion. It presents an overview and study on digital- to- analog converters (DAC) followed by the noise shapers. It helps us to understand how to design a noise shaper model and algorithmic expressions are presented. The models are verified through high level simulations. The usage of models is to reduce the design time and get a good understanding for fundamental limitations on performance. Instead of time consuming circuit- level simulations, we point out the behavioural- level and algorithmic- level simulations of the noise shaper and the entire system comprising of interpolation filter, noise shaper followed by pulse amplitude modulation and reconstruction filtering. We have used the delta- sigma modulators to reduce the number of bits representing the digital signal. It is found that the requirement on oversampled DACs are tough. It is emphasised that the design of an oversampling converter is a filter design problem. There is a large number of trade- offs that can be made between the different building blocks in the OSDAC. Nyckelord Keyword Oversampled Delta- Sigma Noise shapers ACKNOWLEDGEMENT I would like to thank my supervisor Dr. Per Löwenborg for his esteemed guidance to perform this thesis. Also would like to thank Dr. J Jakob Wickner from Infineon Technology AB, Linköping, Sweden for suggesting the thesis and giving me guidelines. The work was being done at Electronics Systems Department of Linköping University. I would like to thank my friend Martin Ringlander for all his help and making me comfortable during my entire stay in sweden. Also I would like to thank my friends Harsha, David, Anton, Greger for their support. ABSTRACT This thesis demonstrates the high-level modelling and design of oversampled delta-sigma noise shapers for D/A conversion. It presents an overview and study on digital-to-analog converters (DAC) followed by the noise shapers. It helps us to understand how to design a noise shaper model and algorithmic expressions are presented. The models are verified through high level simula- tions. The usage of models is to reduce the design time and get a good under- standing for fundamental limitations on performance. Instead of time consuming circuit-level simulations, we point out the behavioural-level and algorithmic-level simulations of the noise shaper and the entire system com- prising of interpolation filter, noise shaper followed by pulse amplitude mod- ulation and reconstruction filtering. We have used the delta-sigma modulators to reduce the number of bits representing the digital signal. It is found that the requirement on oversampled DACs are tough. It is emphasised that the design of an oversampling converter is a filter design problem. There is a large number of trade-off that can be made between the different building blocks in the OSDAC. ix TABLE OF CONTENTS 1 Introduction 1 2 Digital to analog conversion 3 2.1 Ideal transfer function . 6 2.2 Oversampling D/A converters . 8 2.3 Oversampling without noise shaping. 11 2.3.1 White noise assumption. 11 2.4 Oversampling advantage . 12 2.5 Noise shaping modulators . 14 2.5.1 First-order noise shaping . 15 2.5.2 Second-order noise shaping. 17 2.6 Gain in resolution using interpolation . 20 3 System under consideration 25 4 High-level simulation 37 5 Trade-Off/conclusion 51 References 53 Appendix A I A.1 Introduction . I A.2 Gain in resolution using interpolation . I A.3 Resolution improvement through noise shaping . III Appendix B VII x LIST OF FIGURES Figure 2.1 Alternative representations of an Ideal DAC. 4 Figure 2.2 Image-rejection filter (Low-pass) is used at the output of the DAC to reconstruct the signal. 5 Figure 2.3 Output Signal Spectrum with the images at the centre of the update frequency. 6 Figure 2.4 Output amplitude levels as functions of the input digital codes. 7 Figure 2.5 Oversampled D/A converter. 8 Figure 2.6 Spectrum in an oversampled D/A converter.. 10 Figure 2.7 Quantizer and its linear model. 11 Figure 2.8 (a) A possible oversampling system without noise shaping. (b) The brick- wall response of the filter to remove much of the quantization noise. 13 Figure 2.9 A modulator and its linear model: (a) a general delta-sigma modulator (interpolator structure); (b) linear model of the modulator showing injecting quantization noise. 14 Figure 2.10 A first-order noise shaped interpolative modulator. 15 Figure 2.11 Second-order SD modulator 17 Figure 2.12 Simulated power spectral density for 1st, 2nd, 3rd - order modulator.. 19 Figure 2.13 Interpolation together with low-resolution DAC where N-M LSB’s are Discarded.. 20 Figure 2.14 Simulated ENOB as a function of modulator order and oversampling ratio for 5-bit output modulator. 23 Figure 2.15 Simulated ENOB as a function of modulator order and oversampling ratio for 8-bit output modulator . 24 Figure 3.16 System under consideration. 25 Figure 3.17 Magnitude response of an up-sampled signal . 28 Figure 3.18 Noise model for interpolation with a random delay. 28 Figure 3.19 Principle of interpolation filtering . 29 Figure 3.20 Magnitude response after interpolation by L. 29 Figure 3.21 Direct form linear-phase FIR filter structure. 31 Figure 3.22 Principle of pulse-amplitude modulation. 33 Figure 3.23 Principle of reconstruction filtering . 34 Figure 4.24 Simulated magnitude response of each stage in a multistage interpolation filter. 42 Figure 4.25 Simulated total magnitude resp. of the multistage interpolation filter.. 43 Figure 4.26 First order 5-bit modulator with different number of bits with an ideal digital filter, ie. without any noise generated by digital filter. 44 Figure 4.27 Second order 5-bit modulator with different number of bits with an ideal digital filter, ie. without any noise generated by digital filter. 45 Figure 4.28 First order 8-bit modulator with different number of bits. 46 Figure 4.29 Second order 8-bit modulator with different number of bit with an ideal digital filter, ie. without any noise generated by digital filter. 47 1 1 INTRODUCTION During the last few decades, digital signal processing has evolved to a sophis- ticated level bringing advantages like more robustness, noise-insensitivity, reliability and testability, better production yield. Throughout the years there has been an increase demand for high-speed communications. During the last decades, the Internet and mobile terminal usage has increased dramatically. In our part of the world, they are now to a large extent every man’s property. To bring all above-mentioned merits into real world applications, it is desira- ble to convert digital-domain signals into real-world analog-domain represen- tations and real-world analog signals into digital-domain representations. This makes a digital-to-analog and analog-to-digital conversion impossible to avoid or prevent necessity for such systems which require digital signal processing of the analog signals. Digital processing of audio signals for cellu- lar and voice telephony, CD players and cam-coders is an example of digital- to-analog and analog-to-digital converters application, greatly varied in nature with respect to speed, conversion bandwidth and resolution. For exam- ple, digital audio needs a resolution of 14-bits with a bandwidth of 20kHz while voice signals require a bandwidth of 4kHz[3]. 2 Modelling and design of oversampled delta-sigma noise shapers for D/A conversion 3 2 DIGITAL TO ANALOG CONVERSION Digital-to-Analog converters are one of the major blocks of systems which require interfacing of digital components to the real-world analog signals. Digital-to-Analog converters transform digital binary representation (input- word) to a corresponding analog signals to for subsequent analog processing. The analog signal carrier representing the same signal as the digital input does. An essential issue is that the input is digital, hence discrete time and discrete amplitude. Therefore the signal comprises of truncation noise. The performance of the DAC can be determined using measure in both time and frequency domain. The behaviour of errors due to circuit non-ideal- ities, e.g., distortion and noise, can be of several different types. One can dis- tinct between static and dynamic properties of the errors. The static properties are signal-independent (memory-less) and the dynamic properties are signal- dependent. A typical static error is the deviation from the wanted straight-line input/output DC transfer characteristics, such as gain error, offset, differential (DNL) and integral non-linearity (INL), etc. The dynamic errors mostly become more obvious and dominating as the signal and clock frequencies increase, whereas the static errors are dominating at lower frequencies.