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Analysis and Modeling of Non-idealities in VCO-Based Quantizers Using Frequency-to- Digital and Time-to-Digital Converters THESIS Presented in Partial Fulfillment of the Requirements for the Degree Master of Science in the Graduate School of The Ohio State University By Samantha M. Yoder Graduate Program in Electrical and Computer Science The Ohio State University 2010 Master's Examination Committee: Mohammed Ismail, Advisor Waleed Khalil Steven Bibyk Copyright by Samantha M. Yoder 2010 ABSTRACT Traditional ADCs (analog-to-digital converters) are built using analog circuitry that quantize the input signal in the voltage domain. As technology scales, voltage dynamic range decreases and design difficulties for analog circuits arise. Alternatively, time resolution is improving as technology scales. VCO (voltage controlled oscillator)-based quantizers (Figure i) are highly digital circuits which quantize in the time domain rather than in the voltage domain, and thus are becoming more attractive in deeply scaled technologies. The VCO converts an analog voltage into timing information that can then be quantized using digital circuitry. Analog Voltage-to- Digital x(t) y(n) Traditional ADC VCO-based Voltage-to- ADC Time Time y(n) x(t) Digitization Figure i: Traditional ADC block diagram vs. VCO-based ADC block diagram ii Early work has used a simple digital counter to quantize the VCO signal. However issues with the counter “missing” VCO transitions near the sampling clock edge have led to the use of an FDC (frequency-to-digital converter) as the quantization circuit. The FDC has been widely adopted due to its inherent first order noise shaping characteristic. Another digital time quantization using TDCs (time-to-digital converters) have been traditionally used in PLLs to quantize the VCO phase error but have not been applied to VCO-based ADCs. In this document, we propose for the first time the use of a TDC for time quantization in the VCO-based ADC. Both methods of using the TDC and the FDC are compared, Figure ii. While The SNR of the VCO-based quantizer using either the FDC or TDC is dependent on some common parameters such as VCO tuning range, Kv, x(t), and OSR (oversampling ratio), the TDC has two additional influences on the SNR; namely the VCO center frequency, fc, and buffer delay of the delay chain. Measure FDC Frequency x(t) v(t)=sin(2p ∫ [fc+Kvx(t)] dt) Measure Period TDC Figure ii: Time digitization, FDC vs. TDC iii Both TDC and FDC based quantizers were examined in the presence of VCO nonlinearity, VCO phase noise, and sampling clock jitter, Figure iii. The comparison involves using the same baseline VCO and sampling clock. Modeling and analysis of the VCO-based quantizer and theoretical SNR calculations of the ideal VCO-based quantizers with and without non-idealities are presented. Phase Noise ) B d ( t q S foffset (Hz) Kv D S x(t)=Amsin(2pfmt) FDC/ P TDC Jittery Clock fm 2fm3fm nfm f (Hz) D S P fs f (Hz) Figure iii: VCO nonlinearity, phase noise and clock jitter The model results show that both FDC and TDC are impacted similarly when VCO nonlinearity and phase noise are introduced. However, when sampling clock jitter is introduced the FDCs SNR degrades significantly compared to the TDC. This can be attributed to the FDC losing its first order noise shaping response, Figure iv. iv FDC Ideal, FDC w/ Nonlinear Kv, FDC w/ Phase Noise, FDC w/ Clock Jitter, SNR= 60 dB SNR= 24 dB SNR= 59 dB SNR= 48 dB 0 0 0 0 -20 -20 -20 -20 -40 -40 -40 -40 -60 -60 -60 -60 -80 -80 -80 -80 -100 -100 -100 -100 -120 -120 -120 -120 -140 -140 -140 -140 -160 -160 -160 -160 -180 -180 -180 -180 -200 -200 -1 0 1 2 -1 0 1 2 -200 10 10 10 10 10 10 10 10 -200 -1 0 1 2 -1 0 1 2 10 10 10 10 10 10 10 10 TDC ideal, TDC w/ Nonlinear Kv, TDC w/ Phase Noise, TDC w/ Clock Jitter, SNR= 60 dB SNR= 24 dB SNR= 59 dB SNR= 60 dB 0 0 0 0 -20 -20 -20 -20 -40 -40 -40 -40 -60 -60 -60 -60 -80 -80 -80 -80 -100 -100 -100 -100 -120 -120 -120 -120 -140 -1 0 1 2 -140 10 10 10 10 -1 0 1 2 -140 10 10 10 10 -1 0 1 2 10 10 10 10 -140 -1 0 1 2 10 10 10 10 Figure iv: FDC vs. TDC PSD: Ideal, Nonlinear, Phase Noise, Clock Jitter In summary this work presents an alternative method to using an FDC in a VCO-based quantizer which can achieve the same SNR performance with less sensitivity to sampling clock jitter. v DEDICATION I dedicate this document to the love of my life, Christopher McDonnell vi ACKNOWLEDGMENTS I would like to make a sincere thank you to the following individuals: Professor Ismail who inspired me to study the subject of electrical engineering. His continued support and encouragement led me to the Master’s degree program in electrical engineering. Without his guidance, support, and encouragement this document would not have been possible. Professor Khalil who advised me to study the topic of my thesis. This document would not have been possible without his knowledge, advice, and suggestions which have been an invaluable help throughout my Masters degree. His encouragement and support has led me to continue to the PhD program in electrical engineering. vii VITA June 2004 .......................................................Strongsville High School December 2008 .............................................B.S. Electrical and Computer Engineering, The Ohio State University September 2010 ............................................M.S. Electrical and Computer Engineering, The Ohio State University PUBLICATION Hu, John; Haffner, Mark; Yoder, Samantha; Reehal, Gursharan; Scott, Mark; Ismail, Mohammed; , "An industry-driven laboratory development for mixed- signal IC test education," Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International Symposium on , vol., no., pp.85-88, May 30 2010-June 2 2010 FIELD OF STUDY Major Field: Electrical and Computer Engineering viii TABLE OF CONTENTS ABSTRACT ........................................................................................................................ ii DEDICATION ................................................................................................................... vi ACKNOWLEDGMENTS ................................................................................................ vii VITA ................................................................................................................................ viii PUBLICATION ............................................................................................................... viii FIELD OF STUDY .......................................................................................................... viii TABLE OF CONTENTS ................................................................................................... ix LIST OF TABLES ............................................................................................................ xii LIST OF FIGURES ......................................................................................................... xiii LIST OF ABBREVIATIONS .......................................................................................... xvi LIST OF SYMBOLS ...................................................................................................... xvii CHAPTER 1: Introduction ................................................................................................. 1 1.1 Background ............................................................................................................... 2 1.2 Motivation ................................................................................................................. 2 ix 1.3 Overview of Work ..................................................................................................... 4 CHAPTER 2: VCO-Based Quantizers ............................................................................... 6 2.1 VCO Operation ......................................................................................................... 6 2.2 FDC VCO-Based Quantizer ...................................................................................... 9 2.2.1 Linear Modeling and Analysis ......................................................................... 12 2.2.2 Verification ....................................................................................................... 18 2.3 TDC VCO-Based Quantizer.................................................................................... 21 2.3.1 Linear Modeling and Analysis ......................................................................... 25 2.3.2 Verification ....................................................................................................... 31 2.4 Discussion ............................................................................................................... 34 CHAPTER 3: Limitations of the VCO Based Quantizer ................................................. 35 3.1 VCO Nonlinearity ................................................................................................... 35 3.1.1 Modeling and Analysis ..................................................................................... 36 3.1.2 Verification ....................................................................................................... 39 3.2 VCO Phase Noise .................................................................................................... 41 3.2.1 Modeling and Analysis ..................................................................................... 42 3.2.2 Verification ......................................................................................................