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Z86129/130/131 Ntsc Line 21 Decoder

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Z86129/130/131 Ntsc Line 21 Decoder PRELIMINARY PRODUCT SPECIFICATION Z86129/130/131 NTSC LINE 21 DECODER FEATURES Pin Count/ On-Screen Display Automatic Data Extraction Speed Standard Devices(MHz) Package TypesTemp. Range & Closed Captioning V-Chip Time of Day Z86129 12 18-Pin DIP, SOIC 0¡ to +70¡C Yes Yes Yes Z86130 12 18-Pin DIP, SOIC 0¡ to +70¡C No Yes* Yes* Z86131 12 18-Pin DIP, SOIC 0¡ to +70¡C No No Yes Note: *The Z86130 recovers the line 21 data in both of field1 and field2. It also has V-Chip-specific registers and the output (pin-13) to control program blocking with minimal communications between the Z86130 and the host processor. ¥ Complete Stand-Alone Line 21 Decoder for Closed- ¥ Minimal Communications and Control Overhead Pro- Captions and Extended Data Services (XDS). vides Simple Implementation of Violence Blocking, ¥ Preprogrammed to Provide Full Compliance with Closed Captioning, and Auto Clock Set Features. EIA–608 Specifications for Extended Data Services. ¥ Programmable, Full Screen On-Screen Display (OSD) ¥ Automatic Extraction and Serial Output of Special XDS for Creating OSD or Captions inside a Picture-in-Picture Packets such as Time of Day, Local Time Zone, and Pro- (PiP) Window (Z86129 only). gram Blocking (V-Chip). ¥ I2C Serial Data and Control Communication ¥ Cost-Effective Solution for NTSC Violence Blocking ¥ User-Programmable Horizontal Display Position for inside Picture-in-Picture (PiP) Windows. easy OSD Centering and Adjustment (Z86129 only). GENERAL DESCRIPTION The Z86129/130/131 is a stand-alone integrated circuit, ca- The Z86129/130/131 can recover and output to a host pro- pable of processing Vertical Blanking Interval (VBI) data cessor via the I2C serial bus the recovered XDS data packet from both fields of the video frame in data conforming to defined in EIA–608 as it is defined in the table above the transmission format defined in the Television Decoder (Z86130 provides the raw Line 21 data, which must be de- Circuits Act of 1990 and in accordance with the Electronics coded properly for the applications). On-chip XDS filters Industry Association specification 608 (EIA–608). in Z86129 is fully programmable, enabling recovery of only those XDS data packets selected by the user.The Z86131 The Line 21 data stream can consist of data from several data chan- is designed especially for extracting XDS time information nels multiplexed together. Field 1 has four data channels: two Cap- with proper XDS filter setup for Automatic Clock-Set fea- tions and two Text. Field 2 has five additional data channels: two tures in TVs, VCRs, and Set-Top boxes. And the Z86130 Captions, two Text and Extended Data Services (XDS). XDS is designed especially for V-Chip and Line 21 data recovery. data structure is defined in EIA–608. The Z86129 can recover and display data transmitted on any of these nine data chan- In addition, the Z86129/130 is ideally suited to monitor Line nels. The Z86130 and Z86131 are derivatives of the Z86129. 21 of video displayed in a PiP window for violence blocking The Z86130 and Z86131 do not have OSD capability, but are purposes. A block diagram of the Z86129/130/131 is illus- ideally suited for Line 21 data slicer applications. trated in Figures 1 and 2. DS007200-TVX0199 1 GENERAL DESCRIPTION 2 PRELIMNAY DS007200-TVX0199 NTSC Line21Decoder Z86129/130/131 +5V VDD 13 6 4 15 14 16 12 / IN V Intro SMS SCK SEN SDA SDO Data Line Sliced 7 Data Data CLK Serial Video Data Buffer Recovery Control Port Slicer Data Bus Lock Row Status Reg Addr Bus AW FEW (Continued) Dual Clamp SIG VW Digital Test Reg PG II Lock Command Processor Figure 1. Z86129BlockDiagram SYNC 8 Slicer CSYNC Slice Level Row 4 Latch 10 Address DOT CLK MUX 6 CG Lines DOT CLK Display DIV RAM COMP SYNC V Lock CG CHAR CLK ADDR Logic Display 8 DEC CW MSYNC CHAR Latch 13 CIR FLD Character O/S OSC MSGR Generator ADDR 4 Decoder PH1 SS CTR FLD Output PH2 I Drive Control Logic & MUX LS Line & SFLD Field SLS Control FR V/I POR Line & Fld Ref CKT Decodes GREEN BOX BLUE RED 5 9 1 11 10 17 3 2 18 HIN LPF Vss Vss(A) RREF Z86129 only Loop Filter ZiLOG DS007200-TVX0199 PRE LIMNARY 3 ZiLOG +5V VDD 13 6 4 15 14 16 1 12 / IN V Intro SMS SCK SEN SDA SDO Sliced Data Line C SEL 2 Video 7 Data Data Data CLK Serial I Buffer Slicer Recovery Control Port Data Bus Lock Row Status Reg Addr Bus AW FEW Dual Clamp SIG VW Digital Test Reg PG II Lock Command Figure 2. Z86130/131Block Diagram Processor SYNC 8 Slicer CSYNC Slice Level Row 4 Latch 10 Address DOT CLK MUX 6 CG Lines DOT CLK Display DIV RAM COMP SYNC V Lock CG CHAR CLK ADDR Logic Display 8 DEC CW MSYNC CHAR Latch 13 CIR FLD Character O/S OSC MSGR Generator ADDR 4 Decoder PH1 SS CTR FLD Output PH2 I Drive Control Logic & MUX LS Line & SFLD Field For Z86129 only SLS Control FR V/I POR Line & Fld Ref CKT RCLK Decodes NTSC Line21Decoder NC 5 3 2 9 11 10 NC HIN/XIN XOUT H SEL 17 18 LPF Vss(A) RREF Z86129/130/131 Loop Filter Z86129/130/131 NTSC Line 21 Decoder ZiLOG PIN DESCRIPTION V SS 1 18 RED* I2C SEL 1 18 NC GREEN* 2 17 BOX* H SEL 2 17 NC BLUE* 3 16 SDO XOUT 3 16 SDO SEN 4 15 SCK SEN 4 15 SCK HIN 5 14 SDA HIN/XIN 5 14 SDA 6 13 V /INTRO SMS IN SMS 6 13 VIN/INTRO(PB) V VIDEO 7 12 DD VIDEO 7 12 VDD 8 V (A) CSYNC 11 SS CSYNC 8 11 VSS(A) LPF 9 10 RREF LPF 9 10 RREF Figure 3. Z86129, 18-Pin DIP/SOIC Figure 4. Z86130/131, 18-Pin DIP/SOIC Pin ConÞguration Pin ConÞguration Table 1. Z86129 Pin IdentiÞcation Table 2. Z86130/131 Pin IdentiÞcation No Symbol Function Direction No Symbol Function Direction * 2 2 1VSS Power Supply GND 1 I C SEL I C Slave Address Select Input 2* GREEN Video Output Output 2 H SEL HIN/XTAL Select Input 3* BLUE Video Output Output 3 XOUT XTAL Output Output 4 SEN Serial Enable Input 4 SEN Serial Enable Input 5 HIN Horizontal In Input 5 HIN/XIN Horizontal In/XTAL Input Input 6 SMS Serial Mode Select Input 6 SMS Serial Mode Select Input 7 VIDEO Composite Video Input 7 VIDEO Composite Video Input 8 CSYNC Composite Sync Output 8 CSYNC Composite Sync Output 9 LPF Loop Filter Output 9 LPF Loop Filter Output 10 RREF Resistor Reference Input 10 RREF Resistor Reference Input 11 VSS(A) Pwr. Supply (Analog) GND 11 VSS (A) Pwr. Supply (Analog) GND 12 VDD Power Supply 12 VDD Power Supply 13 VIN/INTRO Vertical In/Interrupt Out In/Output 13** VIN/INTRO Vertical In/Interrupt Out In/Output 14 SDA Serial Data In/Output (PB) (Program Blocking) (Output) 15 SCK Serial Clock Input 14 SDA Serial Data In/Output 16 SDO Serial Data Out Output 15 SCK Serial Clock Input 17* BOX OSD Timing Signal Output 16 SDO Serial Data Out Output 18* RED Video Output Output 17 NC No Connect Note: *DIP and SOIC pin configuration are identical. 18 NC No Connect Notes: *DIP and SOIC pin conÞguration are identical; must be tied to 2 VSS for current revision. A secondary I C address will be available in the future. **This pin is used as PB (Program Blocking) output in Z86130 to indicate whether the incoming video program is in the blocking set-up programmed. 4 P R E L I M I N A R Y DS007200-TVX0199 Z86129/130/131 ZiLOG NTSC Line 21 Decoder ABSOLUTE MAXIMUM RATINGS* Symbol Parameter Value Unit VDD DC Supply Voltage** Ð0.5 to 6.0 V VIN DC Input Voltage** Ð0.5 to VDD +0.5 V VOUT DC Output Voltage** Ð0.5 to VDD +0.5 V IIN DC Input Current per Pin +10 mA IOUT DC Output Current per Pin +20 mA IDD DC Supply Current +30 mA PD Power Dissipation per Device 300 mW TSTG Storage Temperature Ð65 to +150 ¼C TL Lead Temperature, 1 mm from Case for 10 seconds 260 ¼C Notes: *Maximum ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the limits speciÞed in the DC and AC Characteristics tables, pages 5 and 6, or the Pin Description section, page 9. **Voltages referenced to VSS(A) and VSS. STANDARD TEST CONDITIONS The characteristics listed in the following section apply for standard test conditions as noted. All voltages are refer- +5V enced to Ground. Positive current flows into the referenced pin (5). 2.1 kΩ From Output Under Test 150 pF 250 µA Figure 5. Standard Test Load DC ELECTRICAL CHARACTERISTICS Table 3. DC Electrical Characteristics (TA = 0¡C to +70¡C; VDD = +4.75V to +5.25V) Symbol Parameter Conditions Min Max Unit VIL Input Voltage Low 0 0.2 VDD V VIH Input Voltage High 0.7 VDD VDD V VOL Output Voltage Low IOL = 1.00 mA Ð 0.4 V VOH Output Voltage High IOH = 0.75 mA VDD Ð0.4V Ð V IIL Input Leakage 0V, VDD Ð3.0 3.0 µA IDD Supply Current Estimated* 30 mA Kf VCO Gain Ð TBD MHz/V ILP Loop Filter Current Ð TBD mA Note: *Not guaranteed. DS007200-TVX0199 P R E L I M I N A R Y 5 Z86129/130/131 NTSC Line 21 Decoder ZiLOG AC AND TIMING CHARACTERISTICS Table 4.
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