Renesas Technology to Release SH7776 (SH-Navi3), Industry’S First Dual-Core Soc with Built-In Image Recognition Processing Function for Car Information Terminals
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Renesas Technology to Release SH7776 (SH-Navi3), Industry’s First Dual-Core SoC with Built-in Image Recognition Processing Function for Car Information Terminals ⎯ Achieves excellent performance of 1,920 MIPS and a single-chip solution for next- generation car information systems ⎯ Tokyo, January 19, 2009 — Renesas Technology Corp. today announced the SH7776 (SH-Navi3), a dual-core system-on-chip (SoC) device with on-chip enhanced graphics functions and a high- performance image recognition processing function for the next generation high-performance car information terminals that evolved from car navigation systems. The SH7776 (SH-Navi3) integrates two CPU cores on a single chip and achieves superior processing performance of 1,920 million instructions per second (MIPS), twice that of comparable earlier single-chip SoC products from Renesas Technology. Sample shipments will begin in April 2009 in Japan. Renesas Technology has the top share*1 in the worldwide market for microprocessors for car navigation systems, and the SH-Navi Series,*2 a single-chip SoC device implementing functions essential for high-performance car navigation systems such as 3-D graphics, is already used in many high-end products. Car navigation systems will be evolving into “next-generation car information centers,” which play the central role in car information control to assure convenience, safety, and environmental considerations while driving. The new SH7776 dual-core SoC device delivers on a single chip the performance and functions essential to such a “next-generation car information center.” It enables display of colorful and realistic 3-D graphics use of a multimedia and information communication as well as navigations, display of 2-D/3-D graphics use of a graphical user interface (GUI)*3 for enhanced user-friendliness, and image recognition for functions such as lane detection and preceding vehicle tracking. In addition, functions for strengthening the system reliability of the dual- core architecture are embedded on the chip. The features of the SH7776 (SH-Navi3) are summarized below. (1) Dual-core architecture for excellent processing performance up to 1,920 MIPS The SH7776 (SH-Navi3) integrates dual Renesas Technology SH-4A high-performance 32-bit CPU cores, which have a proven track record in applications such as car navigation systems, and delivers superior processing performance of up to 1,920 MIPS (960 MIPS × 2) when operating at 533 MHz together with low power consumption. This is approximately double the processing performance of Renesas Technology’s second-generation SoC product for car navigation systems (the SH-Navi2) and fully supports the high-speed and complex information processing needed to display a wide variety of graphics and image recognition. -more- (2) 3-D graphics engine for colorful and more realistic 3-D images as well as 2-D and 3-D graphics processor The 3-D graphics engine incorporates PowerVR*4 SGX, sophisticated 3-D graphics IP from the British company Imagination Technologies Limited (IMG). It enables polygon performance of approximately twice that of PowerVR MBX, which is used in the earlier SH-Navi1 and SH-Navi2. This provides support not only for 3-D rendering in navigation applications, but also for multimedia applications such as Human Machine Interface (HMI) that demand more colorful and realistic 3-D rendering. The SH7776 (SH-Navi3) is also provided with a 2-D and 3-D graphics processor for detailed map rendering and more easy-to-use operation screens. Supported features include 2-D rendering functions such as bold- line rendering as well as 3-D rendering functions such as triangle 3-D rendering, for enhanced three-dimensionality, and texture mapping, for more realistic textures. They enable representation of a wide range of 3-D objects (such as high-rise buildings) in maps and a detailed and high-quality GUI as well as maps, icons, and menus. (3) Industry’s first dual-core SoC product for car navigation systems with on-chip image recognition processing function The SH7776 (SH-Navi3) is the industry’s first dual-core SoC product to incorporate an image recognition processing function such as lane detection for driving assist systems. Renesas Technology already mass-produces the SH7774 (SH-Navi2V) with on-chip image recognition processing function. The new SH7776 (SH-Navi3) builds on the track record of its predecessor to deliver even better performance, achieving approximately 3.5 times faster processing through greater internal parallelism and doubled bus width. It can execute multiple external environment recognition programs simultaneously and in real time, for example lane detection and detection and tracking of preceding vehicles. This facilitates the contribution to improving driving safety. <This image recognition processing intellectual property (IP) incorporated in SH7776 (SH-Navi3) was developed jointly with Hitachi, Ltd.> In addition, the distortion compensation module enables transformation into any shape of image data captured by a camera. For example, image data from a camera fitted with a fisheye lens could be used to generate a bird’s-eye view of the periphery of the vehicle. (4) DDR3-SDRAM memory interface and PCI Express interface for ultra-high-speed data transfer The SH7776 (SH-Navi3) is the industry’s first dual-core SoC product for car navigation systems to incorporate a DDR3-SDRAM memory interface which is a two-channel 16-bit dedicated bus interface operating at 533 MHz for connecting high-speed DDR3-SDRAM, enabling ultra-high- speed data transfer at a maximum of 4.27 gigabytes per second. Both channels of the dedicated bus can be accessed at the same time. In addition, the dedicated I/O of PCI Express interface*5 allows high-speed transfer of data at a maximum of 250 megabytes per second to and from an external device equipped with a PCI Express interface. (5) Comprehensive range of peripheral functions improving the user-friendliness of car information terminals, including serial ATA interface The SH7776 (SH-Navi3) integrates on-chip rich peripheral modules required by car navigation systems, including a serial-ATA interface*6 achieving high-speed connection to hard disks, sound interfaces including an audio encoder, a USB 2.0 Host/Function interface, a TS interface for receiving terrestrial digital TV broadcasts, and a GPS*7 baseband processing module. This full and varied complement of peripheral functions makes it possible to reduce the total number of components and achieve a high-performance system at reduced cost. -more- (6) Support for enhanced reliability and reduced development time for dual-core systems The dual-core architecture supports the following two types of processing, providing flexibility to meet a wide range of customer requirements. • Symmetric multiprocessing (SMP), in which the operations of a single program running under a single OS are divided between two CPU cores for parallel processing, is supported. • Asymmetric multiprocessing (AMP), in which different OSes (or multiple instances of the same OS) and completely different programs run on each of the CPU cores, is supported. Note: In this case, a mechanism allowing both OSes to interoperate and a mechanism for separating the operations of the two OSes (a mechanism to prevent one CPU from accessing and changing data in some area of memory while the other CPU is performing processing that accesses the same area of memory) are incorporated into the chip. Since such support, which is usually implemented in software, is implemented in hardware (in the SH7776 chip), high reliability in the development of systems incorporating a dual-core processor can be achieved. < Product Background > In recent years, car information terminals such as car navigation systems have come to offer more advanced navigation functions, including 3-D displays, improved legibility, and enhanced realism. Functions increasingly in demand include display capabilities for enhanced ease of use, real-time access to information via mobile phone links, recreational information system capabilities such as music and video playback, reception of terrestrial digital TV broadcasts, and even some of the functions of safe driving assist systems. As these systems continue to become more multifunctional and sophisticated, they are evolving into a nucleus of vehicle information control functionality intended to assure convenience, safety, and environmental considerations while driving. Ever better performance is demanded of the processors or system-on-chip (SoC) devices used to process the enormous volumes of information required by such applications, but meeting this need through more ultrafine processes or faster operating speeds raises problems such as increased power consumption. In response, the use of multi-core technology, in which multiple CPUs are integrated on a single chip and processing tasks are handled by the individual CPU cores either in parallel or in distributed fashion to increase efficiency, is expanding as a way to boost CPU performance and reduce power consumption at the same time. Renesas Technology embraced multi-core technology early on, launching the SH7786 dual-core processor with two SH-4A CPU cores (max. 1,920 MIPS [when operating at 533 MHz]) in 2008. In response to demand for multi-core SoC devices for vehicle information terminals, Renesas Technology has developed the SH7776 dual-core SoC as a new addition to the SH-Navi Series, which has contributed to the advancement of car navigation systems and has a large