Data Storage
Disks
•••
Hard disk (HDD)
•
Solid state drive (SSD)
•
Random Access Memory
Dynamic RAM (DRAM)
•
Static RAM (SRAM)
•
Registers
%rax, %rbx, ...
•
- Sean Barker
- 1
The CPU-Memory Gap
100,000,000.0
10,000,000.0
1,000,000.0
100,000.0
10,000.0
1,000.0
100.0
Disk
SSD
Disk seek time SSD access time DRAM access time SRAM access time CPU cycle time
DRAM
10.0
Effective CPU cycle time
1.0
CPU
0.1 0.0
1985 1990 1995 2000 2003 2005 2010 2015
Year
- Sean Barker
- 2
Caching
Smaller, faster, more expensive memory caches a subset of the blocks
- 84
- 9
- 104
- 3
Cache
Data is copied in block-sized transfer units
140
Larger, slower, cheaper memory viewed as par@@oned into “blocks”
04
15
26
3
Memory
7
- 8
- 9
- 10
14
11
- 15
- 12
- 13
- Sean Barker
- 3
Cache Hit
Request: 14
- 8
- 9
- 14
- 3
Cache
04
15
26
3
Memory
7
- 8
- 9
- 10
14
11
- 15
- 12
- 13
- Sean Barker
- 4
Cache Miss
Request: 12
- 8
- 192
- 14
- 3
Cache
Request: 12
12
04
15
26
3
Memory
7
- 8
- 9
- 10
14
11
- 15
- 12
- 13
- Sean Barker
- 5
Locality
¢ꢀ Temporal locality: ¢ꢀ Spa0al locality:
- Sean Barker
- 6
Locality Example (1)
sum = 0; for (i = 0; i < n; i++) sum += a[i]; return sum;
- Sean Barker
- 7
Locality Example (2)
int sum_array_rows(int a[M][N]) { int i, j, sum = 0;
for (i = 0; i < M; i++) for (j = 0; j < N; j++) sum += a[i][j]; return sum;
}
- Sean Barker
- 8
Locality Example (3)
int sum_array_cols(int a[M][N]) { int i, j, sum = 0;
for (j = 0; j < N; j++) for (i = 0; i < M; i++) sum += a[i][j]; return sum;
}
- Sean Barker
- 9
The Memory Hierarchy
Smaller
Faster
Costlier per byte
On Chip Storage
1 cycle to access
Registers
CPU instrs can directly access
L1, L2
Cache(s) (SRAM)
~10’s of cycles to access
Main memory
(DRAM)
~100 cycles to access
Larger
Flash SSD / Local network
Slower
Cheaper
per byte
~100 M cycles to access
Local secondary storage (disk)
slower than local
disk to access
Remote secondary storage
(tapes, Web servers / Internet)
- Sean Barker
- 10