DOCSLIB.ORG

Interval Temporal Logic

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Interval Temporal Logic Interval Temporal Logic Antonio Cau, Ben Moszkowski and Hussein Zedan Software Technology Research Laboratory December 6, 2007 HTML version of the ITL home page ITL-course: A not so short introduction to ITL Abstract Interval Temporal Logic (ITL) is a flexible notation for both propositional and first-order reasoning about periods of time found in descriptions of hardware and software systems. Unlike most temporal logics, ITL can handle both sequential and parallel composition and offers powerful and extensible specification and proof techniques for reasoning about properties involving safety, liveness and projected time[15]. Timing constraints are expressible and furthermore most imperative pro- gramming constructs can be viewed as formulas in a slightly modified version of ITL [25]. Tempura provides an executable framework for developing and experimenting with suitable ITL specifications. In addition, ITL and its mature executable subset Tempura [9] have been extensively used to specify the properties of real-time systems where the primitive circuits can directly be represented by a set of simple tempo- ral formulae. In addition, various researchers have applied Tempura to hardware simulation and other areas where timing is important. 1 Syntax The key notion of ITL is an interval. An interval σ is considered to be a (in)finite sequence of states σ0; σ1 :::, where a state σi is a mapping from the set of variables Var to the set of values V al. The length jσj of an interval σ0 : : : σn is equal to n (one less than the number of states in the interval (this has always been a convention in ITL), i.e., a one state interval has length 0). The syntax of ITL is defined in Table1 where z is an integer value, a is a static variable (doesn't change within an interval), A is a state variable (can change within an interval), v a static or state variable, g is a function symbol, p is a predicate symbol. 1 Table 1: Syntax of ITL Expressions exp ::= z j a j A j g(exp1; : : : ; expn) j {a: f Formulae ∗ f ::= p(exp1; : : : ; expn) j :f j f1 ^ f2 j 8v f j skip j f1 ; f2 j f q 2 Semantics The informal semantics of the most interesting constructs are as follows: • {a: f choose a value of a such that f holds. If there is no such an a then {a: f takes an arbitrary value from a's range. • skip unit interval (length 1). • f1 ; f2 holds if the interval can be decomposed (\chopped") into a prefix and suffix interval, such that f1 holds over the prefix and f2 over the suffix, or if the interval is infinite and f1 holds for that interval. • f ∗ holds if the interval is decomposable into a finite number of intervals such that for each of them f holds, or the interval is infinite and can be decomposed into an infinite number of finite intervals for which f holds. The formal semantics is listed in Table2: Let χ be a choice function which maps any nonempty set to some element in the set. 0 0 We write σ ∼v σ if the intervals σ and σ are identical with the possible exception of their mappings for the variable v. 3 Derived Constructs Frequently used derived constructs are listed in table3{6. 4 Propositional proof system In table7 we list the propositional axioms and rules for ITL. 5 First order proof system Some axioms for the first order case are shown in Table8. Let v refer to both static and state variables. e We denote by fv that in formula f expression e is substituted for variable v. 2 Table 2: Semantics of ITL Eσ[[v]] = σ0(v) Eσ[[g(exp1; : : : ; expn)]] =g ^(Eσ[[exp1]];:::; Eσ[[expn]]) ( χ(u) if u 6= fg Eσ[[{a: f]] = χ(Vala) otherwise 0 0 where u = fσ (a) j σ ∼a σ ^ Mσ0 [[f]] = ttg Mσ[[p(exp1; : : : ; expn)]] = tt iffp ^(Eσ[[exp1]];:::; Eσ[[expn]]) Mσ[[:f]] = tt iff Mσ[[f]] = ff Mσ[[f1 ^ f2]] = tt iff Mσ[[f1]] = tt and Mσ[[f2]] = tt 0 0 Mσ[[8v f]] = tt iff for all σ s.t. σ ∼v σ ; Mσ0 [[f]] = tt Mσ[[skipq]] = tt iff jσj = 1 Mσ[[f1 ; f2]] = tt iff (exists a k; s.t. Mσ0...σk [[f1]] = tt and ((σ is infinite and Mσk:::[[f2]] = tt) or (σ is finite and k ≤ jσj and Mσk...σjσj [[f2]] = tt))) or (σ is infinite and Mσ[[f1]]) ∗ Mσ[[f ]] = tt iff if σ is infinite then (exist l0; : : : ; ln s.t. l0 = 0 and M [[f]] = tt and σln ::: for all 0 ≤ i < n, l < l and M [[f]] = tt) i i+1 σli ...σli+1 or (exist an infinite number of li s.t. l0 = 0 and for all 0 ≤ i; l < l and M [[f]] = tt) i i+1 σli ...σli+1 else (exist l0; : : : ; ln s.t. l0 = 0 and ln = jσj and for all 0 ≤ i < n; l < l and M [[f]] = tt) i i+1 σli ...σli+1 3 Table 3: Frequently used non-temporal derived constructs true =b 0 = 0 true value false =b :true false value f1 _ f2 =b :(:f1 ^ :f2) or f1 ⊃ f2 =b :f1 _ f2 implies f1 ≡ f2 =b (f1 ⊃ f2) ^ (f2 ⊃ f1) equivalent 9v f =b :8v :f exists q q Table 4: Frequently used temporal derived constructs f =b skip ; f next more =b true non-empty interval empty =b :more empty interval inf =b true ; false infinite interval isinf (f) =b inf ^ f is infinite finite =b :inf finite interval isfin (f) =b finite ^ f is finite fmore =b more ^ finite non-empty finite interval 3f =b finite ; f sometimes 2f =b :3:f always w f =b : :f weak next 3i f =b f ; true some initial subinterval 2i f =b :(3i :f) all initial subintervals 3a f =b finite ; f ; true some subinterval 2a f =b :(3a :f) all subintervals Table 5: Frequently used concrete derived constructs if f0 then f1 else f2 =b (f0 ^ f1) _ (:f0 ^ f2) if then else if f0 then f1 =b if f0 then f1 else empty if then fin f =b 2(empty ⊃ f) final state sfin f =b :(fin (:f)) strong final state halt f =b 2(empty ≡ f) terminate interval when shalt f =b :(halt (:f)) strong terminate interval when keep f =b 2a (skip ⊃ f) all unit subintervals keepnow f =b 3i (skip ^ f) initial unit subinterval ! ∗ f =b isinf (isfin (f) ) infinite chopstar ∗ fstar (f) =b isfin (isfin (f) ) _ isfin (isfin (f)∗); isinf (f) finite chopstar ∗ while f0 do f1 =b (f0 ^ f1) ^ fin :f0 while loop repeat f0 until f1 =b f0 ;(while :f1 do f0) repeat loop 4 Table 6: Frequently used derived constructs related to expressions exp =b {a: (exp = a) next value fin exp =b {a: fin (exp = a) end value A := exp =b A = exp assignment exp1 ≈ exp2 =b 2(exp1 = exp2) equal in interval exp1 exp2 =b finite ^ (fin exp1) = exp2 temporal assignment exp1 gets exp2 =b keep (exp1 exp2) gets stable exp =b exp gets exp stability padded exp =b (stable (exp); skip) _ empty padded expression exp1 <∼ exp2 =b (exp1 exp2) ^ padded exp1 padded temporal assignment goodindex exp =b keep (exp exp _ exp exp + 1) goodindex intlen (exp) =b 9I (I = 0) ^ (I gets I + 1) ^ (I exp) interval length q Table 7: Propositional Axioms and Rules for ITL. ChopAssoc ` (f0; f1); f2 ≡ f0;(f1; f2) OrChopImp ` (f0 _ f1); f2 ⊃ (f0; f2) _ (f1; f2) ChopOrImp ` f0;(f1 _ f2) ⊃ (f0; f1) _ (f0; f2) EmptyChop ` empty; f1 ≡ f1 ChopEmpty ` f1; empty ≡ f1 BiBoxChopImpChop ` 2i (f0 ⊃ f1) ^ 2(f2 ⊃ f3) ⊃ (f0; f2) ⊃ (f1; f3) StateImpBi ` p ⊃ 2i p NextImpNotNextNot ` f0 ⊃ : :f0 KeepnowImpNotKeepnowNot ` keepnow (f0) ⊃ : keepnow (:f0) BoxInduct ` f0 ^ 2(f0 ⊃ w f0) ⊃ 2f0 InfChop ` (f0 ^ inf); f1 ≡ (f0 ^ inf) ∗ ∗ ChopStarEqv ` f0 ≡ (empty _ ((f0 ^ more); f0 )) ∗ ChopstarInduct ` (inf ^ f0 ^ 2(f0 ⊃ (f1 ^ fmore); f0)) ⊃ f1 MP ` f0 ⊃ f1; ` f0 ) ` f1 BoxGen ` f0 ) ` 2f0 BiGen ` f0 ) ` 2i f0 5 Table 8: Some First Order Axioms and Rules for ITL. e ForallSub ` 8v f ⊃ fv , where theq expression e has the same data and temporal type as the variable v and is free for v in f. ForallImplies ` 8v (f1 ⊃ f2) ⊃ (f1 ⊃ 8v f2); where vqdoesn't occur freely in f1.q B SubstAxiom ` 2(A = B) ⊃ f ≡ fA : StaticWeakNext ` w ⊃ w w, where w only contains static variables. ExistsChopRight ` 9v (f1; f2) ⊃ (9v f1); f2, where vqdoesn't occur freelyq in f2. ExistsChopLeft ` 9v (f1; f2) ⊃ f1;(9v f2), where vqdoesn't occur freelyq in f1. ExistsImpDesc ` (9v f) ^ ({v: f) = v ⊃ f, where v isq a static variable. ForallGen ` f ) ` 8v f, for any variable v. q 6 6 Tools 6.1 (Ana)Tempura Tempura, the C-Tempura interpreter version 2.7 developed originally by Roger Hale and now maintained by Antonio Cau and Ben Moszkowski, is an interpreter for executable Interval Temporal Logic formulae. The first Tempura interpreter was programmed in Prolog by Ben Moszkowski, and was operational around December 2, 1983. Subsequently he rewrote the interpreter in Lisp (mid Mar, 1984), and in late 1984 modified the program to handle a two-level memory and multi-pass scanning. The C-Tempura interpreter was written in early 1985 by Roger Hale at Cambridge University. AnaTempura, which is built upon C-Tempura, is a tool for the runtime verification of systems using Interval Temporal Logic (ITL) and its executable subset Tempura. The runtime verification technique uses assertion points to check whether a system satisfies timing, safety or security properties expressed in ITL.
Load more

Recommended publications
  • A Specification-Oriented Semantics for the Refinement of Real-Time Systems
    View metadata, citation and similar papers at core.ac.uk brought to you by CORE provided by Elsevier - Publisher Connector Theoretical Computer Science 131 (1994) 219-241 219 Elsevier A specification-oriented semantics for the refinement of real-time systems David Scholefield and Hussein Zedan Formal Systems Research Group, Department of ComputerScience, University of York, Heslington, York, UK He Jifeng Programming Research Group. Oxford University, Keble Road, Oxford, UK Communicated by I. Mitrani Received November 1992 Revised February 1993 Abslract Scholefield, D., H. Zedan and H. Jifeng, A specification-oriented semantics for the refinement of real-time systems, Theoretical Computer Science 131 (1994) 2199241. A refinement calculus for the development of real-time systems is presented. The calculus is based upon a wide-spectrum language called the temporal agent model (TAM), within which both functional and timing properties can be expressed in either abstract or concrete terms. A specifica- tion-oriented semantics for the language is given. Program development is considered as a refine- ment process, i.e. the calculation of a structured program from an unstructured specification. A calculus of decomposition is defined. An example program is developed. 1. Introduction The formal development of a computer system is traditionally separated into four tasks: the formulation of a specification, the formulation of a design, verification between specification and design, and the translation of the design into an implemen- tation. In real-time systems, verification must take into account both functional correctness and the timeliness of results - a consideration which adds further com- plexity to an already difficult task. Correspondence to: D.
    [Show full text]
  • Removing Redundant Refusals: Minimal Complete Test Suites for Failure Trace Semantics
    Removing Redundant Refusals: Minimal Complete Test Suites for Failure Trace Semantics Maciej Gazda Robert M. Hierons Department of Computer Science Department of Computer Science University of Sheffield, UK University of Sheffield, UK Abstract—We explore the problem of finding a minimal com- in which no action in X is enabled. Most work uses ioco [21] plete test suite for a refusal trace (or failure trace) semantics. or one of its variants; see [22] for an overview. In ioco, an Since complete test suites are typically infinite, we consider the observation is a trace that can contain instances of quiescence: setting with a bound ` on the length of refusal traces of interest. A test suite T is thus complete if it is failed by all processes that the situation in which the system under test (SUT) cannot contain a disallowed refusal trace of length at most `. produce output or change state without first receiving input. The proposed approach is based on generating a minimal com- The ioco test theory assumes that the SUT cannot refuse inputs plete set of forbidden refusal traces. Our solution utilises several (is input-enabled) and the environment cannot block outputs, interesting insights into refusal trace semantics. In particular, which is why quiescence is the only type of refusal. we identify a key class of refusals called fundamental refusals which essentially determine the refusal trace semantics, and the A refusal of a set X is observed through the tester offering associated fundamental equivalence relation. We then propose a the actions in X and subsequent deadlock (detected through small but not necessarily minimal test suite based on our theory, a timeout).
    [Show full text]
  • A Comprehensive Survey of Trends in Oracles for Software Testing
    1 A Comprehensive Survey of Trends in Oracles for Software Testing Mark Harman, Phil McMinn, Muzammil Shahbaz and Shin Yoo Abstract—Testing involves examining the behaviour of a system in order to discover potential faults. Determining the desired correct behaviour for a given input is called the “oracle problem”. Oracle automation is important to remove a current bottleneck which inhibits greater overall test automation; without oracle automation, the human has to determine whether observed behaviour is correct. The literature on oracles has introduced techniques for oracle automation, including modelling, specifications, contract-driven development and metamorphic testing. When none of these is completely adequate, the final source of oracle information remains the human, who may be aware of informal specifications, expectations, norms and domain specific information that provide informal oracle guidance. All forms of oracle, even the humble human, involve challenges of reducing cost and increasing benefit. This paper provides a comprehensive survey of current approaches to the oracle problem and an analysis of trends in this important area of software testing research and practice. Index Terms—Test oracle; Automatic testing; Testing formalism. F 1 INTRODUCTION undecidable problem. For example, attempting to cover all branches [6], [10], [16], [64], [77], Much work on testing seeks to automate as [159], [177] in a system under test can never be much of the test process as practical and de- complete because branch reachability is known sirable, in order to make testing faster, cheaper to be undecidable in general [192]. and more reliable. In order to automate testing, The problem of generating test inputs to we need an oracle, a procedure that determines achieve coverage of test adequacy criterion what the correct behaviour of a system should has been the subject of research interest for be for all input stimuli with which we wish nearly four decades [48], [106] and has been to subject the system under test.
    [Show full text]
  • Formal Specification and Runtime Verification of Parallel
    Formal Specification and Runtime Verification of Parallel Systems using Interval Temporal Logic (ITL) PhD Thesis Nayef Hmoud Alshammari This thesis is submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy Software Technology Research Laboratory De Montfort University Leicester - United Kingdom 2018 Declaration of Authorship I declare that the work described in this thesis is original work undertaken by me for the degree of Doctor of Philosophy at the Software Technology Research Laboratory (STRL), at De Montfort University, United Kingdom. No part of the material described in this thesis has been submitted for any award of any other degree or qualification in this or any other university or college of advanced education. This thesis is written by me and produced using LATEX. I To my mother’s soul, Helalah bint Hujailan Alshammari (April 21st, 2016). May she rest in peace ... II Acknowledgement Firstly, I would like to express my sincere gratitude to my first supervisor Dr. Francois Seiwe and second supervisor Dr. Antonio Cau for their continuous support of my PhD study and related research, and for their patience, motivation, and immense knowledge. Their guidance helped me during the time of my research and writing of this thesis. I could not have had more qualified supervisors for my PhD study. Also, I would like to express my great appreciation to Dr. Antonio Cau for the remarkable theoretical and practical support which he offered during the study of my PhD. I would also like to thank my former supervisors Dr. Ben Moszkowski and Dr. Jordan Dimitrov for their roles during my PhD.
    [Show full text]
  • Interval Temporal Logic
    Interval Temporal Logic Antonio Cau and Ben Moszkowski 2021-04-09 HTML version of the ITL home page Abstract Interval Temporal Logic (ITL) is a flexible notation for both propositional and first-order reasoning about periods of time found in descriptions of hardware and software systems. Unlike most temporal logics, ITL can handle both sequential and parallel composition and offers powerful and extensible specification and proof techniques for reasoning about properties involving safety, liveness and pro- jected time [134]. Timing constraints are expressible and furthermore most imperative programming constructs can be viewed as formulas in a slightly modified version of ITL [125]. Tempura provides an executable framework for developing and experimenting with suitable ITL specifications. In addi- tion, ITL and its mature executable subset Tempura [157] have been extensively used to specify the properties of real-time systems where the primitive circuits can directly be represented by a set of simple temporal formulae. In addition, Tempura has been applied to hardware simulation and other areas where timing is important. 1 Contents 1 Finite Interval Temporal Logic3 1.1 Syntax............................................3 1.2 Semantics..........................................3 1.3 Derived Constructs......................................5 1.4 Propositional proof system..................................7 1.5 First order proof system...................................7 2 Finite and Infinite Interval Temporal Logic8 2.1 Syntax............................................8
    [Show full text]
  • Issue 2005 2 June 2005
    , . Issue 2005-2 FACS June 2005 A FM E C A A C ~v1 L F (~ T ~J1 ETHODS C 1 BCS R S(:S(: M S Z A UM L I FM SI G E E E E E BCS The Newsletter of the Formal Aspects of 6 FACS Computing Science (FACS) Specialist Group ISSN 0950-1231 , " -40 , . FACS FACTS Iss ue 2005-2 June 2005 :~::;'::i(t::·::!:\,,: h\boJi EACS.FACTS .. '::':--'}U},;"";",::,:::: '}::::-::/:W::::::'" :,:':':t\i{\, '::;:=/';tt::-:· . , . EAG,sFACi,s[ I S$N:Q950~12311 U S ! h ~ Q~W~letter . of ·ihe BQ$ Specialist · (Sfoup 8h .·· FpribaIAsp~ Cts ·otCornputihg ·S§ience(FACS}; 'FACSFAGTS.• is· dfstributed in electronic form !ball FACS members. · .... A~from ';605 : FACS ?A hs ~ lii ' b~ ~clbl: g~~a foJ~\iinesayea 6 Mar c ti : • June; September and December. Submissions are always welcome .. p l g<!s~seetQe <3d¥~rt.. .or1 page2~fo r fU~herde! <! i ls of·yisil thenew§lg!ter .•.• areaOfthe FACS websile [ http: //www .bcs ~facs . org/newsletterr .. .. ............ .- ... -..... -,'- . Back issU~s . of FAGSFA GTS~re avai l ~ bl e t6 .downlda d frorTE The FACS FACTS Tea m . ..,., . Newsletted ::ditor . Paul B6ca [editor@fac;sfacts ci nfol Editori.al Team J61lathanBowerl,J udith Ca rlton, John Cooke; . Kevin Lano., Mike Siannett Colu rn nist~.i •. ' Din es Bj0rn er (The •~ ai l waY.oClm a i r1) ...•. Judith Carlton(Puzzles) " ....... ... Contribqtors .to t h.isJsSU€) ; Dines Bj0mer, Eerke Boiten, Jonathan . Bowen , Judith Ca ri ton, Roger Carsley, J o hn . D E! r ri 9~• . George E lef~er<;lki§ ; J ose ; Fiade i ro , Joh n F i tzg~ta l d, Carroll Morgan, Fiona Polack, F.X.
    [Show full text]
  • Community Engagement
    Community Engagement Annual Report 2016-2017 2 2 2 COMMUNITY ENGAGEMENT ANNUAL REPORT 2016 - 2017 PREPARED FOR COMMUNITY ENGAGEMENT OFFICE APPLIED SCIENCE UNIVERSITY Copyright © 2017 by Applied Science University All rights reserved. No part of this publication may be reproduced, distributed, or transmitted in any form or by any means, including photocopying, recording, or other electronic or mechanical methods, without the prior written permission of the publisher. NOVEMBER 2017 3 4 CONTENTS UNIVERSITY VISION, MISSION, OBJECTIVES AND VALUES VISION The vision of Applied Science University is to be one of the leading private universities supporting practical learning and scientific research in Bahrain and the Gulf. MISSION ASU is committed to offering an education that is accessible to academically competent students of Bahrain, the Gulf and beyond, and to deliver academic programmes of quality that graduate students equipped with knowledge and skills relevant locally and regionally. ASU is further dedicated to the promotion of a culture of learning and scientific research for its students, staff and faculty regionally and globally to engage meaningfully with the community at large. OBJECTIVES · To acknowledge social responsibility and to serve the local and regional community. · To enhance a superior scientific research standard in all fields of knowledge. · To offer new specializations to meet the market demands. · To maintain abreast of scientific development and to provide all the means of academic success. VALUES · Integrity: ASU’s community values honesty, fairness and academic integrity as fundamental to its vision and mission. It recognizes, affirms and upholds this value in a responsible and committed manner. · Collaboration and Team Spirit: ASU’s community recognizes collaboration and team spirit to be at the heart of the institutional culture and to promote these values in a dedicated manner.
    [Show full text]
  • June 2005 a C T S
    Issue 2005-2 FACS June 2005 A C T S The Newsletter of the Formal Aspects of Computing Science (FACS) Specialist Group ISSN 0950-1231 FACS FACTS Issue 2005-2 June 2005 About FACS FACTS FACS FACTS [ISSN: 0950-1231] is the newsletter of the BCS Specialist Group on Formal Aspects of Computing Science (FACS). FACS FACTS is distributed in electronic form to all FACS members. As from 2005, FACS FACTS will be published four times a year: March, June, September and December. Submissions are always welcome. Please see the advert on page 23 for further details or visit the newsletter area of the FACS website [http://www.bcs-facs.org/newsletter]. Back issues of FACS FACTS are available to download from: http://www.bcs-facs.org/newsletter/facsfactsarchive.html The FACS FACTS Team Newsletter Editor Paul Boca [[email protected]] Editorial Team Jonathan Bowen, Judith Carlton, John Cooke, Kevin Lano, Mike Stannett Columnists Dines Bjørner (The Railway Domain) Judith Carlton (Puzzles) Contributors to this Issue: Dines Bjørner, Eerke Boiten, Jonathan Bowen, Judith Carlton, Roger Carsley, John Derrick, George Eleftherakis, José Fiadeiro, John Fitzgerald, Carroll Morgan, Fiona Polack, F.X. Reid, Paola Spoletini, Marcel Verhoef, Jim Woodcock 2 FACS FACTS Issue 2005-2 June 2005 Contents Editorial 4 FACS AGM, 27 April, London 5 ZB2005 Conference Report 10 REFINE2005 Conference Report 17 Train Domain Column 19 Blocking Publication: An Adventure in Destructive Refereeing 24 An Example Railway Domain 29 Book Announcements 40 PhD Abstracts 41 Conference Announcements 45 Job Adverts 48 Formal Methods Coffee Time 49 And Finally 52 FACS Committee 53 3 FACS FACTS Issue 2005-2 June 2005 Editorial Jonathan Bowen, BCS-FACS Chair Welcome to another varied FACS FACTS Newsletter, ably compiled by Paul Boca.
    [Show full text]
  • Formal Requirement Elicitation and Debugging for Testing and Verification of Cyber-Physical Systems
    Formal Requirement Elicitation and Debugging for Testing and Verification of Cyber-Physical Systems Adel Dokhanchi∗, Bardh Hoxhay, and Georgios Fainekos∗ ∗School of Computing, Informatics and Decision Systems Arizona State University, Tempe, AZ, U.S.A. Email: fadokhanc,[email protected] yDepartment of Computer Science, Southern Illinois University, Carbondale, IL, U.S.A. Email: [email protected] Abstract A framework for the elicitation and debugging of formal specifications for Cyber-Physical Systems is presented. The elicitation of specifications is handled through a graphical interface. Two debugging algorithms are presented. The first checks for erroneous or incomplete temporal logic specifications without considering the system. The second can be utilized for the analysis of reactive requirements with respect to system test traces. The specification debugging framework is applied on a number of formal specifications collected through a user study. The user study establishes that requirement errors are common and that the debugging framework can resolve many insidious specification errors1. I. INTRODUCTION Testing and verification of Cyber-Physical Systems (CPS) is important due to the safety critical applications of CPS such as medical devices and transportation systems. It has been shown that utilizing formal specifications can lead to improved testing and verification [24], [32], [45], [33]. However, developing formal specifications using logics is a challenging and error prone task even for experts who have formal mathematical training. Therefore, in practice, system engineers usually define specifications in natural language. Natural language is convenient to use in many stages of system development, but its inherent ambiguity, inaccuracy and inconsistency make it unsuitable for use in defining specifications.
    [Show full text]
  • Reversibility of Executable Interval Temporal Logic Specifications
    REVERSIBILITY OF EXECUTABLE INTERVAL TEMPORAL LOGIC SPECIFICATIONS ∗ APREPRINT Antonio Cau Stefan Kuhn Cyber Technology Institute, Cyber Technology Institute, School of Computer Science and Informatics, School of Computer Science and Informatics, Faculty of Computing, Engineering and Media Faculty of Computing, Engineering and Media De Montfort University, Leicester, UK De Montfort University, Leicester, UK [email protected] [email protected] James Hoey School of Informatics, University of Leicester, Leicester, UK [email protected] May 10, 2021 ABSTRACT In this paper the reversibility of executable Interval Temporal Logic (ITL) specifications is investi- gated. ITL allows for the reasoning about systems in terms of behaviours which are represented as non-empty sequences of states. It allows for the specification of systems at different levels of ab- straction. At a high level this specification is in terms of properties, for instance safety and liveness properties. At concrete level one can specify a system in terms of programming constructs. One can execute these concrete specification, i.e., test and simulate the behaviour of the system. In this paper we will formalise this notion of executability of ITL specifications. ITL also has a reflection operator which allows for the reasoning about reversed behaviours. We will investigate the reversibility of executable ITL specifications, i.e., how one can use this reflection operator to reverse the concrete behaviour of a particular system. Keywords Interval Temporal Logic · Time Reversion · Program Reversion · Reversible Computing. 1 Introduction Formal methods have been used in computer science to verify desirable and undesirable properties of programs. One arXiv:2105.03375v1 [cs.FL] 7 May 2021 type of formalism introduced is temporal logic.
    [Show full text]
  • Formal Specification of Scientific Applications Using Interval
    5 Formal Specification of Scientific Applications Using Interval Temporal Logic BOJANA KOTESKA and ANASTAS MISHEV, University SS. Cyril and Methodius, Faculty of Computer Science and Engineering, Skopje LJUPCO PEJOV, University SS. Cyril and Methodius, Faculty of Natural Science and Mathematics, Skopje Scientific applications simulate any natural phenomena in different scientific domains. Moreover, the problems they solve are usually represented by mathematical models. Taking that in advance, these problems can be described by using specific formal notation and mathematical formulas. Scientific applications are usually created by the scientists without using any software development engineering practices. Our main goal is to include formal methods in the testing process of scientific applications. In this paper, we adapt Interval Temporal Logic (ITL) as a flexible notation for describing software applications. We use Tempura framework and Ana Tempura tool for specifying the properties of the scientific software system. The correctness of the code is verified by comparing the results from the program output and functions written in Tempura. This process is especially important when some code changes or optimizations are made. To verify this concept we made a formal description of the code for calculating bound states of the Morse oscillator well. Categories and Subject Descriptors: D.2.4 [Software Engineering]: Software/Program Verification —Validation, Formal Meth- ods; G.4 [Mathematics of Computing]: Mathematical Software—Certification and testing, Documentation, Verification General Terms: Verification Additional Key Words and Phrases: Scientific application, Formal Specification, Interval Temporal Logic, Ana Tempura, Morse Oscillator 1. INTRODUCTION Scientific applications are widely used nowadays in different scientific domains. Numerical simulations performed by scientific applications can solve problems in many research fields such as: computational chemistry, physics, engineering, mathematics, mechanics, informatics, bioinformatics, etc.
    [Show full text]
  • The Developer Factor in Software Privacy
    The Developer Factor in Software Privacy Mohammad Tahaei Doctor of Philosophy School of Informatics University of Edinburgh 2021 Abstract Computer programming operates and controls our personal devices, cars, and infrastructures. These programs are written by software developers who use tools, software development platforms, and online resources to build systems used by billions of people. As we move towards societies that rely on computer programs, the need for private and secure systems increases. Developers, the workforce behind the data economy, impact these systems’ privacy, and consequently, the users and society. Therefore, understanding the developer factor in software privacy provides invaluable inputs to software companies, regulators, and tool builders. This thesis includes six research papers that look at the developer factor in software privacy. We find that developers impact software privacy and are also influenced by external entities such as tools, platforms, academia, and regulators. For example, changes in regulations create challenges and hurdles for developers, such as creating privacy policies, managing permissions, and keeping user data private and secure. Developers interactions with tools and software development platforms, shape their understanding of what privacy means, such as consent and access control. Presentation of privacy information and options on platforms also heavily impact developers’ decisions for their users’ privacy, and platforms may sometimes nudge developers into sharing more of their users’ data by using design (dark) patterns. Other places developers learn about privacy include universities, though they may not learn how to include privacy in software. Some organisations are making efforts to champion privacy as a concept inside development teams, and we find that this direction shows promise as it gives developers direct access to a champion who cares about privacy.
    [Show full text]